Abstract: A method and apparatus creates and manages persistent memory (PM) in a multi-node computing system. A PM Manager in the service node creates and manages pools of nodes with various sizes of PM. A node manager uses the pools of nodes to load applications to the nodes according to the size of the available PM. The PM Manager can dynamically adjust the size of the PM according to the needs of the applications based on historical use or as determined by a system administrator. The PM Manager works with an operating system kernel on the nodes to provide persistent memory for application data and system metadata. The PM Manager uses the persistent memory to load applications to preserve data from one application to the next. Also, the data preserved in persistent memory may be system metadata such as file system data that will be available to subsequent applications.

Abstract: Certain embodiments of the present disclosure related to systems, methods, and devices for increasing data access speeds. In certain embodiments, a method includes running multiple cache retrieval processes in parallel, in response to a read command. In certain embodiments, a method includes initiating a first cache retrieval process and a second cache retrieval process to run in parallel, in response to a single read command.

Abstract: A method of controlling data access to non-volatile memory is disclosed. The method includes storing a data file in a non-volatile memory. The non-volatile memory includes a memory array including a plurality of address ranges one or more of which corresponding to a protected portion of the memory array and one or more of which corresponding to an unprotected portion of the memory array. The method also includes communicating to a host device an indication that a memory request with respect to the protected portion of the memory array is denied. The indication is communicated for instructing the host device to avoid a timeout when the memory request is denied.

Abstract: A flash storage device and a method for using the flash storage device to prevent unauthorized use of a software application are provided. An identifier may be encoded within specific sectors of the flash storage device. One bits of the identifier may be encoded as unusable ones of the specific sectors and zero bits of the identifier may be encoded as usable one of the specific sectors. Alternatively, the zero bits of the identifier may be encoded as the unusable ones of the specific sectors and the one bits of the identifier may be encoded as the usable ones of the specific sectors. The software application may be permitted to execute on a processing device connected to the flash storage device only when the identifier is encoded within the flash storage device.

Abstract: The present disclosure includes methods and devices for stripe-based memory operation. One method embodiment includes writing data in a first stripe across a storage volume of a plurality of memory devices. A portion of the first stripe is updated by writing updated data in a portion of a second stripe across the storage volume of the plurality of memory devices. The portion of the first stripe is invalidated. The invalid portion of the first stripe and a remainder of the first stripe are maintained until the first stripe is reclaimed. Other methods and devices are also disclosed.

Abstract: The present invention is directed to systems and methods for improving access to non-volatile solid-state storage systems. Embodiments described herein provide a physical chunk number (PCN), or a physical page number (PPN), by which a controller can access the next available chunks (or pages) in a programming sequence optimized by concurrency. By incrementing the PCN, the controller can program consecutive chunks in the optimized programming sequence. In one embodiment, the programming sequence is determined at the time of initial configuration and the sequence seeks to synchronize data programming and data sending operations in subcomponents of the storage system to minimize contention and wait time. In one embodiment, the PCN includes an index portion to a superblock table with entries that reference specific blocks within the subcomponents in a sequence that mirrors the optimized programming sequence, and a local address portion that references a particular chunk to be programmed or read.

Abstract: A wireless communication device is provided. The device is connectable to a first wireless network including an access point and a second wireless network including a terminal having an access point function. The device includes a setting section which stores setup data in a volatile storage area, a communication section which performs wireless communication using the setup data stored in the volatile storage area, and a determination section which determines which wireless networks the device is to be connected to. If the device is to be connected to the first wireless network, the setting section stores first setup data from the access point into the volatile storage area and a non-volatile storage area. If the device is to be connected to the second wireless network, the setting section stores second setup data from the terminal into the volatile storage area without storing it into the non-volatile storage area.

Abstract: A bridge receives a power down command and in response converts the power down command to a data hardening command. The bridge issues the data hardening command to a solid state disk. In response to the data hardening command, data stored on the solid state disk is hardened. The hardening comprises writing data in volatile memory to non-volatile memory. The data that is hardened comprises user data and protected data. The data hardening command optionally comprises one or more of a flush cache command, a sleep command, and a standby immediate command.

Abstract: A redundant array of independent disk (RAID) memory storage system comprising data storage blocks arranged in a first plurality of data rows and a second plurality of data columns, wherein parity data is stored in additionally defined parity blocks, and wherein numbers of data blocks in respective columns are different, to accommodate the additional diagonal parity data block that the geometry of the system requires. The system is suitable for an SSD array in which sequential disk readout is not required.

Abstract: Example embodiments include a memory module having a first volatile memory, a second volatile memory, a nonvolatile memory, and a controller configured to control an operation of the second volatile memory, and an operation of the nonvolatile memory. When first write data received from an external controller are written to the first volatile memory in a write operation, the controller receives and writes the first write data to the second volatile memory. The controller is configured to perform backup and restore operations using a buffer, the nonvolatile memory, the first volatile memory, and/or the second volatile memory. Example embodiments include a memory module having a first nonvolatile memory, a second nonvolatile memory, and a third nonvolatile memory, with corresponding backup and restore features. Example embodiments also include methods for processing the data and operating the various components of the memory system.

Abstract: An interface circuit that emulates a memory circuit having a first organization using a memory circuit having a second organization, wherein the second organization includes a number of banks, a number of rows, a number of columns, and a number of bits per column.

Abstract: Adaptive systems include a memory device including a plurality of memory cells, a data quality monitoring block, and an adaptive data encoding block, the data quality monitoring block and the adaptive data encoding block both being operatively coupled to the memory device. The data quality monitoring block is configured to determine a quality value of a group of one or more memory cells included in the memory device, the determined quality value being indicative of a quality of the group of one or more memory cells. The adaptive data encoding block is configured to select a coding scheme from a plurality of coding schemes to encode data to be written to the group of one or more memory cells in the memory device, the selection of the coding scheme being based at least in part on the determined quality value of the group of one or more memory cells.

Abstract: Methods, systems and computer program products for implementing a polling process among one or more flash memory devices are described. In some implementations, the polling process may include sending a read status command to a flash memory device to detect the ready or busy state of the flash memory device. A status register may be included in the flash memory device for storing a status signal indicating an execution state of a write (or erase) operation. A solid state drive system may perform the polling process by reading the status register of the flash memory device.

Abstract: Disclosed is a method for protecting sensitive data in a storage device having wear leveling. In the method, a write command, with an associated sensitive write signal indicating that sensitive data is associated with the write command, is received. The sensitive data is further associated with at least one address pointing to a storage location within an initial physical storage block. The write command is executed by writing to at least one storage location within an available physical storage block, pointing the at least one address to the at least one storage location within the available physical storage block, and erasing the initial physical storage block to complete execution of the write command.

Abstract: A memory system comprises a storage device and a host. The host classifies pages stored in the storage device into a plurality of data groups according to properties of the pages, and transmits setup information regarding the classified data groups to the storage device.

Abstract: A nonvolatile memory apparatus includes a memory cell array, and a write operation controller configured to verify a write operation by comparing input data to the write operation controller with cell data written into the memory cell array, measure a resistance value after a first time is elapsed, and determine whether or not to re-perform the write operation according to the measured resistance value.

Abstract: A file system including a first memory unit which is non-volatile and has a plurality of blocks, a control unit configured to select one of the plurality of blocks of the first memory unit, determine whether the selected block is a valid block, control a data write with respect to the selected block if the selected block is a valid block, divide the plurality of blocks into valid blocks and bad blocks by checking the plurality of blocks of the first memory unit, generate an address table by mapping the valid blocks and the bad blocks to addresses and control a loading of the address table generated, and a second memory unit which is volatile and stores the address table for the plurality of blocks of the first memory unit.

Abstract: A computing system includes a number of memory modules and temperature sensors. Each temperature sensor measures a temperature of a memory module. In such a computing system a garbage collector during garbage collection, determines whether a temperature measurement of a temperature sensor indicates that a memory module is overheated and, if a temperature measurement of a temperature sensor indicates a memory module is overheated, the garbage collector reallocates one or more active memory regions on the overheated memory module to a non-overheated memory module. Reallocating the active memory regions includes copying contents of the active memory regions from the overheated memory module to the non-overheated memory module.

Abstract: Technologies for an operating system identifying SSD and CSSD devices based on a corresponding descriptor, and for optimizing operating system functionalities with respect to the SSD/CSSD device. Optimizations include disabling non-SSD/CSSD functionalities, such as HDD defragmentation, and by enabling SSD/CSSD specific functionalities, such as write optimization storage functionalities.

Abstract: A data storage system with redundant SSD cache includes an SSD cache organized into logical stripes, each logical stripe having several logical blocks. The logical blocks of each stripe are organized into logical data blocks and one logical parity block. Data may be written to the SSD cache by performing an exclusive disjunction operation on the logical parity block, the new data and the existing data in logical stripe to update the parity block, then writing the new data over the existing data in a logical data block in the same logical stripe.

Abstract: The invention provides a family of 2-write WOM-codes, preferred embodiments of which provide improved WOM-rates. Embodiments of the invention provide constructs for linear codes C having a 2-write WOM-code. Embodiments of the invention provide 2-write WOM-codes that improve the best known WOM-rates known to the present inventors at the time of filing with two writes. Preferred WOM-codes are proved to be capacity achieving when the parity check matrix of the linear code C is chosen uniformly at random. Preferred embodiments of the invention provide an electronic device utilizing an efficient coding scheme of WOM-codes with two write capability. The coding) method is based on linear binary codes and allows the electronic device to write information to the memory twice before erasing it This method can be applied for any kind of memory systems, and in particular for flash memories. The method is shown to outperform all well-known codes.

Abstract: The present invention is directed to a method for optimizing thermal management for a storage controller cache of a data storage system. The method allows for pending writes of a storage controller to be selectively provided to solid-state device (SSD) module(s) of the controller in a manner which allows operating temperatures of the SSD module(s) to be maintained within a thermal envelope.

Abstract: A temperature management method suitable for a memory storage device having a rewritable non-volatile memory module and a memory controller used for controlling the rewritable non-volatile memory module are provided. The temperature management method includes detecting and determining whether the hot-spot temperature of the memory storage device is higher than a predetermined temperature; and when affirmative, making the memory controller execute a cooling process, so as to reduce the hot-spot temperature of the memory storage device. Accordingly, the problem of heat buildup of the (rewritable non-volatile) memory storage device can be mitigated, as well as the problems of data loss and device aging of the (rewritable non-volatile) memory storage device.

Abstract: The invention discloses a method for storing data and a device of implementing the same. The method comprises receiving a request for storing data sent by a user and storing the data to an SSD according to the received request. The device comprises a request receiving module used to receive the request storing data and an SSD storage module used to store the data to an SSD according to the received request. The invention ensures consistency of data storage by storing data to an SSD according to the received request, thereby reducing data redundancy caused by using a cache layer to cache the data in the prior art. Additionally, the use of a single layer of an SSD to store data avoids the need of reloading data in the cache layer once a machine is power-down, thereby reducing the complexity of system design and the cost of operation and maintenance.

Abstract: Described are an apparatus, system, and method for improving read endurance for a non-volatile memory (NVM). The method comprises: determining a read count corresponding to a block of NVM; identifying whether the block of NVM is a partially programmed block (PPB); comparing the read count with a first threshold when it is identified that the block is a PPB; and when identified otherwise, comparing the read count with a second threshold, wherein the first threshold is smaller than the second threshold. The method further comprises: identifying a block that is a PPB; determining a first word line corresponding to un-programmed page of the PPB; and sending the first word line to the NVM, wherein the NVM to apply: a first read voltage level to word lines corresponding to the un-programmed pages of the PPB, and a second read voltage level to word lines corresponding to programmed pages of the PPB.

Abstract: An information recording device comprises a memory component configured to hold data, a first file system controller configured to manage data held in the memory component on the basis of a first file name formed by a first code, and a wireless component configured to send and receive wireless signals. The first file system controller receives, from an access device connected to the information recording device, the first file name and a second file name that corresponds to the first file name and is formed by a second code that is different from the first code, identifies specific data having the first file name out of the data held in the memory component, and sends the second file name and the specific data to another information recording device connected via the wireless component.

Abstract: An apparatus, system, and method are disclosed for a front-end, distributed redundant array of independent drives (“RAID”). A storage request receiver module receives a storage request to store object or file data in a set of autonomous storage devices forming a RAID group. The storage devices independently receive storage requests from a client over a network, and one or more of the storage devices are designated as parity-mirror storage devices for a stripe. The striping association module calculates a stripe pattern for the data. Each stripe includes N data segments, each associated with N storage devices. The parity-mirror association module associates a set of the N data segments with one or more parity-mirror storage devices. The storage request transmitter module transmits storage requests to each storage device. Each storage request is sufficient to store onto the storage device the associated data segments. The storage requests are substantially free of data.

Abstract: A data storage subsystem includes a volatile memory in which stored data can be denoted as being data that should be preserved in the event of an interruption in the power supply to the volatile memory. The available capacity for such data storage is dynamically allocated between multiple firmware client components of the storage subsystem, such that each client component has its own (varying) allocation of the available capacity. A higher priority for the storage of such data is given to client components on which other client components depend, such as lower layers of the software stack, thereby allowing them to get a larger share of the available capacity for such data storage when needed and complete their input/output requests faster.

Abstract: In at least some embodiments, a method comprises receiving a first command from a source external to a computer to provide a copy of a read only memory (ROM) image from the computer to the external source. The method also comprises receiving a second command from the source external to the computer to replace the computer's ROM image and, without re-booting the computer, replacing the computer's ROM image with a ROM image received from the external source.

Abstract: Example methods, apparatus, and articles of manufacture to access data are disclosed. A disclosed example method involves generating a key-value association table in a non-volatile memory to store physical addresses of a data cache storing data previously retrieved from a data structure. The example method also involves storing recovery metadata in the non-volatile memory. The recovery metadata includes a first address of the key-value association table in the non-volatile memory. In addition, following a re-boot process, the locations of the key-value association table and the data cache are retrieved using the recovery metadata without needing to access the data structure to re-generate the key-value association table and the data cache.

Abstract: In some embodiments, a non-volatile cache memory may include a multi-level non-volatile cache memory configured to be located between a system memory and a mass storage device of an electronic system and a controller coupled to the multi-level non-volatile cache memory, wherein the controller is configured to control utilization of the multi-level non-volatile cache memory. Other embodiments are disclosed and claimed.

Abstract: Embodiments of the invention are directed to reducing write amplification in a cache with flash memory used as a write cache. An embodiment of the invention includes partitioning at least one flash memory device in the cache into a plurality of logical partitions. Each of the plurality of logical partitions is a logical subdivision of one of the at least one flash memory device and comprises a plurality of memory pages. Data are buffered in a buffer. The data includes data to be cached, and data to be destaged from the cache to a storage subsystem. Data to be cached are written from the buffer to the at least one flash memory device. A processor coupled to the buffer is provided with access to the data written to the at least one flash memory device from the buffer, and a location of the data written to the at least one flash memory device within the plurality of logical partitions. The data written to the at least one flash memory device are destaged from the buffer to the storage subsystem.

Abstract: An apparatus, system, and method are disclosed to manage solid-state storage media by determining one or more configuration parameters for the solid-state storage media. A media characteristic module references one or more storage media characteristics for a set of storage cells of solid-state storage media. A configuration parameter module determines a configuration parameter for the set of storage cells based on the one or more storage media characteristics. A storage cell configuration module configures the set of storage cells to use the determined configuration parameter.

Abstract: In memory system in which the processing unit (30) performs input/output of data in a plurality of memory circuits (10-0-10-3) through a memory bus (20-0), a memory interface circuit (14) is provided. The memory interface device (14) collects specification information of the plurality of memory circuits (10-0˜10-3), creates and stores a common specification information and is connected to the control bus (22-0) of the processing unit (30).

Abstract: A storage controller receives a request that corresponds to an access of a track. A determination is made as to whether the track corresponds to data stored in a solid state disk. Record staging to a cache from the solid state disk is performed, in response to determining that the track corresponds to data stored in the solid state disk, wherein each track is comprised of a plurality of records.

Abstract: A method and apparatus for managing address map information are disclosed. In one embodiment, an apparatus may comprise a processor configured to store address map changes to a first data storage medium, save the address map changes to a nonvolatile data storage medium when an abnormal power state is detected, and when the power state is no longer abnormal retrieve the last saved address map information and address map changes and update the address map information using the address map changes. The apparatus may be configured to retrieve the instructions for the processor operation over a network connection.

Abstract: A media management system including an application layer, a system layer, and a solid state drive (SSD) storage layer. The application layer includes a media data analytics application configured to assign a classification code to a data file. The system layer is in communication with the application layer. The system layer includes a file system configured to issue a write command to a SSD controller. The write command includes the classification code of the data file. The SSD storage layer includes the SSD controller and erasable blocks. The SSD controller is configured to write the data file to one of the erasable blocks based on the classification code of the data file in the write command. In an embodiment, the SSD controller is configured to write the data file to one of the erasable blocks storing other data files also having the classification code.

Abstract: A method for storing data and an electronic apparatus using the same are provided. Only data is written to a memory card when the electronic apparatus wants to store the data to the memory card. And file information and location information corresponding to the data stored in the memory card are recorded into a buffer block of the electronic apparatus. After a file closing action is executed, the file information and the location information recorded in the buffer block are written to the memory card.

Abstract: Methods and apparatus for a solid state non-volatile storage sub-system of a computer is provided. The storage sub-system may include a write-many storage sub-system memory device including write-many memory cells, a write-once storage sub-system memory device including write-once memory cells, and a page-based interface that is adapted to read and write the write-once and write-many storage sub-system memory devices. Numerous other aspects are provided.

Abstract: A storage system including: a plurality of storage devices; a volatile memory which temporarily stores data; a nonvolatile memory; a battery saving power; a cache control unit which sets, according to battery charging rate of the battery, a part of the data stored in the volatile memory as save target data which are to be saved to the nonvolatile memory when power interruption occurs, and saves the part of the data, which is set as the save target data, to the nonvolatile memory by using power of the battery when power interruption occurs.

Abstract: A solid state drive (SSD) including a storage that includes a plurality of flash memories configured to be independently drivable and a controller to receive an input/output (I/O) request from a host, to split the I/O request into a plurality of sub-requests each having a size configured to be capable of being processed independently by each flash memory, and to process the I/O request based on the sub-requests.

Abstract: An apparatus for writing data to and dispensing one or more of solid-state devices is enclosed. A preferred device herein comprises a write port engageable with a solid-state storage device within a chamber via a hopper. The chamber is further provided for holding the solid-state storage device as the solid-state storage device engages with the write port. Additionally a transfer assembly is provided for moving the solid-state storage device from the chamber to dispense the solid-state storage device.

Abstract: A method for data storage in a memory that includes a plurality of analog memory cells includes estimating respective achievable storage capacities of the analog memory cells. The memory cells are assigned respective storage configurations defining quantities of data to be stored in the memory cells based on the estimated achievable capacities. The data is stored in the memory cells in accordance with the respective assigned storage configurations. The achievable storage capacities of the analog memory cells are re-estimated after the memory has been installed in a host system and used for storing the data in the host system. The storage configurations are modified responsively to the re-estimated achievable capacities.

Abstract: In some embodiments, a non-volatile cache memory may include a segmented non-volatile cache memory configured to be located between a system memory and a mass storage device of an electronic system and a controller coupled to the segmented non-volatile cache memory, wherein the controller is configured to control utilization of the segmented non-volatile cache memory. The segmented non-volatile cache memory may include a file cache segment, the file cache segment to store complete files in accordance with a file cache policy, and a block cache segment, the block cache segment to store one or more blocks of one or more files in accordance with a block cache policy, wherein the block cache policy is different from the file cache policy.

Abstract: A program executing apparatus, includes : a nonvolatile memory that stores a program for activating an equipment and a variable used in the program and sustains the stored program and the variable even though power is not supplied, the program and the variable being able to be read out and written into the nonvolatile memory; and an executing unit that transmits the program and the variable to the nonvolatile memory when the activation of the equipment is instructed at an initial status where the program and the variable are not stored in the nonvolatile memory, and successively executes the program using the variable stored in the nonvolatile memory, and, when the activation of the equipment is re-instructed, executes the program using the variable stored in the nonvolatile memory.

Abstract: The present disclosure relates to the drift management for a memory device. In at least one embodiment, the memory device of the present disclosure may include a phase change memory and switch (hereinafter “PCMS”) memory cell and a memory controller that is capable of implementing drift management to control drift. Other embodiments are described and claimed.

Abstract: An apparatus, system, and method are disclosed for managing data with an empty data segment directive at the storage device. The apparatus, system, and method for managing data include a write request receiver module and a data segment token storage module. The write request receiver module receives a storage request from a requesting device. The storage request includes a request to store a data segment in a storage device. The data segment includes a series of repeated, identical characters or a series of repeated, identical character strings. The data segment token storage module stores a data segment token in the storage device. The data segment token includes at least a data segment identifier and a data segment length. The data segment token is substantially free of data from the data segment.

Abstract: A method for operating a memory controller is disclosed. The method includes receiving data output from a memory block of a non-volatile memory device and changing erase count of the memory block based on the received data.

Abstract: A memory erasing method and a memory controller and a memory storage apparatus using the same are provided. The memory erasing method includes following steps. Physical blocks of a rewritable non-volatile memory module of the memory storage apparatus are logically grouped into at least a data area and a spare area. After the memory storage apparatus is powered on, an erase mark is configured for each of the physical blocks in the spare area, and each of the erase marks is initially set to an unerased state. After the memory storage apparatus enters a standby state, whether an erase command is executed on the physical blocks in the spare area is determined according to the erase marks. Thereby, the memory erasing method can effectively shorten the time for the memory storage apparatus to enter the standby state after the memory storage apparatus is powered on.

Abstract: A storage device and a method of accessing a status thereof are provided. The storage device is disposed in a host. The device data structure field of the storage device is adapted to record the status of the non-volatile memory. The control module is adapted to access the status according to a control signal from the host. Therefore, the operating system or the application of the host is capable of getting the status of the non-volatile memory to ensure the safety of the stored data.