Memory Configuring Patents (Class 711/170)
  • Patent number: 11868643
    Abstract: The memory sub-systems of the present disclosure selects, for memory scans, a memory block which has a highest page fill ratio. In one embodiment, the memory sub-system identifies a number of block stripes located on a logical unit (LU) identified by a logical unit number (LUN), where the LU is one of a plurality of LUs of a memory device. The sub-system determines a fill ratio for each of the plurality of block stripes. The sub-system selects, among the block stripes, a block stripe with a highest fill ratio. The sub-system identifies, from the selected block stripe, a memory block of the LU. The sub-system performs a memory scan operation on the memory block of the memory device.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: January 9, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Alex J. Wesenberg, Johnny A. Lam, Michael Winterfeld
  • Patent number: 11868249
    Abstract: A method, performed by an electronic device, includes: based on a target event associated with an application being initiated, transmitting initiation of the target event to a runtime environment of the application, and after transmitting the initiation of the target event to the runtime environment, based on a memory value allocated to the application exceeding a threshold value for determining whether to initiate a garbage collection, skipping performing the garbage collection and updating a bound memory value, defined in the garbage collection, and the threshold value.
    Type: Grant
    Filed: August 3, 2022
    Date of Patent: January 9, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kwanhee Jeong, Hyojong Kim
  • Patent number: 11862236
    Abstract: In a memory component programmed to operate in a first operating mode and having a page buffer and a fixed-width data interface, N bits of a command/address value are decoded to access one of 2N columns of data within the page-buffer, with that column of data output via the fixed-width data interface over a first burst interval. If programmed to operate in a second operating mode, M bits of the command/address value are decoded to access a larger column of data—one of 2M columns of data within the page buffer, where M<N—with that larger column of data output via the fixed-width data interface over a second burst interval longer than the first burst interval.
    Type: Grant
    Filed: January 31, 2022
    Date of Patent: January 2, 2024
    Assignee: Rambus Inc.
    Inventors: Frederick A. Ware, John Eric Linstadt, Kenneth L. Wright
  • Patent number: 11861174
    Abstract: Examples described herein relate to prioritizing read input/output (IO) queues in non-volatile memory express (NVME) storage devices. An NVME controller includes a host port, which may be associated with a host and communicate with NVME storage devices. A utilization time of the host port is determined. In response to determining that the utilization time of the host port is below a host port utilization threshold, the NVME controller may create a candidate list of NVME storage devices based on utilizations, throughputs, busy time periods, and IO request completions of the NVME storage devices. For each NVME storage device included in the candidate list, a number of read requests in a read IO queue at the NVME storage device may be determined. A priority rank may be assigned to the read IO queue at each NVME storage device based on the number of read requests in that read IO queue.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: January 2, 2024
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Shyamsundar Narasimhan
  • Patent number: 11861201
    Abstract: A method, computer program product, and computer system for maintaining a back pointer from a physical layer block (PLB) to a virtual layer block (VLB) in a multi-level hierarchical file system. A generation number may be maintained in the VLB, wherein the generation number may indicate when data is moved from the PLB to another PLB. An object may be reconstructed in the multi-level hierarchical file system based upon, at least in part, at least one of the back pointer and the generation number.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: January 2, 2024
    Assignee: EMC IP Holding Company, LLC
    Inventors: Rohit K. Chawla, Bijayalaxmi Nanda, Dixitkumar Vishnubhai Patel, Alexander S. Mathews, Soumyadeep Sen
  • Patent number: 11861199
    Abstract: Techniques are provided for data management across a persistent memory tier and a file system tier. A block within a persistent memory tier of a node is determined to have up-to-date data compared to a corresponding block within a file system tier of the node. The corresponding block may be marked as a dirty block within the file system tier. Location information of a location of the block within the persistent memory tier is encoded into a container associated with the corresponding block. In response to receiving a read operation, the location information is obtained from the container. The up-to-date data is retrieved from the block within the persistent memory tier using the location information for processing the read operation.
    Type: Grant
    Filed: July 24, 2022
    Date of Patent: January 2, 2024
    Assignee: NetApp, Inc.
    Inventors: Ananthan Subramanian, Matthew Fontaine Curtis-Maury, Ram Kesavan, Vinay Devadas
  • Patent number: 11860711
    Abstract: Methods and apparatus for rebuilding and storing data in a storage network that includes a plurality of storage units. In an embodiment, a processing module(s) of storage network identifies a storage error associated with a data object stored in a first storage unit of a set of storage units. In response, the processing module obtains storage network configuration information associated with the data object, and rebuilds the data object to produce a rebuilt data object. The processing module further identifies, based on the storage network configuration information, a candidate storage unit(s) for storage of the rebuilt data object and determines an available storage capacity level of the candidate storage unit. In response to determining that the available storage capacity level of the candidate storage unit is sufficient to store the rebuilt data object, the processing module facilitates storage of the rebuilt data object in the candidate storage unit.
    Type: Grant
    Filed: May 30, 2022
    Date of Patent: January 2, 2024
    Assignee: Pure Storage, Inc.
    Inventors: Jason K. Resch, Ravi V. Khadiwala, Wesley B. Leggette
  • Patent number: 11861204
    Abstract: A storage system includes a management node and multiple storage nodes. Each storage node includes a first storage device of a first type (e.g., DRAM) and a second storage device of a second type (e.g., SCM), and a performance level of the first storage device is higher than the second storage device. The management node creates a globe cache including a first tier comprising the first storage device in each storage node, and a second tier comprising the second storage device in each storage node. The first tier is for storing data with a high access frequency, and the second tier is for storing data with a low access frequency. The management node monitors an access frequency of target data stored in the first tier. When the access frequency of the target data is lower than a threshold, the management node instructs the first storage node to migrate the target data from the first tier to the second tier of the globe cache.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: January 2, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Wenlin Cui, Keji Huang, Peng Zhang, Siwei Luo
  • Patent number: 11860669
    Abstract: The invention introduces a method, an apparatus and a non-transitory computer program product for storing data in flash memory. The method is performed by a processing unit when loading and executing program code of a flash translation layer to include: dividing storage space of a flash module into a first region and a second region; programming data belonging to a first partition type received from a host side into first physical blocks of the first region only; and programming data belonging to a second partition type received from the host side into the first physical blocks of the first region and the second physical blocks of the second region. With the region division and the policy for writing data into the regions in terms of data characteristics of different partition types, storage space of the flash module would be used more effective.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: January 2, 2024
    Assignee: SILICON MOTION, INC.
    Inventor: Kuan-Yu Ke
  • Patent number: 11860735
    Abstract: A processing system of a storage network operates by: receiving a write request to store a data object; selecting a selected memory type of a plurality of memory types to store the data object, based on object parameters associated with the data object; selecting a selected memory to store the data object, the selected memory having the selected memory type of the plurality of memory types; and facilitating storage of the data object in the selected memory having the selected memory type of the plurality of memory types, wherein the data object is dispersed error encoded and stored as a plurality of encoded data slices.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: January 2, 2024
    Assignee: Pure Storage, Inc.
    Inventors: Andrew D. Baptist, Wesley B. Leggette, Jason K. Resch
  • Patent number: 11853584
    Abstract: A method including, responsive to receiving a request identifying a volume and indicating a command to take a snapshot of the volume, mapping a second logical grouping of data to reference the first logical grouping of data, and remapping the first volume to map to the second logical grouping of data instead of the first logical grouping of data such that the first volume remains addressable with similar access permissions before and after creating the snapshot. The method also includes, in response to receiving a write request targeting the second logical grouping, splitting the second logical grouping into a plurality of ranges including a first range and a second range; wherein the first range of the second logical grouping maps to the first logical grouping, and the write request is performed on the second range of the second logical grouping.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: December 26, 2023
    Assignee: PURE STORAGE, INC.
    Inventors: John Colgrove, Ethan Miller, John Hayes, Cary Sandvig, Christopher Golden, Jianting Cao
  • Patent number: 11853799
    Abstract: An initialization data memory space allocation system includes a memory system having a memory space that includes an initialization data bucket that reserves a contiguous subset of the memory space for initialization data. Each initialization engine that is coupled to the memory system is configured during initialization operations to allocate, for that initialization engine, a portion of the contiguous subset of the memory space reserved by the initialization data bucket, and then store initialization data in that portion of the contiguous subset of the memory space reserved by the initialization data bucket. A runtime engine that is coupled to the memory system is configured, during runtime operations, to claim the contiguous subset of the memory space reserved for initialization data by the initialization data bucket for runtime data, and store runtime data in at least a portion of the contiguous subset of the memory space.
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: December 26, 2023
    Assignee: Dell Products L.P.
    Inventors: Wei Liu, Karl W. Rasmussen
  • Patent number: 11853169
    Abstract: A data protection system configured to backup a time series database is provided. The data protection system may be integrated with or have access to consolidation policies of the time series database. The backup policy and backup retention policy are set by monitoring the consolidation policy and adjusting the backup policy to ensure that the data in the time series database is protected prior to being downscaled, discarded or otherwise consolidated.
    Type: Grant
    Filed: November 2, 2022
    Date of Patent: December 26, 2023
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Kfir Wolfson, Assaf Natanzon, Jehuda Shemer
  • Patent number: 11853563
    Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to receive key value (KV) pair data from a host device, where the KV pair data includes a key and a value, determine whether the KV pair data corresponds to a first tier or a second tier, where the second tier has a lower performance requirement than the first tier, and program the value of the KV pair data as padding data when the KV pair data corresponds to the second tier. The determining is based on a received hint of the KV pair data, a relative performance of the KV pair data, and a length of the KV pair data. The controller is configured reclassify the KV pair data based on a read frequency of the KV pair data.
    Type: Grant
    Filed: June 17, 2022
    Date of Patent: December 26, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: David Avraham, Alexander Bazarsky, Ran Zamir
  • Patent number: 11855998
    Abstract: Embodiments are directed towards a system and method for a cloud-based front end that may abstract and enable access to the underlying cloud-hosted elements and objects that may be part of a multi-tenant application, such as a search application. Search objects may be employed to access indexed objects. An amount of indexed data accessible to a user may be based on an index storage limit selected by the user, such that data that exceeds the index storage limit may continue to be indexed. Also, one or more projects can be elastically scaled for a user to provide resources that may meet the specific needs of each project.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: December 26, 2023
    Assignee: SPLUNK INC.
    Inventors: Robin Kumar Das, Ledio Ago, Declan Gerald Shanaghy, Gaurav Gupta
  • Patent number: 11853559
    Abstract: Improving the runtime and discovery recovery performance for cloud-based logical volume management systems when performing mirror write operations. A mirror write consistency check (MWCC) policy that incorporates aspects of Active MWCC policies and Passive MWCC policies are utilized to more efficiently ensure that data is properly mirrored from a first copy of a logical volume to the second copy of a logical volume (as well as to potentially multiple other copies of the logical volume).
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: December 26, 2023
    Assignee: International Business Machines Corporation
    Inventors: Lakshmi Yadlapati, Veena Ganti, Rui Yang, Virginia Ann Wigginton
  • Patent number: 11847619
    Abstract: At least some example embodiments provide a system-state monitoring method and device and a storage medium. The method includes determining a standard operation mode of a system, the standard operation mode including a plurality of operation states of the system in a unit time period. The method further includes determining, according to current operation data of the system, a current operation mode of the system and determining, by comparing the current operation mode with the standard operation mode, whether or not the system is in the standard operation mode. The plurality of operation states of the system are determined to be the standard operation mode, such that changes in system operation patterns can be readily detected, thereby facilitating a timely adjustment of the monitored system or peripheral mechanisms in cooperation therewith and improving system performance.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: December 19, 2023
    Assignee: SIEMENS LTD., CHINA
    Inventors: Lin Fei Zhou, Xiao Liang, Jing Li, Daniel Schneegass
  • Patent number: 11847330
    Abstract: Embodiments of the present disclosure generally relate to storage devices, such as SSDs. A data storage device comprises an encrypted interface, one or more flash memory devices, and a controller configured to receive one or more workloads of data through the encrypted interface. Upon a threshold being met, the controller performs a diagnosis of one or more operating parameters of the one or more workloads of data. Based on the diagnosis, the data storage device is optimized by recalibrating one or more of: a partitioning of bits per cell of the one or more flash memory devices, one or more flash management parameters of the data storage device, and a programming rate of the storage device.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: December 19, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Yuval Bahar, Avichay Haim Hodes, Alexander Bazarsky
  • Patent number: 11847320
    Abstract: A method of operating a storage system is disclosed. The method includes determining a storage cluster among storage arrays of the storage system. Each storage array includes at least two controllers and at least one storage shelf. The at least two controllers are configured to function as both a primary controller for a first storage array and a secondary controller for a second storage array.
    Type: Grant
    Filed: December 19, 2022
    Date of Patent: December 19, 2023
    Assignee: PURE STORAGE, INC.
    Inventor: Ori Shalev
  • Patent number: 11849186
    Abstract: A data storage device and method for enabling metadata-based seek points for media access are provided. In one embodiment, a data storage device is provided comprising a memory and a controller. The controller is configured to identify a plurality of frames in video data that differ from surrounding frames by more than a threshold amount; store identifiers of the plurality of frames in the memory; and send the identifiers to the host to enable quick playback of the video data by the host. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.
    Type: Grant
    Filed: June 14, 2022
    Date of Patent: December 19, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ramkumar Ramamurthy, Ramanathan Muthiah
  • Patent number: 11847034
    Abstract: Techniques are describe herein for associating storage management properties with a group of files of a database referred to herein as a “file group”. In this system, storage management properties are defined at the database-level. Thus, multiple databases can be stored across a single disk group, gaining the benefits of having multiple block access devices working in parallel, but each respective database may be associated with a respective file group in a one-to-one relationship, so that each database can have different storage management properties.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: December 19, 2023
    Assignee: Oracle International Corporation
    Inventors: Hanlin D. Chien, Prasad V. Bagal, Harish Nandyala, Ana L. Solis, Santhosh Selvaraj
  • Patent number: 11847030
    Abstract: According to one embodiment, a method identifies a plurality of parameters associated with one or more virtual machines to be backed up to a backup storage system and a number of available backup proxy sessions. The method further assigns each of the available backup proxy sessions to a virtual disk of the one or more virtual machines based on the plurality of parameters and the number of available backup proxy sessions. The method then initiates backup operations, wherein each assigned backup proxy session is to back up a corresponding virtual disk to which it is assigned.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: December 19, 2023
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Sharath Talkad Srinivasan, Smitha Prakash Kalburgi
  • Patent number: 11847346
    Abstract: A method, computer program product, and computing system for receiving data for storage in a storage system. The data may be written to a head entry of a log buffer, wherein the log buffer includes a plurality of data entries for flushing to the storage system. At least a portion of the plurality of data entries of the log buffer may be flushed, via a plurality of threads, to the storage system based upon, at least in part, a tail entry of the log buffer. A queue of committed data entries may be updated, via each thread of the plurality of threads, with one or more data entries of the log buffer flushed to the storage system by each thread. A new tail entry of the log buffer may be determined, via a thread of the plurality of threads, based upon, at least in part, the queue of committed data entries.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: December 19, 2023
    Assignee: EMC IP Holding Company, LLC
    Inventors: Nimrod Shani, Ronen Gazit, Uri Shabi
  • Patent number: 11848834
    Abstract: A monitoring system for mapping and monitoring inter-application communications in a computing ecosystem is described. The monitoring system provides consolidated visibility to computing ecosystems by providing end-to-end mapping and monitoring of inter-application communications and events, changes, incidents, and status information of applications, services, and systems. As described, the monitoring system is configured to (a) identify communication paths linking the host devices, (b) generate an ecosystem map based on the communication paths, (c) transmit a monitoring signal to the network, (d) receive a monitoring response from the host devices in response to the monitoring signal including at least a first status, (e) process the monitoring response with the ecosystem map to generate an active ecosystem map, and (f) display the active ecosystem map including the host devices and at least one status associated with the host devices.
    Type: Grant
    Filed: July 18, 2022
    Date of Patent: December 19, 2023
    Assignee: Express Scripts Strategic Development, Inc.
    Inventors: Michael D. Trapani, Scott H. Reid, Jason T. Graklanoff, Matthew M. Heck
  • Patent number: 11841782
    Abstract: A semiconductor device includes a data bus, a data memory, a selector, a processor, and a debug controller. The selector is configured to be controlled by the debug controller to be in either a first selecting state in which the processor transmits a first signal to the data bus and a second selecting state in which the debug controller transmits a second signal to the data bus. The debug controller is configured to control the state of the selector based on the reception state of a predetermined command from an external device as well as the states of a read enable signal and a write enable signal from the processor such that, when the selector is in the second selecting state, the debug controller accesses the data bus via the selector.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: December 12, 2023
    Assignee: Rohm Co., Ltd.
    Inventor: Takahiro Nishiyama
  • Patent number: 11842778
    Abstract: A memory device includes a memory block including a plurality of pages, a peripheral circuit configured to perform a first program operation for storing first page data and a second program operation for storing second page data after the first program operation, a status register configured to store status information, a cache program operation controller configured to control the peripheral circuit to load the second page data from an external controller when the first program operation is being performed, and a status register controller configured to store in the status register first failure information indicating whether the first program operation passes, store in the status register validity information indicating whether the first failure information is valid information within a predetermined time period from when the second program operation starts, and provide the external controller with the status information including the first failure information and the validity information.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: December 12, 2023
    Assignee: SK hynix Inc.
    Inventors: Jae Young Lee, Yong Hwan Hong, Byung Ryul Kim
  • Patent number: 11841793
    Abstract: Computing devices, methods, and systems for switch-based free memory tracking in data center environments are disclosed. An exemplary switch integrated circuit (IC), which is used in a switched fabric or a network, can include a processing device and a tracking structure that is distributed with at least a second switch IC. The tracking structure tracks free memory units that are accessible in a first set of nodes by the second switch IC. The processing device receives a request for a number of free memory units. The processing device forwards the request to a node in the first set of nodes that has at least the number of free memory units or forwards the request to the second switch IC that has at least the number of free memory units or responds to the request with a response that indicates that the request could not be fulfilled.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: December 12, 2023
    Assignee: Rambus Inc.
    Inventors: Steven C. Woo, Christopher Haywood, Evan Lawrence Erickson
  • Patent number: 11836045
    Abstract: An electronic control device includes a nonvolatile memory having allocated two storage areas that are exclusively switchable between an active state and an inactive state, the storage area in the active state being used to store a control program to be executed, and the storage area in the inactive state being used as a reserved area for updating the control program. In the electronic control device, when the control program is not updated, arbitrary data is written in the storage area in the inactive state.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: December 5, 2023
    Assignee: Hitachi Astemo, Ltd.
    Inventors: Takahito Fuju, Kenho Ko, Daisuke Teshima
  • Patent number: 11836378
    Abstract: To set an appropriate buffer area in a storage system that performs hierarchical storage management. The storage system includes a storage device that provides a storage pool and a storage management unit that manages the storage pool in a tiered manner. The storage pool is provided with a first tier, a second tier, a third tier, and a third tier buffer which is a buffer area used as a buffer when reading or writing data from or to the third tier which is a buffer target tier. The storage management unit determines a size of the third tier buffer based on an access frequency of the third tier.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: December 5, 2023
    Assignee: HITACHI, LTD.
    Inventors: Takaki Nakamura, Takahiro Yamamoto, Shintaro Ito, Masakuni Agetsuma
  • Patent number: 11836124
    Abstract: Disclosed are embodiments for providing batch performance using a stream processor. In one embodiment, a method is disclosed comprising receiving an event that includes a plurality of fields and extracting needed fields from the plurality of fields. The method then serializes the plurality of fields and generates a new event that includes the set of needed fields and a hidden field, the value of the hidden field comprising the serialized fields. The method then transmits the new event for processing using at least one processing stage of a stream processor. In response, the method reserializes a processed event generated by the stream processor and outputs the reserialized event to a downstream consumer.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: December 5, 2023
    Assignee: YAHOO ASSETS LLC
    Inventors: Michael Pippin, David Willcox, Allie K. Watfa, George Aleksandrovich
  • Patent number: 11836351
    Abstract: A method and a computer program product executed by a processor may include or perform various operations. The operations include periodically reading a wear level for each of a plurality of storage devices operating in a multi-tiered storage system which includes a first storage tier and a second storage tier that is a lower tier than the first storage tier. At least one storage device operates in the first storage tier and at least one storage device operates in the second storage tier. The operations further include identifying a first storage device of the plurality of storage devices that is operating in the first storage tier and has a wear level that is higher than an average wear level for the plurality of storage devices. The operations additionally include causing the first storage device to switch from operating in the first storage tier to operating in the second storage tier.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: December 5, 2023
    Assignee: Lenovo Global Technology (United States) Inc.
    Inventors: Luis Rene Quinones Sepulveda, Paul Klustaitis, Israel Silva Dias
  • Patent number: 11829628
    Abstract: Described is a system for predictive storage policy selection for a cloud-based storage based on backup monitoring. The system may reduce storage costs incurred by a subscriber of a backup service that leverages a cloud-based storage. The system may monitor backup operations and collect backup statistics associated with the resource requirements of performing a backup to a cloud-based storage. To collect such information, the system may execute a specialized monitoring process that works in conjunction with a backup application and/or server. The collected information may be stored as part of a metadata database associated with the object storage. Accordingly, the system may retrieve the information from the metadata database to predict storage costs associated with performing future backup operations. Based on the predicted storage costs, the system may automatically select an appropriate storage policy.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: November 28, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Shelesh Chopra, Sunil Yadav, Amarendra Behera
  • Patent number: 11829619
    Abstract: Methods and apparatus are provided for arbitrating access to, and usage of, various device resources of a data storage device (DSD) configured for Machine Learning with Low-Power. The data storage device may include a TinyML controller with an artificial intelligence (AI) accelerator integrated with a data storage controller on a system-on-a-chip (SoC). The device resources may be, e.g., storage resources such as random access memory (RAM) devices, non-volatile memory (NVM) arrays, and latches formed on NVM dies of the NVM arrays. The resource arbitration may be based, for example, on parameters pertaining to ML operations performed by an ML controller that includes the AI accelerator, such as a turnaround time of an ML epoch or a stage-wise execution time. The resource arbitration is configured to provide for the efficient interleaving of the ML/AI operations performed by the ML controller and data storage operations performed by the data storage controller.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: November 28, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Adarsh Sreedhar, Niraj Srimal, Vimal Jain
  • Patent number: 11831649
    Abstract: Embodiments are directed towards a system and method for a cloud-based front end that may abstract and enable access to the underlying cloud-hosted elements and objects that may be part of a multi-tenant application, such as a search application. Search objects may be employed to access indexed objects. An amount of indexed data accessible to a user may be based on an index storage limit selected by the user, such that data that exceeds the index storage limit may continue to be indexed. Also, one or more projects can be elastically scaled for a user to provide resources that may meet the specific needs of each project.
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: November 28, 2023
    Assignee: SPLUNK INC.
    Inventors: Robin Kumar Das, Ledio Ago, Declan Gerard Shanaghy, Gaurav Gupta
  • Patent number: 11829296
    Abstract: Techniques for cache management involve: determining respective elimination scores of a plurality of entries in a cache based at least in part on compression rates of data blocks corresponding to the plurality of entries, the elimination score being proportional to the compression rate; and removing, from the cache, at least one entry with a relatively low elimination score among the plurality of entries. Such techniques are able to optimize the retention and elimination strategies for entries in a cache, thus increasing payoffs for using the cache.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: November 28, 2023
    Assignee: Dell Products L.P.
    Inventors: Changxu Jiang, Fei Wang
  • Patent number: 11829623
    Abstract: A system can include a memory device, and a processing device, operatively coupled with the memory device, to perform operations of writing a first portion of data to one or more complete translation units of the memory device using a first number of logical levels per memory cell and writing a second portion of the data to one or more incomplete translation units of the memory device using the first number of logical levels per memory cell. The operations can also include writing a third portion of the data to one or more complete translation units of the memory device using a second number of logical levels per memory cell that exceeds the first number of logical levels per memory cell.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: November 28, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Kishore Kumar Muchherla, Ashutosh Malshe, Jianmin Huang, Jonathan S. Parry, Xiangang Luo
  • Patent number: 11829297
    Abstract: A clustered storage system includes a plurality of storage devices, each of which contributes a portion of its memory to form a global cache of the clustered storage system that is accessible by the plurality of storage devices. Cache metadata for accessing the global cache may be organized in a multi-layered structure. In one embodiment, multi-layered structure has a first layer first including a first address array, and the first address array include addresses pointing to a plurality of second address arrays in a second layer. Each second address array in the second layer includes addresses, each of which points to data that has been cached in the global cache.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: November 28, 2023
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Li Wan, Lili Chen, Hongliang Tang, Ning Wu
  • Patent number: 11831714
    Abstract: Disclosed are techniques for programmatically mapping workloads for storage in different classes of a networked computer data storage environment, using a set of rules or data storage hints and properties of the workloads themselves. With the set of data storage hints, metadata sets are assigned to files of the incoming workloads to the networked computer data storage environment based on the properties of the workloads. Then, a target storage class is determined for each file of the workload from the plurality of storage classes present in the networked computer data storage environment. The workload files are then mapped to a logical bucket that is associated with the plurality of storage classes through a shared namespace, with the assigned metadata set for a file cueing the filesystem modules as to which storage class within the logical bucket to direct the various files of the workload to.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: November 28, 2023
    Assignee: International Business Machines Corporation
    Inventors: Krishnasuri Narayanam, Phani Kumar V. U. Ayyagari, Rahul Rahul, Subhojit Roy, Sasikanth Eda
  • Patent number: 11823728
    Abstract: In an embodiment, a memory controller in an integrated circuit may generate refreshes for one or more DRAMs coupled to the integrated circuit according to a refresh rate. The integrated circuit may include one or more temperature sensors. A rate of change of the temperature may be determined from the temperature sensors. If the rate is greater than a threshold, the memory controller may generate refreshes according to a refresh rate specified by the DRAMs. If the rate is less than the threshold, the memory controller may generate refreshes at a reduced refresh rate.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: November 21, 2023
    Assignee: Apple Inc.
    Inventors: Liang Deng, Norman J. Rohrer, Yizhang Yang, Arpit Mittal
  • Patent number: 11822800
    Abstract: Provided are a storage system including a host and a storage device, and an operation method of the storage system. The storage device includes a memory controller and a memory device, where an operation method of the memory controller includes receiving from the host a first mode change request for a folder, which is a unit for managing at least one file, and a logical address of the at least one file, and in response to the first mode change request, rewriting to the memory device first data corresponding to the logical address in a second operating mode, and invalidating first data which is existing data already written to correspond to the logical address and the first data in a first operating mode, wherein the first mode change request sets a data operation speed to a high-speed mode for the at least one file included in the folder.
    Type: Grant
    Filed: June 24, 2022
    Date of Patent: November 21, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyunkyo Oh, Sanghyun Choi, Heewon Lee
  • Patent number: 11822787
    Abstract: The present invention is directed to realize a QoS function in the unit of a virtual volume group existing over a plurality of storage apparatuses. A management system of a storage system forms a virtual volume group by using a plurality of volumes provided by a plurality of storage apparatuses. In the virtual volume group, a QoS setting value including a data input/output amount is set. IO processing ability provided from each of the volumes to the virtual volume group is set so as to satisfy the QoS setting value. The management system sets the IC processing ability provided from each of the volumes to the virtual volume group on the basis of operation information of each of the volumes.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: November 21, 2023
    Assignee: Hitachi, Ltd.
    Inventors: Kenta Sato, Kazuei Hironaka, Takanobu Suzuki, Akira Deguchi
  • Patent number: 11816032
    Abstract: A method includes determining, by a level one (L1) controller, to change a size of a L1 main cache; servicing, by the L1 controller, pending read requests and pending write requests from a central processing unit (CPU) core; stalling, by the L1 controller, new read requests and new write requests from the CPU core; writing back and invalidating, by the L1 controller, the L1 main cache. The method also includes receiving, by a level two (L2) controller, an indication that the L1 main cache has been invalidated and, in response, flushing a pipeline of the L2 controller; in response to the pipeline being flushed, stalling, by the L2 controller, requests received from any master; reinitializing, by the L2 controller, a shadow L1 main cache. Reinitializing includes clearing previous contents of the shadow L1 main cache and changing the size of the shadow L1 main cache.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: November 14, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Abhijeet Ashok Chachad, Naveen Bhoria, David Matthew Thompson, Neelima Muralidharan
  • Patent number: 11816337
    Abstract: A storage system includes one or more data storage devices, a PCIe switch coupled to the one or more data storage devices, and a controller unit coupled to the PCIe switch. The controller unit includes a dynamic random access memory (DRAM) host memory buffer (HMB) controller and a DRAM pool or a controller memory buffer (CMB) controller, a root complex/port, and the DRAM pool. The DRAM pool includes one or more DRAM devices. The one or more data storage devices are configured to interact with the controller unit and store data to a DRAM of the DRAM pool of the controller unit.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: November 14, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Judah Gamliel Hahn, Avichay Haim Hodes, Shay Benisty, Michael James
  • Patent number: 11809379
    Abstract: Embodiments of the present disclosure include a computer-implemented method, a computer program product, and a system for storing data based, at least partially, on the deduplication rates of a storage system within a storage environment. The computer-implemented method includes receiving data to be stored in a storage environment, computing a hash for the received data, and querying storage deduplication agents for statuses of storage systems within the storage environment. The computer-implemented method also includes receiving deduplication rates and hash tables relating to the storage systems from the storage deduplication agents. The computer-implemented method further includes analyzing stored data stored on the storage systems using the deduplication rates and the hash tables and comparing the stored data to the received data.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: November 7, 2023
    Assignee: International Business Machines Corporation
    Inventors: Harry R. McGregor, Shazad Naviwala, Dessa Simpson, Christopher B. Moore
  • Patent number: 11809905
    Abstract: One embodiment provides for a general-purpose graphics processing unit comprising a set of processing elements to execute one or more thread groups of a second kernel to be executed by the general-purpose graphics processor, an on-chip memory coupled to the set of processing elements, and a scheduler coupled with the set of processing elements, the scheduler to schedule the thread groups of the kernel to the set of processing elements, wherein the scheduler is to schedule a thread group of the second kernel to execute subsequent to a thread group of a first kernel, the thread group of the second kernel configured to access a region of the on-chip memory that contains data written by the thread group of the first kernel in response to a determination that the second kernel is dependent upon the first kernel.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: November 7, 2023
    Assignee: Intel Corporation
    Inventors: Valentin Andrei, Aravindh Anantaraman, Abhishek R. Appu, Nicolas C. Galoppo von Borries, Altug Koker, SungYe Kim, Elmoustapha Ould-Ahmed-Vall, Mike Macpherson, Subramaniam Maiyuran, Vasanth Ranganathan, Joydeep Ray, Varghese George
  • Patent number: 11809736
    Abstract: A storage system determines a memory fragmentation level for each of a plurality of logical block address ranges. The memory fragmentation level for a given logical block address range is determined according to the number of memory senses required to read that logical block address range in its current state of fragmentation and the number of memory senses required to read that logical block address range assuming no fragmentation. The memory fragmentation level correlates to the sequential read performance for that logical block address range in that an increase in the memory fragmentation level results in a decrease in sequential read performance.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: November 7, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Einav Zilberstein, Hadas Oshinsky, Maayan Suliman, Karin Inbar
  • Patent number: 11809273
    Abstract: The present invention provides a method for detecting a flash memory module and an associated SoC. The method reads data in a flash memory module with a specific data format, and then determining a plurality of characteristic parameters of the flash memory module and a size of a page by decoding and checking the data. Therefore, the SoC does not need to design a one-time-programmable memory or strap pins, so as to reduce the manufacturing cost of the SoC.
    Type: Grant
    Filed: April 1, 2022
    Date of Patent: November 7, 2023
    Assignee: Realtek Semiconductor Corp.
    Inventors: Jia-Jhe Li, Chia-Liang Hung
  • Patent number: 11809728
    Abstract: Systems and methods for storing data in an intermediate format for storing, converting the intermediate data format into a production data format of two data volumes, and merging the two data volumes into one data volume.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: November 7, 2023
    Assignee: Snyk Sweden AB
    Inventors: Julian Coccia, Daniel Akerud
  • Patent number: 11803338
    Abstract: Executing a machine learning model in an artificial intelligence infrastructure that includes one or more storage systems and one or more graphical processing unit (‘GPU’) servers, including: receiving, by a graphical processing unit (‘GPU’) server, a dataset transformed by a storage system that is external to the GPU server; and executing, by the GPU server, one or more machine learning algorithms using the transformed dataset as input.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: October 31, 2023
    Assignee: PURE STORAGE, INC.
    Inventors: Brian Gold, Emily Potyraj, Ivan Jibaja, Igor Ostrovsky, Roy Kim
  • Patent number: 11803443
    Abstract: A storage apparatus includes a plurality of drives and has a parity group constituted by a plurality of drives. The storage apparatus stores a hash management table to manage hash values of a prescribed data unit of data of the drives constituting the parity group and a hash value of a prescribed data unit of data stored in another drive other than the drives constituting the parity group. A processor is configured to determine whether a same data unit as a data unit included in data stored in a replacement target drive exists in the other drive on a basis of the hash values, and copy the same data unit of the other drive to a replacement destination drive when the same data unit exists.
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: October 31, 2023
    Assignee: HITACHI, LTD.
    Inventor: Shota Fujita