Memory Configuring Patents (Class 711/170)
  • Patent number: 11194639
    Abstract: Embodiments of the present systems and methods may provide additional security mechanisms inside an operating system kernel itself by executing system calls in a dedicated address space to reduce the amount of shared resources that are visible to and thus exploitable by a malicious application. For example, in an embodiment, a method implemented in a computer may comprise a processor, memory accessible by the processor, and computer program instructions stored in the memory and executable by the processor, the method may comprise: when a user process makes a system call, switching to kernel mode and using a system call page table for the user process to execute a system call handler, when the system call handler attempts to access unmapped kernel space memory, generating a page fault, and handling the page fault by determining whether the attempted access to unmapped kernel space memory is allowed.
    Type: Grant
    Filed: May 19, 2019
    Date of Patent: December 7, 2021
    Assignee: International Business Machines Corporation
    Inventors: James Bottomley, Joel Kelly Nider, Michael Rapoport
  • Patent number: 11188246
    Abstract: Techniques are provided for providing a storage abstraction layer for a composite aggregate architecture. A storage abstraction layer is utilized as an indirection layer between a file system and a storage environment. The storage abstraction layer obtains characteristic of a plurality of storage providers that provide access to heterogeneous types of storage of the storage environment (e.g., solid state storage, high availability storage, object storage, hard disk drive storage, etc.). The storage abstraction layer generates storage bins to manage storage of each storage provider. The storage abstraction layer generates a storage aggregate from the heterogeneous types of storage as a single storage container. The storage aggregate is exposed to the file system as the single storage container that abstracts away from the file system the management and physical storage details of data of the storage aggregate.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: November 30, 2021
    Assignee: NetApp Inc.
    Inventors: Ananthan Subramanian, Sriram Venketaraman, Ravikanth Dronamraju, Mohit Gupta
  • Patent number: 11182247
    Abstract: The present disclosure is based on erasure coding, information dispersal, secret sharing and ramp schemes to assure reliability and security. More precisely, the present disclosure combines ramp threshold secret sharing and systematic erasure coding.
    Type: Grant
    Filed: January 29, 2020
    Date of Patent: November 23, 2021
    Assignee: CLOUD STORAGE, INC.
    Inventors: David Yanovsky, Vera Dmitriyevna Miloslavskaya
  • Patent number: 11182089
    Abstract: A computer-implemented method, according to one embodiment, includes: determining whether a number of blocks included in a first ready-to-use (RTU) queue is in a first range of the first RTU queue. In response to determining that the number of blocks included in the first RTU queue is in the first range, a determination is made as to whether a number of blocks included in a second RTU queue is in a second range of the second RTU queue. Moreover, in response to determining that the number of blocks included in the second RTU queue is not in the second range, valid data is relocated from one of the blocks in a first pool which corresponds to the first RTU queue. The block in the first pool is erased, and transferred from the first pool to the second RTU queue which corresponds to a second pool.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: November 23, 2021
    Assignee: International Business Machines.Corporation
    Inventors: Roman Alexander Pletka, Radu Ioan Stoica, Sasa Tomic, Nikolaos Papandreou, Nikolas Ioannou, Aaron Daniel Fry, Timothy Fisher, Charalampos Pozidis, Andrew D. Walls
  • Patent number: 11182076
    Abstract: Embodiments for managing unequal workloads between Network Shared Disks (NSD) in a networked computing environment by a processor. Additional space may be carved out from at least one of a plurality of NSDs in a cluster file system, upon detecting an unbalanced load between the plurality of NSDs, while maintaining a predetermined level of usage according to a performance profile of the plurality of NSDs.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: November 23, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Vernon W. Miller, Richard A. Welp
  • Patent number: 11176031
    Abstract: In a computer system, an automatic memory management module operates by receiving, from a mutator, memory allocation requests for particular objects to be stored in a random-access memory and allocating particular logical addresses within a logical address space to the particular objects. The automatic memory management module distinguishes the particular objects according to at least one criterion and allocates logical addresses from a first sub-space and logical addresses from a second sub-space. A memory management unit maps the allocated logical addresses from the second sub-space to physical memory in the random-access memory. The logical addresses within the first sub-space are compacted in combination with moving corresponding objects in the random-access memory.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: November 16, 2021
    Assignee: aicas GmbH
    Inventor: Fridtjof Siebert
  • Patent number: 11176089
    Abstract: Representative embodiments set forth herein disclose techniques for implementing dynamic file system volumes that can share storage space with other file system (FS) volumes within the same partition/storage device. According to some embodiments, techniques are disclosed for establishing an FS volume within a container. According to other embodiments, techniques are disclosed for handling input/output (I/O) requests across different FS volumes. According to yet other embodiments, techniques are disclosed for efficiently establishing, within a storage device, an FS volume from an image of the FS volume.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: November 16, 2021
    Assignee: Apple Inc.
    Inventors: John Garvey, Michael S. Mackovitch, Peter J. Rutenbar
  • Patent number: 11175998
    Abstract: An information processing apparatus performs a backup process to store backup target data on a deduplication storage device configured to eliminate duplicate storage by referring to previously stored data having the same content. The apparatus includes a calculation unit configured to calculate the capacity after deduplication that is performed by storing the backup target data in the deduplication storage device, each time the backup process is performed, and a determination unit configured to determine whether the backup target data is normal or abnormal, based on the capacity calculated each time the backup process is performed.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: November 16, 2021
    Assignee: NEC CORPORATION
    Inventor: Jiajun Gu
  • Patent number: 11169866
    Abstract: Various embodiments relate to a method for detecting a memory leak and an electronic device thereof, the electronic device including a processor, and a memory operatively connected to the processor, wherein the memory stores instructions which, when executed by the processor, control the electronic device to: acquire usage information for the memory of a process executed by the processor based on a collection period determined based at least partially on a characteristic of the process; identify a change pattern of a usage amount for the memory of the process based on the usage information; and determine whether a memory leak occurs based on the change pattern of the usage amount.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: November 9, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sangjun Park, Sungdo Moon, Mooyoung Kim
  • Patent number: 11169816
    Abstract: In certain embodiments, a method includes starting an application as a first process within a user space of an operating system. The application instantiates a key-value store and a file system associated with the operating system. The method also includes managing, by a block device service running within the user space, one or more first data blocks of a persistent storage allocated to the key value store and one or more second data blocks of the persistent storage allocated to the file system. In addition, the method includes receiving, by a kernel of the operating system, a system call request comprising an access request generated by the key-value store or the file system. The method further includes granting, by the block device service, and in response to the access request, the key value store or the file system access to the one or more first or second data blocks.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: November 9, 2021
    Assignee: Facebook Technologies, LLC
    Inventors: Andrew M. Rogers, Arthur Zwiegincew
  • Patent number: 11169901
    Abstract: A process in a system can monitor available free storage space on a storage device, and, based on preset log file parameters, can act upon log files being stored on or written to the storage device to keep the storage device from running out of storage space due to excessive logging. The process monitors the device free space as reported by the file system to determine space utilization. A threshold of free space can be specified as a parameter. A log file action can also be specified as a parameter and is an action designed to reduce the space being used by a log file or log files. Once the process recognizes that the free space is under the threshold it will perform the configured action.
    Type: Grant
    Filed: May 6, 2019
    Date of Patent: November 9, 2021
    Assignee: Red Hat, Inc.
    Inventors: Michael Kolesnik, Mordechay Asayag
  • Patent number: 11169968
    Abstract: Computer program products, as well as corresponding systems and methods are configured for performing deduplication in conjunction with random read and write operations, and include: computing a fingerprint of data included in a write request; determining whether a short term dictionary comprises an entry corresponding to the fingerprint; in response to determining the short term dictionary comprises the entry corresponding to the fingerprint, writing the data to a data store in a deduplicating manner; in response to determining the short term dictionary does not comprise the entry, determining whether a long term dictionary corresponding to the namespace comprises the entry; in response to determining the long term dictionary comprises the entry, writing the data to the data store in the deduplicating manner; and in response to determining the long term dictionary does not comprise the entry, writing the data to the data store in a non-deduplicating manner.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: November 9, 2021
    Assignee: International Business Machines Corporation
    Inventors: David D. Chambliss, Joseph S. Glider, Danny Harnik, Ety Khaitzin
  • Patent number: 11164607
    Abstract: An information handling system may include a processor and a storage subsystem. The storage subsystem may include a non-expander backplane, a first plurality of storage resources coupled to the processor via the non-expander backplane, and a second plurality of storage resources coupled to the processor via a communication path that does not include the non-expander backplane. The information handling system may be configured to provide slot numbers for the storage resources according to a numbering scheme in which a storage resource from the first plurality of storage resources and a storage resource from the second plurality of storage resources have the same slot number.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: November 2, 2021
    Assignee: Dell Products L.P.
    Inventors: Chandrashekar Nelogal, Heerak Sudhir Kumar Surti
  • Patent number: 11163452
    Abstract: Technologies are described to perform workload based device access. An input-output (IO) request received from an application. An application profile for the application is determined. Based on the application profile, one or more IO parameter values to access a device are set. The device is accessed based on the one or more IO parameter values to fulfill the IO request.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: November 2, 2021
    Assignee: Elastic Flash Inc.
    Inventors: Darshan Bharatkumar Rawal, Monish Kumar Suvarna, Naoki Iwakami
  • Patent number: 11163496
    Abstract: Techniques for updating persistent statistics on a multi-transactional and multi-node storage system. The techniques can be practiced in a distributed storage system including a plurality of storage nodes. Each storage node can include a persistent storage configured to accommodate a set of delta counter pages, as well as a global counter page for summarizing delta count values tracked by respective delta counters. The techniques can include, in each storage node, tracking, by each of a set of delta counters, changes to delta count values due to storage node operations performed on units of data storage, and summarizing, periodically or at least at intervals, the delta count values of the respective delta counters as global count values. The techniques can further include summarizing the global count values across the respective storage nodes in a count summarization report and sending the count summarization report to a client via a communications interface.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: November 2, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Philippe Armangau, Vamsi K. Vankamamidi, Yubing Wang, Ajay Karri
  • Patent number: 11157176
    Abstract: Systems, devices, and methods related to on demand memory page size are described. A memory system may employ a protocol that supports on demand variable memory page sizes. A memory system may include one or more non-volatile memory devices that may each include a local memory controller configured to support variable memory page size operation. The memory system may include a system memory controller that interfaces between the non-volatile memory devices and a processor. The system memory controller may, for instance, use a protocol that facilitates on demand memory page size where a determination of a particular page size to use in an operation may be based on characteristics of memory commands and data involved in the memory command.
    Type: Grant
    Filed: May 22, 2019
    Date of Patent: October 26, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Duane R. Mills, Richard E. Fackenthal
  • Patent number: 11150840
    Abstract: A method for pinning selected volumes within a heterogeneous cache is disclosed. The method maintains a heterogeneous cache made up of a higher performance portion and a lower performance portion. A list of pinned volumes is received that are provided higher priority than other volumes within the heterogeneous cache. The method dedicates, within the lower performance portion, a storage area to accommodate the pinned volumes and prestages the pinned volumes within the storage area. In certain embodiments, an LRU list is maintained that indicates an order in which storage elements of the pinned volumes are demoted from the storage area. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: February 9, 2020
    Date of Patent: October 19, 2021
    Assignee: International Business Machines Corporation
    Inventors: Lokesh M. Gupta, Matthew G. Borlick, Kevin J. Ash, Beth A. Peterson
  • Patent number: 11150940
    Abstract: A transaction recording method associated with a page-oriented non-volatile memory is disclosed. The method includes identifying page requiring one or more update for implementing a defined transaction. Further, the method includes replicating the page in a non-volatile buffer. The method further includes updating the identified page with the transaction contents. The transaction is committed if the page is updated without interruption else the entire transaction is rolled-back.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: October 19, 2021
    Assignee: IDEMIA
    Inventors: Mrityunjay Kumar, Mohammad Ovais Siddiqui
  • Patent number: 11144508
    Abstract: In one embodiment, a deduplicating storage system includes a processor and logic integrated with and/or executable by the processor. The logic is configured to cause the processor to perform a method which includes: computing a fingerprint of a data chunk, and determining whether a short term dictionary corresponding to the namespace comprises an entry corresponding to the fingerprint. In response to determining the short term dictionary does not comprise the entry, a determination is made whether a long term dictionary corresponding to the namespace comprises the entry. In response to determining the long term dictionary comprises the entry: the data chunk is written to the data store in the deduplicating manner, and the short term dictionary is repopulated with the entry. Moreover, in response to determining the long term dictionary does not comprise the entry, the data chunk is written to the data store in a non-deduplicating manner.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: October 12, 2021
    Assignee: International Business Machines Corporation
    Inventors: David D. Chambliss, Joseph S. Glider, Danny Harnik, Ety Khaitzin
  • Patent number: 11137927
    Abstract: Methods, computing systems and computer program products implement embodiments of the present invention that include defining multiple storage capabilities for a set of storage resources in multiple storage systems, the storage resources including storage space, and identifying two of the storage systems including one or more storage capabilities required by a first logical volume. A first given identified storage system is configured to store the first logical volume, and a second given identified storage system is configured to store a second logical volume, the second given storage system different from the first given storage system. Upon storing data to the first logical volume, the data can be mirrored to the second logical volume. In some embodiments, a software defined storage system can be configured including defined services, wherein the first given storage system includes a first given service, and wherein the second given storage system includes a second given service.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: October 5, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Miron Aloni, Ohad Atia, Amelia Avraham, Shay Berman, Ran Harel, Erez A. Theodorou
  • Patent number: 11132130
    Abstract: In a computer system with a hybrid memory architecture consisting of a volatile main memory and a non-volatile main memory, there are provided a segment cleaning method for a storage file system and a memory management apparatus for implementing the same, the segment cleaning method comprising: selecting a victim segment in storage; copying valid blocks in the victim segment to the volatile main memory; and moving the copied valid blocks to the non-volatile main memory. This can effectively overcome cleaning overhead, thereby improving the I/O performance of applications and increasing the lifetime of storage.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: September 28, 2021
    Assignee: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
    Inventors: Young Ik Eom, Jong Gyu Park
  • Patent number: 11132313
    Abstract: A data conversion control apparatus, comprising: at least one first interface each for coupling a first external interface, both of the first interface and the first external interface being in accordance with a predetermined physical interface standard, wherein data transmitted between the first interface and the first external interface is in accordance with a configurable application layer protocol; at least one second interface each for coupling a second external interface, wherein the second external interface is a memory interface in accordance with a predetermined memory interface standard, and the second interface is configurable to match the predetermined memory interface standard; and a data rebuild unit coupled between the at least one first interface and the at least one second interface, wherein the data rebuild unit is configured to rebuild data such that data can be transmitted in respective formats between the at least one first interface and the at least one second interface.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: September 28, 2021
    Assignee: MONTAGE TECHNOLOGY CO., LTD.
    Inventors: Gang Shan, Yi Li, Howard Chonghe Yang
  • Patent number: 11126562
    Abstract: A memory system includes a memory device suitable for storing L2P map data including a logical address of an external device and a physical address of a memory device corresponding to the logical address, and a controller suitable for storing at least a portion of the L2P map data and state information of the L2P map data, and controlling data input/output of the memory device, wherein, when a write request, write data and a first physical address with a first logical address are received from an external device, the controller performs a write operation for the write request on a second physical address to which a logical address is not assigned, and invalidates the first physical address, and the controller transmits a first acknowledgement, which does not include the second physical address, to the external device, after completely performing the write operation.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: September 21, 2021
    Assignee: SK hynix Inc.
    Inventor: Jong-Hwan Lee
  • Patent number: 11119668
    Abstract: Techniques are provided for managing incompressible data in a compression-enabled log-structured array storage system. A log-structured array is implemented in a block storage device having a physical storage space divided into logical data blocks (e.g., fixed-size allocation units), wherein the log-structured array includes a log segment which includes a set of contiguous logical data blocks of the physical storage space. When a write request is received to store data, if the received data is deemed compressible, the data is compressed and written in a log entry in the log segment of the log-structured array. If the data is deemed incompressible, the data is written without compression in a log entry in the log segment of the log-structured array such that the log entry which stores the data without compression is write-aligned to at least one logical data block of the set of contiguous logical data blocks of the log segment.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: September 14, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Itay Keller, Nir Milstein
  • Patent number: 11120081
    Abstract: A key-value storage device includes a non-volatile memory and a controller. A method of operating the key-value storage device includes: receiving, from a host, information regarding at least one of a random region, comprising random bits, and a non-random region each included in a key; receiving, from the host, a first command including a first key; generating, based on the received information, a mapping index of a mapping table from first bits, the first bits corresponding to at least some of the random bits included in the first key; and controlling an operation for the non-volatile memory, according to the first command, by using the mapping table.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: September 14, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Ju-Pyung Lee
  • Patent number: 11113192
    Abstract: A method of dynamically adjusting sizes of cache partitions includes, for each cache partition, estimating a number of hits that would occur on the cache partition for a set of potential size increases of the cache partition and a set of potential size decreases of the cache partition. Based on these estimates, a determination is made for each cache partition, whether to increase the size of the cache partition, maintain a current size of the cache partition, or decrease the size of the cache partition. Cache partition size increases are balanced with cache partition size decreases to allocate the entirety of the cache to the set of cache partitions without over allocating cache resources and while optimizing a sum of total cache hit rates of the set of cache partitions. A set of data structures is used to efficiently determine the estimated hit increases and decreases for each cache partition.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: September 7, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Hugo de Oliveira Barbalho, Jonas Furtado Dias
  • Patent number: 11113069
    Abstract: A method for implementing of a quick-release Variable Length Vector (VLV) memory access array in the technical field of software programs, which includes the following steps: Step 1: when a pipeline restarts to refresh an out-of-order queue each time, and the number of sending an entry recorded in a sending counter of the entry is equal to the number of returning the entry recorded in a returning counter of the entry, an ID of the entry is kept unchanged, and the ID is used for a next pushed request; Step 2: when the pipeline restarts to refresh the out-of-order queue each time, the number of sending the entry recorded in the sending counter is not equal to the number of returning the entry recorded in the returning counter and mirror resources are not exhausted, the existing entry is released, the ID, the sending counter and the returning counter of the entry are copied to another structure, and N IDs, each of which is in a non-busy status are selected from a free list, and a busy bit of each of the N IDs is
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: September 7, 2021
    Assignee: HUAXIA GENERAL PROCESSOR TECHNOLOGIES INC.
    Inventors: Xiaolong Fei, Lei Wang
  • Patent number: 11113629
    Abstract: An embodiment includes a method for use in managing a system comprising one or more computers, each computer comprising at least one hardware processor coupled to at least one memory, the method comprising a computer-implemented manager: generating a potential configuration for hardware resources of the system; determining whether the potential configuration satisfies accuracy and time constraints for a selected machine learning model; if the potential configuration satisfies the constraints, indicating the potential configuration to be the optimal configuration for the system; and if the potential configuration does not satisfy the constraints, adapting the potential configuration to satisfy the constraints. The adapting may comprise repeating the generating and determining steps. The adapting may be based at least in part on the hardware resources and the selected machine learning model.
    Type: Grant
    Filed: December 31, 2017
    Date of Patent: September 7, 2021
    Assignee: International Business Machines Corporation
    Inventors: Hitham Ahmed Assem Aly Salama, Teodora Sandra Buda, Faisal Ghaffar, Lei Xu
  • Patent number: 11112987
    Abstract: Techniques for processing data may include: receiving a candidate block; performing partial deduplication processing of the candidate block; receiving a second candidate block subsequent to performing partial deduplication processing for the candidate block; and performing first processing to determine whether to perform promotion processing for the entry, The partial deduplication processing may include: partially deduplicating at least one sub-block of the candidate block; and creating an entry in a deduplication database for the candidate block, wherein the entry includes a digest of the candidate block and the entry denotes a potential target block having the digest, and wherein the entry includes a counter that tracks a number of missed full block deduplications between the potential target block and subsequently processed candidate blocks. The promotion processing promotes the potential target block, having the first digest of the entry, to a new target block.
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: September 7, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Istvan Gonczi, Philippe Armangau, Sorin Faibish, Ivan Bassov
  • Patent number: 11113001
    Abstract: In some examples, fabric driven NVMe subsystem zoning may include receiving, from a non-volatile memory express (NVMe) Name Server (NNS), a zoning specification that includes an indication of a host that is to communicate with a given NVMe subsystem of an NVMe storage domain. Based on the zoning specification, the host may be designated as being permitted to connect to the given NVMe subsystem of the NVMe storage domain. An NVMe connect command may be received from the host. Based on the designation and an analysis of the NVMe connect command, a connection may be established between the given NVMe subsystem of the NVMe storage domain and the host.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: September 7, 2021
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Asutosh Satapathy, Komateswar Dhanadevan, Krishna Babu Puttagunta, Vivek Agarwal, Rupin T. Mohan, Govind Chandru Rathod
  • Patent number: 11106500
    Abstract: A method, apparatus and computer program product for managing memories of computing resources is disclosed. In the method, a computing task processed by a first computing resource in a group of computing resources is determined. In response to a second memory of a second computing resource other than the first computing resource in the group of computing resources being allocated to the computing task, a second access speed with which the first computing resource accesses the second memory is determined. A target computing resource is selected from the group of computing resources based on an access speed with which the first computing resource accesses a target memory of the target computing resource, where the access speed is higher than the second access speed. At least one part of data in the second memory is migrated to the target memory.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: August 31, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Junping Zhao, Kun Wang
  • Patent number: 11108892
    Abstract: A method for reducing a number of copies required to send a data sample with a Data Distribution Service (DDS) type in a system using an Object Management Group (OMG) Data Distribution Service (DDS) and a Real-Time Publish Subscribe (RTPS) protocol is provided. Key to the invention is the definition/creation of a memory representation of the data samples for the DDS type that is equal to the network representation of the data samples for the DDS type. Sending of data samples to the DataReader is accomplished without making a serialization copy of the data samples, and for the receiving the data samples from the DataWriter is accomplished without making a deserialization copy of the data samples. Further, a method is provided for accessing to a network representation of data samples with a DDS type in a system using an OMG DDS and a RTPS protocol.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: August 31, 2021
    Assignee: Real-Time Innovations, Inc.
    Inventors: Alejandro de Campos Ruiz, Harishkumar Umayi Kalyanaramudu, Gerardo Pardo-Castellote, Fernando Crespo Sanchez
  • Patent number: 11106501
    Abstract: A method comprising: allocating a first memory pool and a second memory pool, the first memory pool being allocated to a first application, and the second memory pool being allocated to a second application; receiving a first request for additional memory, the first request being submitted by the second application; assigning a portion of the first memory pool to the second application, the portion of the first memory pool including a set of memory chunks that are part of the first memory pool, the assigning of the portion including updating a first data structure portion to associate the second application with set of memory chunks; and notifying the second application that the portion of the first memory pool has been assigned to the second application.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: August 31, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Michael L. Burriss, Wai Yim, William K. McGrath, Tharani McGuinness, Earle MacHardy
  • Patent number: 11106490
    Abstract: Context switch by changing memory pointers. A determination is made that a context switch is to be performed from a first context to a second context. Data of the first context is stored in one or more configuration state registers stored at least in part in a first memory unit and data of the second context is stored in one or more configuration state registers stored at least in part in a second memory unit. The context switch is performed by changing a pointer from the first memory unit to the second memory unit.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: August 31, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Patent number: 11108866
    Abstract: Method, devices and computer programs for a dynamic management of a first server application on a first server platform of a telecommunication system are disclosed wherein a further server application is operating or installable on the first server platform or a further server platform. The first server platform has a maximum processing capacity and a capacity fraction of the maximum processing capacity is assignable to the first server application reserving the capacity fraction for processing the first server application. A determination of a required processing capacity for processing at least one of the first server application and the further server application, an analysis of the required processing capacity for an assignment of the capacity fraction to the first server application, and an assignment of the capacity fraction are performed.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: August 31, 2021
    Assignee: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL)
    Inventors: Heino Hameleers, Frank Hundscheidt
  • Patent number: 11106519
    Abstract: Disclosed are devices and methods for improved operations of a memory device. In one embodiment, a method is disclosed comprising periodically recording memory statistics of a dynamic random-access memory in a device, while the device is in a power on state; detecting a command to enter a standby state; analyzing the memory statistics to determine whether a health check should be performed; powering down the device when determining that the health check should be performed; and placing the device in standby mode when determining that the health check should not be performed.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: August 31, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Gil Golov
  • Patent number: 11106389
    Abstract: The present disclosure describes data transfer in a memory device from sensing circuitry to controller. An example apparatus includes a controller coupled to a memory device. The controller is configured to execute a command to transfer data from a latch component to a register file in the controller. The memory device includes an array of memory cells and the latch component is coupled to rows of the array via a plurality of columns of the memory cells. The latch component includes a latch selectably coupled to each of the columns and configured to implement the command to transfer the data. The memory device includes a data line to couple the latch component to the register file to transfer the data. The controller is configured to couple to the data line and the register file to perform a write operation on the transferred data to the register file in the controller.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: August 31, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Patrick A. La Fratta, James J. Shawver
  • Patent number: 11100004
    Abstract: A processor uses the same virtual address space for heterogeneous processing units of the processor. The processor employs different sets of page tables for different types of processing units, such as a CPU and a GPU, wherein a memory management unit uses each set of page tables to translate virtual addresses of the virtual address space to corresponding physical addresses of memory modules associated with the processor. As data is migrated between memory modules, the physical addresses in the page tables can be updated to reflect the physical location of the data for each processing unit.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: August 24, 2021
    Assignees: ADVANCED MICRO DEVICES, INC., ATI TECHNOLOGIES ULC
    Inventors: Gongxian Jeffrey Cheng, Mark Fowler, Philip J. Rogers, Benjamin T. Sander, Anthony Asaro, Mike Mantor, Raja Koduri
  • Patent number: 11093295
    Abstract: A data processing system includes at least one pooled memory node, at least one processing node, and a switch node coupled to the at least one pooled memory node and the at least one processing node. The data processing system also includes a master node configured to transmit task information to a first processing node among the at least one processing node through the switch node and configured to transmit a memory address range of a first pooled memory node among the at least one pooled memory node to the switch node. The switch node processes a first memory access request transmitted by the first processing node based on the task information, for the first pooled memory node, based on the memory address range.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: August 17, 2021
    Assignee: SK hynix Inc.
    Inventor: Soo Hong Ahn
  • Patent number: 11093386
    Abstract: The technology described herein is directed towards consolidating garbage collection of data stored in data structures such as chunks, to facilitate efficient garbage collection. Low capacity utilization chunks are detected as source chunks, and live data of an object (e.g., in segments) is copied from the source chunks to new destination chunk(s). A source chunk is deleted when it no longer contains live data. By copying the data on an object-determined basis, new chunks contain more coherent object data, which increases the possibility of future chunk deletion without data copying or with a reduced amount of copying. When data segments of an object are adjacent, the consolidating garbage collector may unite them into a united segment, which reduces an amount of system metadata per object. New chunks can be associated with a generation number (e.g., indicating the oldest previous generation) to further facilitate more efficient future chunk deletion.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: August 17, 2021
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Mikhail Danilov, Konstantin Buinov
  • Patent number: 11093403
    Abstract: The disclosure provides a technique for reducing cache misses to a cache of a computer system. The technique includes deallocating memory pages of the cache from one process and allocating those memory pages to another process based on cache misses of each process during a given time period. Repeating the technique leads the total number of cache misses to the cache to gradually decrease to an optimum or near optimum level. The repetition of the technique leads to a dynamic and flexible apportionment of cache memory pages to processes running within the computer system.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: August 17, 2021
    Assignee: VMware, Inc.
    Inventors: Wenguang Wang, Abhishek Srivastava, Ashish Kaila, Julien Freche
  • Patent number: 11086776
    Abstract: A method of maintaining correctness of pointers from a managed heap to off-heap memory includes storing in a cache a first heap object in a managed heap that holds at least one off-heap pointer pointing to a first off-heap data structure and creating a weak reference node linked to the first heap object such that the first heap object is not kept alive by the weak reference node during garbage collection. Further disclosed are systems for maintaining correctness of pointers from a managed heap to off-heap memory.
    Type: Grant
    Filed: August 29, 2018
    Date of Patent: August 10, 2021
    Assignee: International Business Machines Corporation
    Inventors: Bjoern Vaardal, Daniel Heidinga, Graham Chapman
  • Patent number: 11086558
    Abstract: A storage system in one embodiment comprises a plurality of storage devices and a storage controller. The storage controller is configured to receive a delete instruction for a storage volume, and responsive to receipt of the delete instruction, to suspend any further changes to address metadata for the storage volume, to transfer the address metadata for the storage volume to persistent storage, and to delete the storage volume while also at least temporarily maintaining its data pages. The storage controller subsequently receives an undelete instruction for the deleted storage volume, and responsive to receipt of the undelete instruction, retrieves the address metadata from persistent storage and recovers the storage volume utilizing the address metadata. An expiration timer may be started in conjunction with the deletion of the storage volume, and responsive to the undelete instruction being received after a specified expiration time of the expiration timer, the undelete instruction is rejected.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: August 10, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Anton Kucherov, David Meiri
  • Patent number: 11079939
    Abstract: Examples include distribution of I/O Q-connections of an NVMe™ subsystem among hosts that are to communicate with the NVMe™ subsystem in an NVMe™ zone of a system. Some examples receive information including a number of I/O Q-connections available at the NVMe™ subsystem, register the number of available I/O Q-connections of the NVMe™ subsystem with an NVMe™ fabric controller, determine a number of I/O Q-connections of the NVMe™ subsystem allowed to be used by each host and send to, each host, a first notification including the number of allowed I/O Q-connections of the NVMe™ subsystem to be used by the host.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: August 3, 2021
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Krishna Babu Puttagunta, Rupin Tashi Mohan
  • Patent number: 11080216
    Abstract: A method of communicating messages between a plurality of modules in a system on a vehicle, each module of the plurality of modules implemented on at least one processor and configured as a publisher node and/or a subscriber node and collectively forming a plurality of nodes that communicate in the operation of the vehicle. The method may include generating a first message associated with a first topic by a first publisher node, writing, by the first publisher node, the first message in a memory location in a first message buffer of the plurality of message buffers, the first message buffer associated with the first topic and configured to store a plurality of messages associated with the first topic, and writing in a registry information associated with writing the first message, the registry configured to store location information of the first message.
    Type: Grant
    Filed: February 21, 2020
    Date of Patent: August 3, 2021
    Assignee: Beijing Voyager Technology Co., Ltd.
    Inventors: Yuzhu Shen, Alok Priyadarshi
  • Patent number: 11075745
    Abstract: Disclosed herein are methods, systems, and apparatus, including computer programs encoded on computer storage media, for storing blockchain data. One method includes receiving a request from an application component of a blockchain node to execute one or more software instructions in a trusted execution environment (TEE); determining one or more blockchain node blocks for executing the one or more software instructions; performing error correction coding of the one or more blocks in the TEE to generate one or more encoded blocks; dividing each of the one or more encoded blocks into a plurality of datasets; selecting one or more datasets from each of the one or more encoded blocks; and hashing the one or more datasets to generate one or more hash values corresponding to the one or more datasets for use in replacing the one or more datasets to save storage space of the blockchain node.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: July 27, 2021
    Assignee: Advanced New Technologies Co., Ltd.
    Inventor: Haizhen Zhuo
  • Patent number: 11068502
    Abstract: Software Defined Network Attached Storage data backup is implemented using storage array synchronous data replication. A TLU is created for each user filesystem managed by a Virtual Data Mover (VDM). A VDM configuration filesystem is also created containing metadata describing a mapping of user file system TLU to physical storage resources on the storage array. Both the user filesystem TLUs and the VDM configuration filesystem are mapped to an asynchronous Remote Data Forwarding (RDF) group of the storage array, which is used by the storage array to replicate both the user filesystem TLUs and VDM configuration filesystem. Filesystem ID and export path information are reserved on the primary storage array and backup storage array when the RDF group is set up, to enable transparent failover from the primary to the backup node of selected VDMs.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: July 20, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Ajay Potnis, Adnan Sahin, Michael Specht, Bharadwaj Sathavalli, Shampavman Chenjeri Gururajarao, Maneesh Singhal
  • Patent number: 11055259
    Abstract: A method for deleting obsolete files from a file system is provided. The method includes receiving a request to delete a reference to a first target file of a plurality of target files stored in a file system, the first target file having a first target file name. A first reference file whose file name includes the first target file name is identified. The first reference file is deleted from the file system. The method further includes determining whether the file system includes at least one reference file, distinct from the first reference file, whose file name includes the first target file name. In accordance with a determination that the file system does not include the at least one reference file, the first target file is deleted from the file system.
    Type: Grant
    Filed: February 5, 2019
    Date of Patent: July 6, 2021
    Assignee: Google LLC
    Inventors: Yasushi Saito, Sanjay Ghemawat, Jeffrey A. Dean
  • Patent number: 11057331
    Abstract: Methods, systems, and devices supporting global message threads are described. A thread server may receive a communication message associated with a first set of user identifiers (e.g., the author and recipients of the message) and may extract a thread identifier from the message. The thread identifier may associate the message with one or more additional messages (e.g., from the same thread of messages), where the one or more additional messages may be associated with different user identifiers. The thread server may upsert the received communication message to a stored set of messages associated with a root indicating the thread identifier. If the thread server receives a query indicating the thread identifier from a user, the thread server may retrieve all of the messages associated with the thread identifier from persistent memory based on the query, including messages that are not associated with the user identifier for the querying user.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: July 6, 2021
    Assignee: salesforce.com, inc.
    Inventors: Narek Asadorian, Noah William Burbank
  • Patent number: 11042451
    Abstract: A method for recovering modified data lost from cache includes maintaining, in a cache of a primary storage system, a destage data structure indicating which modified data in the cache has been destaged. The method further maintains, in cache of a secondary storage system, a change recording data structure indicating which modified data has been replicated from the primary storage system to the secondary storage system. The method further merges the destage data structure with the change recording data structure to yield an updated change recording data structure. In the event modified data in the cache of the primary storage system is lost, the method utilizes the updated change recording data structure to determine which modified data in the secondary storage system is needed to restore the modified data lost from cache at the primary storage system. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: June 22, 2021
    Assignee: International Business Machines Corporation
    Inventors: Gang Lyu, Yicheng Feng, Feng Shao, Si Cong Zhou