Memory Configuring Patents (Class 711/170)
  • Patent number: 11375014
    Abstract: Clustered containerized applications are implemented with scalable provisioning. Methods include receiving a data storage request to store one or more data values in a storage volume implemented across a storage node cluster, the storage node cluster including a plurality of storage nodes including one or more storage devices having storage space allocated for storing data associated with the storage volume. Methods may further include identifying a cluster hierarchy associated with the storage node cluster, the cluster hierarchy identifying storage characteristics of the plurality of storage nodes, the cluster hierarchy also identifying physical location information for the plurality of storage nodes, the physical location information indicating node-to-node proximity on a network graph.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: June 28, 2022
    Assignee: Portworx, Inc.
    Inventors: Goutham Rao, Vinod Jayaraman, Ganesh Sangle
  • Patent number: 11366735
    Abstract: A storage management subsystem monitors usage of the data stored by a data storage system. Based at least in part on the monitored usage of the stored data, a storage profile is determined for the stored data. The storage profile indicates a first time period during which a first portion of the stored data is anticipated to be accessed and a second portion of the stored data is not anticipated to be accessed and a second time period during which the first portion of the stored data is not anticipated to be accessed. During at least the first time period, the first portion of the data is stored in a decompressed format and the second portion of the data is stored in a compressed format. During at least the second time period, the first portion of the data is stored in the compressed format.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: June 21, 2022
    Assignee: Bank of America Corporation
    Inventors: Jane Selegean, Lokeshvar Iyanar, Ram Vignesh Suresh
  • Patent number: 11360917
    Abstract: An operation method of a storage device configured to implement physical functions respectively corresponding to hosts includes receiving performance information from each of the host devices, setting a performance level of each of the physical functions to a first level, processing a command from a first host through a corresponding first physical function, changing a performance level of the first physical function to a second level based on the performance information and a performance serviced to the first host, and processing a second command from a second host through at least one second physical function corresponding to the second host prior to processing a subsequent first command from the first host, through the first physical function, based on a performance level of the at least one second physical function being the first level and the performance level of the first physical function being the second level.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: June 14, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Youngwook Kim, Jinwoo Kim, Myung Hyun Jo
  • Patent number: 11360938
    Abstract: A request to access to a logical location in a file stored in a content addressable storage (CAS) system can be handled by retrieving first tree data from a first node in a hash tree that represents the file, the first tree data including a first hash tree depth, a first CAS signature, a block size and a file size. Based on the tree data, a second node is selected from a higher level in the hash tree. Second tree data from the second node of the hash tree that represents the file is retrieved, including a second CAS signature. The second CAS signature is determined to match a reserved CAS signature, and in response, an indication that the requested logical location is unallocated within the file is provided.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: June 14, 2022
    Assignee: International Business Machines Corporation
    Inventors: Ahmed Gheith, Eric Van Hensbergen, James Xenidis
  • Patent number: 11360707
    Abstract: A memory controller includes a first flash translation layer (FTL) generating a physical address corresponding to a first type logical address received from a host on the basis of information about the first memory blocks, a second FTL generating a physical address corresponding to a second type logical address received from the host on the basis of information about the second memory blocks, and a memory control unit controlling the first memory area or the second memory area to perform an operation on the physical address corresponding to the first type logical address or the physical address corresponding to the second type logical address, wherein the first FTL provides the second FTL with block request information for requesting use of the second memory blocks, and generates the physical address corresponding to the first type logical address received from the host on the basis of block allocation information provided by the second FTL.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: June 14, 2022
    Assignee: SK hynix Inc.
    Inventors: Dong Young Seo, Da Young Lee, Woo Young Yang
  • Patent number: 11362807
    Abstract: A system for ensuring privacy of transactions is provided. The system may be performed by a computing system during execution of trusted code within a secure enclave of the computing system. The system receives an indication of a transaction. The system validates the transaction. The system encrypts the validated transaction using an encryption key of the trusted code. The system requests untrusted code of the computing system to store the encrypted validated transaction in a portion of a data store. The untrusted code cannot decrypt the encrypted validated transaction that is stored in the data store. Rather, only the trusted code can decrypt the encrypted validated transaction.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: June 14, 2022
    Assignee: R3 LLC
    Inventor: Michael Christopher Hearn
  • Patent number: 11347641
    Abstract: Snapshot metadata may include a plurality of pages of nodes, including active nodes and free nodes. It may be determined whether a snapshot metadata object is eligible for de-allocation, for example, of one or more of the pages of its snapshot metadata nodes. This determination may be based on a number of free nodes in the snapshot metadata object, for example, in relation to the quantity of nodes that are included in a snapshot metadata page. This determination may be made based on previous usage of the nodes allocated to the snapshot metadata object, for example, the number of active nodes relative to a total size of the snapshot metadata object. For example, a maximum extent of active nodes during one or more periods may be compared to a current extent of active nodes to determine whether the snapshot metadata object is eligible.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: May 31, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Jeffrey Wilson, Michael Ferrari, Shruti Gupta, George F. Lettery
  • Patent number: 11334267
    Abstract: A disclosed method may include (1) detecting one or more requests for a memory chunk of a specific size on a computing device, (2) determining that the computing device has yet to implement a memory pool dedicated to fixed memory chunks of the specific size, (3) computing an amount of memory that is potentially wasted in part by satisfying the one or more requests from an existing memory pool dedicated to fixed memory chunks of a different size, (4) determining that the amount of memory that is potentially wasted exceeds a waste threshold, and then in response to determining that the amount of memory that is potentially wasted exceeds the waste threshold, (5) creating an additional memory pool dedicated to fixed memory chunks of the specific size on the computing device. Various other apparatuses, systems, and methods are also disclosed.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: May 17, 2022
    Assignee: Juniper Networks, Inc
    Inventors: Amit Kumar Rao, Erin C. MacNeil, Finlay Michael Graham Pelley
  • Patent number: 11327852
    Abstract: A live migration/high availability system includes a first computing system having a first SCP subsystem coupled to first computing system components and a first hypervisor subsystem that provides a first virtual machine. Each time the first SCP subsystem receives snapshot commands from the hypervisor subsystem, it retrieves respective SCP component state information that was not retrieved in response to a previous snapshot command from each first SCP component included in the first SCP subsystem, and uses the respective SCP component state information to generate a respective SCP subsystem snapshot based on that snapshot command. The first SCP subsystem then transmits the SCP subsystem snapshots to a second SCP subsystem in a second computing system, and the second SCP subsystem uses the SCP subsystem snapshots to allow a second hypervisor subsystem on the second computing system to provide a second virtual machine that operates the same as the first virtual machine.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: May 10, 2022
    Assignee: Dell Products L.P.
    Inventors: William Price Dawkins, Robert W. Hormuth, Elie Jreij, Gaurav Chawla, Mark Steven Sanders, Jimmy D. Pike
  • Patent number: 11321237
    Abstract: This disclosure provides techniques hierarchical address virtualization within a memory controller and configurable block device allocation. By performing address translation only at select hierarchical levels, a memory controller can be designed to have predictable I/O latency, with brief or otherwise negligible logical-to-physical address translation time. In one embodiment, address transition may be implemented entirely with logical gates and look-up tables of a memory controller integrated circuit, without requiring processor cycles. The disclosed virtualization scheme also provides for flexibility in customizing the configuration of virtual storage devices, to present nearly any desired configuration to a host or client.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: May 3, 2022
    Assignee: Radian Memory Systems, Inc.
    Inventors: Robert Lercari, Alan Chen, Mike Jadon, Craig Robertson, Andrey V. Kuzmin
  • Patent number: 11320992
    Abstract: A peripheral digital storage device has an interface allowing a connection to a self-service machine for performing maintenance operation to the self-service machine. The device provides a storage area divided into a set of partitions which are interpretable by the self-service machine as independent storage areas for file operation when connected to the self-service machine. A control unit which is configured to control the access to the partitions by refusing or granting the self-service machine an access to the partition depending on identity information receivable from the self-service machine for providing access to individual partitions for each assigned self-service machine connectable to the interface.
    Type: Grant
    Filed: May 22, 2019
    Date of Patent: May 3, 2022
    Assignee: Wincor Nixdorf International GmbH
    Inventor: Carsten von der Lippe
  • Patent number: 11314428
    Abstract: A file system in a storage system can store files received from a host in clusters of memory in the storage system. An end portion of a file may not use the entire cluster. As a result, the end clusters of the stored files can contain unused space. A system and method detects the unused space in such clusters and creates a virtual cluster from the unused space.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: April 26, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Narendhiran Chinnaanangur Ravimohan, Kavya Bathula
  • Patent number: 11308010
    Abstract: A memory system includes a memory controller, a first memory, and a second memory. The memory controller has a command address port, a chip select port, a first data port, and a second data port. The first memory is coupled to the command address port, the chip select port, and the first data port, and the second memory is coupled to the command address port, the chip select port, and the second data port. The capacity of the second memory is greater than the capacity of the first memory. The memory controller controls the first memory and the second memory simultaneously through the command address port and the chip select port.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: April 19, 2022
    Assignee: Realtek Semiconductor Corp.
    Inventor: Ya-Min Chang
  • Patent number: 11308986
    Abstract: In an approach to automatically reconciling data in HSM without affecting system performance, responsive to migrating a file on a hierarchical storage system from a primary storage to one or more tape drives, one or more file migration records are recorded in a reconcile database. Responsive to the occurrence of a file event on the primary storage, the one or more file migration records in the reconcile database are updated. Responsive to receiving a command to unmount a first mounted tape on one of the one or more tape drives, a reconcile function is performed on the first mounted tape, wherein the reconcile function updates the first mounted tape with the one or more file migration records in the reconcile database.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: April 19, 2022
    Assignee: International Business Machines Corporation
    Inventors: Hiroshi Araki, Takeshi Ishimoto, Hiroyuki Miyoshi, Atsushi Abe
  • Patent number: 11301159
    Abstract: A storage system includes at least one drive chassis connected to at least one host computer via a first network, and a storage controller connected to the drive chassis, in which the storage controller instructs the drive chassis to create a logical volume, and the drive chassis creates a logical volume according to an instruction from the storage controller, provides a storage area of the storage system to the host computer, and receives an IO command from the host computer to the storage area of the storage system.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: April 12, 2022
    Assignee: HITACHI, LTD.
    Inventors: Hirotoshi Akaike, Koji Hosogi, Norio Shimozono, Sadahiro Sugimoto, Nobuhiro Yokoi, Ryosuke Tatsumi
  • Patent number: 11294720
    Abstract: A memory/multi-core concurrent memory allocation method, which is applied to an embedded system, wherein a kernel module and a plurality of application programs are provided. The memory allocation method comprises: acquiring first memory allocation requests of the plurality of application programs; the kernel module determining whether preset screening marks exist in the first memory allocation requests; when screening marks exist in the first memory allocation requests, prohibiting allocating memory for the current application program managed by a contiguous memory allocator. By adopting the memory allocation method, the application programs which occupy contiguous memory allocated by the continuous memory allocator for a long time can be screened and removed, then contiguous memory allocation can be provided for the drivers in a shorter time, and the corresponding contiguous continuous memory can be allocated for the drivers through a plurality of processing units at the same time with a higher efficiency.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: April 5, 2022
    Assignee: AMLOGIC (SHANGHAI) CO., LTD.
    Inventor: Tao Zeng
  • Patent number: 11294698
    Abstract: Notification about Virtual Machine Live Migration to VNF Manager Various network systems may benefit from receiving notification about virtual live migration. For example, clustered telecommunication applications may benefit from live migration notifications of their virtual machines (VM). Such benefits may be achieved through technology known as Network Function Virtualization (NFV). According to certain embodiments, a method includes deciding that a virtual network function component should be moved from a first host to a second host. The method can also include notifying a virtual network function manager VNF about moving the virtual network function component. The method can further include moving the virtual network function component from the first host to the second host only when approval is received from the virtual network function manager. The method can also include notifying the virtual network function manager that the movement of the virtual network function component has been completed.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: April 5, 2022
    Assignee: NOKIA SOLUTIONS AND NETWORKS OY
    Inventors: Gergely Csatari, Timea Laszlo
  • Patent number: 11294583
    Abstract: Technology for proactively allocating data storage resources to a storage object. A rate at which host I/O operations directed to the storage object are received and/or processed is monitored during a monitored time period, and a high activity time range is identified. An anticipatory time range is defined that is a range of time immediately preceding the high activity time range. During the anticipatory time range within a subsequent time period following the monitored time period, high performance non-volatile storage is allocated to the storage object that is available for processing host I/O operations directed to the storage object at the beginning of and throughout the high activity time range. A low activity time range may also be identified, and lower performance non-volatile storage may be allocated to the storage object within an anticipatory time range immediately preceding the low activity time range.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: April 5, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Nickolay Alexandrovich Dalmatov, Kirill Alexsandrovich Bezugly
  • Patent number: 11287976
    Abstract: Techniques involve: in response to adding a second set of disks into a redundant array of independent disks (RAID) including a first set of disks and a total number of disks in the first and second sets exceeding a predetermined threshold, determining types and numbers of disks in the first and second sets, respectively; determining, based on the types and numbers of the disks determined and a performance indicator of the RAID having the added second set, respective types and numbers of disks comprised in a plurality of sets to which the disks in the RAID are to be allocated; and performing, based on the type and number of disks in the first set and the respective types and numbers of disks, an allocation of a disk in the first set to one of the plurality of sets, until all the disks in the first set have been allocated.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: March 29, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Rongrong Shang, Ruiyong Jia, Shuai Ni, Sihang Xia, Zhenhua Zhao
  • Patent number: 11287987
    Abstract: Methods, systems, and devices for coherency locking are described in which different types of writes have different coherency locking schemes. The types of writes can be associated with different sources of write commands, such as external commands from a host system or internal commands from a garbage collection procedure. Coherency locking can be performed for external write commands received from a host system, while coherency locking is not performed for internal write commands. If an internal write is received for data that has been previously written at a prior location, a write to one or more physical memory devices can be performed and, once an acknowledgment is received that the write is complete, an update to a mapping table with the new location of the data is performed.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: March 29, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Yun Li, John Traver
  • Patent number: 11281578
    Abstract: Systems, apparatuses, and methods related to media management, including “garbage collection,” in memory or storage systems or sub-systems, such as solid state drives, are described. For example, a battery state associated with the memory system or sub-system may be used as an indicator or basis for managing a garbage collection operation on a data block. A controller or the system or sub-system may determine that a battery state or condition satisfies a criterion. Based on determining that the criterion is satisfied the, the garbage collection operation may be postponed until the battery state changes to satisfy a different battery condition.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: March 22, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Aparna U. Limaye, Tracy D. Evans, Tomoko Ogura Iwasaki, Avani F. Trivedi, Jianmin Huang
  • Patent number: 11281392
    Abstract: Systems, apparatuses, and methods related to media management, including “garbage collection,” in memory or storage systems or sub-systems, such as solid state drives, are described. For example, a criticality value can be determined and used as a basis for managing a garbage collection operation on a data block. A controller or the system or sub-system may determine that a criticality value associated with performing a garbage collection operation satisfies a condition. Based on determining that the condition is satisfied, a parameter associated with performing the garbage collection operation can be adjusted. The garbage collection operation is performed on the data block stored on the memory component using the adjusted parameter.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: March 22, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Jianmin Huang, Aparna U. Limaye, Avani F. Trivedi, Tomoko Ogura Iwasaki, Tracy D. Evans
  • Patent number: 11275696
    Abstract: A computing system having memory components, including first memory and second memory. The computing system further includes a processing device, operatively coupled with the memory components, to: store a memory allocation value in association with a context of executing instructions; execute a set of instructions in the context; allocate, for execution of the set of instructions in the context, an amount of memory, including an amount of the first memory and an amount of the second memory; and access the amount of the second memory via the amount of the first memory during the execution of the set of instructions in the context.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: March 15, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Anirban Ray, Parag R. Maharana
  • Patent number: 11269525
    Abstract: Embodiments relate to a system, program product, and method for optimizing the throughput of an archival application through storage volume and file selection and assignment of a finite number of storage controller data movement threads associated with a plurality of storage controllers. Data directed to be transferred from one or more storage controllers to non-cloud-based storage is transferred through standard I/O features. Data directed to be transferred from the storage controllers to cloud object storage devices is managed through an archival application that manages the finite number of storage controller data movement threads to provide efficient and effective transfer of the data.
    Type: Grant
    Filed: January 6, 2020
    Date of Patent: March 8, 2022
    Assignee: International Business Machines Corporation
    Inventors: Glenn Randle Wilcock, Alexsey Redko
  • Patent number: 11269776
    Abstract: Techniques for providing a direct IO path to compressed data on storage media of a storage system. The techniques include triggering a transaction cache to perform a flush operation for updating mapping metadata for a storage object containing the compressed data. Having updated the mapping metadata for the storage object, the techniques further include issuing, by a copier module, an IO read request for the compressed data of the storage object to a namespace layer, which issues the IO read request to a mapping layer. The techniques further include forwarding the IO read request to a logical layer of the mapping layer, bypassing the transaction cache. The techniques further include reading, by the logical layer, the compressed data of the storage object from the storage media, and providing, via the mapping layer and the namespace layer, the compressed data to the copier module for transfer to a destination storage system.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: March 8, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Xiangping Chen, Philippe Armangau, Anton Kucherov, Xunce Zhou, William C. Davenport
  • Patent number: 11269560
    Abstract: There are provided a memory controller and a memory system having the same. The memory controller includes: a temperature monitor device configured to count values that vary according to operation statuses of memory devices; a status check device configured to output status information of the memory devices based on the count values; and a scheduler configured to store the status information according to arrangements of the memory devices, and output the status information in response to a request received from a host.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: March 8, 2022
    Assignee: SK hynix Inc.
    Inventor: Young Jae Jin
  • Patent number: 11269770
    Abstract: Techniques involve managing a storage space. In response to receiving an allocation request for allocating a storage space, a storage space size and a slice size are obtained. A first storage system and a second storage system are selected from multiple storage systems, the first storage system and the second storage system includes a first storage device group and a second storage device group respectively, and the first storage device group does not overlap the second storage device group. A first slice group and a second slice group is obtained from the first storage system and the second storage system respectively, on the basis of the size of the storage space and the size of the slice. A user storage system is built at least on the basis of the first slice group and the second slice group, so as to respond to the allocation request.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: March 8, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Xinlei Xu, Xiongcheng Li, Lifeng Yang, Geng Han, Jian Gao
  • Patent number: 11265231
    Abstract: The disclosed technology includes ranking entities in real-time to show the relative importance of those entities. The ranking is based on attributes of the entities that vary in real-time. An example of an entity is a process (e.g., an executing computer program) and the associated attributes can include the process' current CPU memory consumption. While the process runs, its CPU and memory consumption vary in real-time.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: March 1, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Chi Cao Minh, Jad Naous
  • Patent number: 11263019
    Abstract: A method for generating boot tables for a device having access to device information. It is determined whether there exists at least one system boot table stored in a memory. If it is determined that a system boot table does not exist, the device information is retrieved, and the device information is converted to at least one boot table. The converting includes generating a first boot table by populating the first boot table with information of components of the device that have a correspondence to a computer system boot information standard. The generating also includes generating a second boot table for another component of the device that does not have a correspondence to the computer system boot information standard, by creating an entry in the second boot table that is populated with an identifier used to find a compatible component defined in the computer system boot standard.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: March 1, 2022
    Assignee: VMware, Inc.
    Inventors: Andrei Warkentin, Cyprien Laplace, Ye Li, Alexander Fainkichen, Regis Duchesne
  • Patent number: 11256619
    Abstract: A solution is disclosed for memory management of serverless databases that includes: based at least on detecting a trigger event, determining whether memory is to be reclaimed; based at least on determining that memory is to be reclaimed, determining an amount of memory to be reclaimed; identifying memory to be reclaimed; and reclaiming the identified memory. Disclosed solutions are flexible, enabling customization of the aggressiveness and manner of memory reclamation. This permits users to specify a tailored balance point between performance and cost, for arrangements that bill users based on resource usage (e.g., memory consumed by a serverless database). In some examples, users specify a ramp-down parameter that is used to determine how much memory can be evicted in a particular reclamation event, time intervals (or another criteria) for triggering a reclamation event, and a definition for whether a cache is active.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: February 22, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Manoj Syamala, Arnd Christian König, Vivek Narasayya, Junfeng Dong, Ajay Kalhan, Shize Xu, Changsong Li, Pankaj Arora, Jiaqi Liu, John M. Oslake
  • Patent number: 11256631
    Abstract: This invention relates to the use of dynamic MPU regions to enhance the security and ease of development of multitasking embedded and similar systems.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: February 22, 2022
    Inventor: Ralph Crittenden Moore
  • Patent number: 11249902
    Abstract: A disclosed method may include (1) identifying a memory buffer that is allocated to a packet on a computing device, (2) identifying one or more characteristics of the memory buffer allocated to the packet on the computing device, (3) determining, based at least in part on the characteristics of the memory buffer, that the memory buffer allocated to the packet has leaked, and then in response to determining that the memory buffer has leaked, (4) performing at least one action to remedy the leak of the memory buffer. Various other apparatuses, systems, and methods are also disclosed.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: February 15, 2022
    Assignee: Juniper Networks, Inc
    Inventors: Reji Thomas, Sairam Neelam, Vivek Ramesh, Jimmy Jose
  • Patent number: 11245596
    Abstract: A management system displays a list of elements of some element types from among a plurality of element types, and receives a selection of the two or more elements from the list. The management system displays a topology which is configured of the two or more selected elements and an element (related element) related to the two or more selected elements and in which the two or more selected elements and the related element are segmented by element types.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: February 8, 2022
    Assignee: Hitachi, Ltd.
    Inventors: Shiro Tanoue, Kousuke Shibata, Yuusuke Asai, Tsutomu Fujii
  • Patent number: 11237745
    Abstract: To more effectively eliminate a resource imbalance among storage apparatuses, and shorten the time required for elimination in a computer system including a plurality of storage apparatuses and a computer. In a computer system including a plurality of storage apparatuses that provide a volume to a computer and a storage management device that manages the plurality of storage apparatuses, in a case where there is an instruction to create a new volume, the storage management device compares a distribution of feature amounts of all volumes provided by each storage apparatus and a distribution of feature amounts of all volumes in a case of providing a newly created volume in each storage apparatus, and instructs a storage apparatus having a largest difference in the distributions of the feature amounts to create a volume.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: February 1, 2022
    Assignee: Hitachi, Ltd.
    Inventors: Takaki Nakamura, Hideo Saito, Yoshinori Ohira, Azusa Jin
  • Patent number: 11237772
    Abstract: A data storage system includes multiple data storage units and a zonal control plane. The zonal control plane assigns volumes to respective ones of the data storage units. The data storage units include multiple head nodes and data storage sleds. At least one of the head nodes implements a local control plane for the data storage unit. Also, the head nodes of each data storage unit are configured to service read and write requests directed to one or more volumes serviced by the data storage unit independent of the zonal control plane.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: February 1, 2022
    Assignee: Amazon Technologies, Inc.
    Inventors: Norbert P. Kusters, Nachiappan Arumugam, Christopher Nathan Watson, Marc John Brooker, David R. Richardson, Danny Wei, John Luther Guthrie, II
  • Patent number: 11231861
    Abstract: An apparatus comprises at least one processing device that includes a processor coupled to a memory. The processing device is configured to control delivery of input-output (IO) operations from a host device to at least first and second storage systems over selected ones of a plurality of paths through a network, the first and second storage systems being arranged in an active-active configuration relative to one another. The processing device is further configured to identify one or more logical storage devices that are each accessible via at least first and second different ones of the paths to respective ones of the first and second storage systems, and to modify path selection for IO operations directed to the one or more identified logical storage devices relative to path selection for IO operations directed to one or more other logical storage devices. The processing device illustratively comprises at least a portion of the host device.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: January 25, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Sanjib Mallick, Vinay G. Rao, Arieh Don
  • Patent number: 11232022
    Abstract: A data management method of a data storage device having a data management unit different from a data management unit of a user device receives information regarding a storage area of a file to be deleted, from the user device, selects a storage area which matches with the data management unit of the data storage device, from among the storage area of the deleted file, and performs an erasing operation on the selected storage area which matches with the data management unit.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: January 25, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyojin Jeong, Youngjoon Choi, Sunghoon Lee, Jae-Hyeon Ju
  • Patent number: 11228490
    Abstract: An initial set of one or more data stores is selected for storing configuration data of a first client of a configuration discovery service. Configuration data for various items of the client's computing environment are stored at the initial set for a first time period. A configuration item, whose records were being stored at a first data store, is identified as a candidate for a data store change. Storing of at least some configuration data of the item at a different data store is initiated.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: January 18, 2022
    Assignee: Amazon Technologies, Inc.
    Inventors: Theodore Carroll, Karthikeyan Natarajan, Hariharan Subramanian
  • Patent number: 11226955
    Abstract: A “hybrid derived cache” stores semi-structured data or unstructured text data in an in-memory mirrored form and columns in another form, such as column-major format. The hybrid derived cache may cache scalar type columns in column-major format. The structure of the in-memory mirrored form of semi-structured data or unstructured text data enables and/or enhances access to perform path-based and/or text based query operations. A hybrid derived cache improves cache containment for executing query operations. The in-memory mirrored form is used to compute queries in a transactionally consistent manner through the use of an invalid vector that used to determine when to retrieve the transactionally consistent persistent form of semi-structured data or unstructured text data in lieu of the in-memory form.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: January 18, 2022
    Assignee: Oracle International Corporation
    Inventors: Zhen Hua Liu, Aurosish Mishra, Shasank K. Chavan, Douglas J. McMahon, Vikas Arora, Hui Joe Chang, Shubhro Jyoti Roy
  • Patent number: 11226823
    Abstract: A memory module includes a device controller that communicates with a host device based on a first interface including a first clock signal, a first data signal, and a first data strobe signal and operates in one of a first operation mode or a second operation mode depending on an operation mode control value from the host device, and a memory device that communicates with the device controller based on a second interface including a second data signal and a second data strobe signal. The device controller includes a logic circuit that transmits a predetermined training result value to the host device depending on a training control value from the host device, when a training is performed on a third interface being a virtual interface recognized by the host device in the first operation mode.
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: January 18, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Younho Jeon, Youngjin Cho, Hee Hyun Nam, Hyo-Deok Shin
  • Patent number: 11226769
    Abstract: In a large-scale storage system configured by combining a plurality of storage modules, it is possible to improve a read performance for deduplicated data. A large-scale storage system includes a first storage module and a second storage module each connected to a computing machine, the first storage module and the second storage module being connected to each other by a network, the first controller determines whether second data that is same as first data requested to be written is already stored in the second storage module when the first storage module receives a write request from the computing machine, and the first controller determines whether to store the first data in the first storage medium or to refer to the second data in the second storage module in a case in which the second data is already stored in the second storage module.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: January 18, 2022
    Assignee: HITACHI, LTD.
    Inventors: Nobumitsu Takaoka, Tomohiro Yoshihara, Naoya Okada
  • Patent number: 11221946
    Abstract: A data arrangement method, a memory storage device and a memory control circuit unit are provided. The data arrangement method includes: receiving a command from a host, and the command includes a data range; calculating a data disarranged degree according to a logical estimated value of a plurality of logical block addresses of the data range and a physical estimated value of a plurality of physical erasing units mapped to the plurality of logical block addresses of the data range; and determining whether to perform a data arrangement operation according to the data disarranged degree and a threshold to move data in the plurality of physical erasing units according to the plurality of logical block addresses.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: January 11, 2022
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Kok-Yong Tan
  • Patent number: 11216216
    Abstract: A portable memory device includes an interface enabling communications between the portable memory device and an external device; a group of components arranged to provide a certain non-volatile electronic data storage when coupled to the interface. The coupling is performed based on one or more control signals, or on one or more configurations of one or more physical control elements that are transitionable by hand to different configurations, or both. When the group of components and the interface are coupled, the certain non-volatile electronic data storage is provided for use by an external device through the interface; when the group of components and the interface is not coupled or are decoupled, the certain non-volatile electronic data storage is not provided and instead another non-volatile electronic data storage may be provided or none at all. The portable memory device preferably is a flash memory apparatus and may encompass multiple flash-memory drives.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: January 4, 2022
    Assignee: IPXCL, LLC
    Inventors: Evan Michael Dorsel, Chad Dustin Tillman
  • Patent number: 11216366
    Abstract: A memory controller is to store a unique tag at the mid-point address within each of allocated memory portions. In addition to the tag data, additional metadata may be stored at the mid-point address of the memory allocation. For each memory access operation, an encoded pointer contains information indicative of a size of the memory allocation as well as its own tag data. The processor circuitry compares the tag data included in the encoded pointer with the tag data stored in the memory allocation. If the tag data included in the encoded pointer matches the tag data stored in the memory allocation, the memory operation proceeds. If the tag data included in the encoded pointer fails to match the tag data stored in the memory allocation, an error or exception is generated.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: January 4, 2022
    Assignee: Intel Corporation
    Inventors: David M. Durham, Michael LeMay
  • Patent number: 11210009
    Abstract: Staging data in a cloud-based storage system, including: receiving, at the cloud-based storage system integrating a first tier of cloud storage and a second tier of cloud storage, a data storage operation from a computer device; storing data corresponding to the data storage operation within the first tier of cloud storage in accordance with a first storage format; and responsive to detecting a condition for transferring data between the first tier of cloud storage and the second tier of cloud storage, transferring the data in the first storage format from the first tier of cloud storage to a second data format within the second tier of cloud storage.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: December 28, 2021
    Assignee: Pure Storage, Inc.
    Inventors: Joshua Freilich, Aswin Karumbunathan, Naveen Neelakantam, Ronald Karr
  • Patent number: 11204783
    Abstract: In one implementation, a method of accessing shared data among processes is performed by a device including processor(s), non-transitory memory, and an image acquisition interface. The method includes obtaining image data acquired by the image acquisition interface. The method further includes determining pose data based at least in part on inertial measurement unit (IMU) information measured by the image acquisition interface. The method also includes determining a gaze estimation based at least in part on eye tracking information obtained through the image acquisition interface. Based at least in part on characteristics of processes, the method includes determining an arrangement for the image data, the pose data, and the gaze estimation. The method additionally includes determining an access schedule for the processes based at least in part on at least one of: the arrangement, the characteristics of the processes, and hardware timing parameters associated with the device.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: December 21, 2021
    Assignee: APPLE INC.
    Inventors: Ranjit Desai, Michael J. Rockwell, Venu Madhav Duggineni, Robert Seon Wai Lee
  • Patent number: 11200091
    Abstract: A memory optimizer service can be used to provide adaptive memory optimization. The memory optimizer service can be executed on a thin client or other user device to detect when low memory conditions exist. When it detects a low memory condition, the memory optimizer service can obtain process memory information for processes executing on the thin client and use the process memory information to calculate a trim amount to apply to the working set of processes with the highest amount of private bytes in their working sets. These trim amounts can be proportional to the amounts of private bytes and in sum can equal a total desired reduction in memory consumption.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: December 14, 2021
    Assignee: DELL PRODUCTS L.P.
    Inventors: Vishal Kumar Singh, Mohammed Sarfraz
  • Patent number: 11200148
    Abstract: Methods, systems, and techniques for tracing callstacks, the results of which can be used to identify a source of a memory leak. A memory heap is sampled at different times to determine counts of respective allocations of different allocations at the different times. From the counts of the respective allocations at the different times, rates at which the respective allocations have changed over the different times, and which of the rates is equal to or greater than a leak indication rate, are determined. Callstacks for respective allocations of the different allocation sizes for each of the rates that is equal to or greater than the leak indication rate are traced. The results of the tracing may be used during debugging to identify the source of the memory leak.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: December 14, 2021
    Assignee: AVIGILON CORPORATION
    Inventors: Daniel James Booth, Shaun P. Marlatt
  • Patent number: 11194731
    Abstract: To manage memory, a computer system, responsive to receiving a message indicating an availability of a memory page of the computer system, generates a mapping between a logical address of the memory page and at least two physical memory addresses at which respective copies of the memory page are available. The computer system provides one of the at least two physical memory addresses in response to a request for access to the memory page.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: December 7, 2021
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
    Inventors: Amir Roozbeh, Joao Monteiro Soares, Daniel Turull
  • Patent number: 11194706
    Abstract: In certain embodiments, a method includes starting an application as a first process within a user space of an operating system. The application instantiates a data storage system associated with the operating system. The method also includes starting a block device service as a second process within the user space of the operating system, the block device service being configured to manage a persistent storage device of the computing device. In addition, the method includes receiving, by a kernel of the operating system, a system call request from the application to communicate with the block device service, the system call request is generated by the application using the data storage system and comprises an access request to access the persistent storage device. The method further includes providing the application, in response to the system call request, access to the block device service through the IPC channel.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: December 7, 2021
    Assignee: Facebook Technologies, LLC
    Inventors: Andrew M. Rogers, Bernhard Poess, Gleb Kurtsov