Active/idle Mode Processing Patents (Class 713/323)
  • Patent number: 9104467
    Abstract: Systems and methods that enable a reduction of the power consumption involved in measuring a user's affective response to content. The reduction in power consumption is achieved by utilizing eye tracking to determine when a user is paying attention to content, and accordingly setting a mode of operation of a device that measures the user. Thus, by using different modes of operation, which are characterized by different energy consumption rates, the total power consumption of the device may be reduced, without loss of relevant measurements.
    Type: Grant
    Filed: October 13, 2013
    Date of Patent: August 11, 2015
    Inventors: Ari M Frank, Gil Thieberger
  • Patent number: 9104619
    Abstract: Techniques for persisting data stored in volatile memory across a warm boot. One or more portions (referred to as “warm memory”) of volatile memory of the system can be reserved and configured such that the data stored by these portions is not affected by a warm boot thereby resulting in the data stored being persisted across a warm boot.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: August 11, 2015
    Assignee: Brocade Communications Systems, Inc.
    Inventors: Bill Ying Chin, Ilya Ratner, Tushar Desai, Surendranadh Madineni, William R. Mahoney
  • Patent number: 9104409
    Abstract: A method to reduce memory power consumption for a computing platform includes inspecting an operating parameter associated with a resource of the computing platform that is updated by the resource of the computing platform during runtime of the computing platform. Memory power utilization is then predicted for the computing platform during the runtime of the computing platform based at least in part on the operating parameter. A current power state of at least one memory module resident on the computing platform is transitioned to one of a plurality of power states based on the predicting of the memory power utilization.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: August 11, 2015
    Assignee: Intel Corporation
    Inventors: Rakesh Dodeja, Neelam Chandwani, Chetan Hiremath, Udayan Mukherjee, Anthony Ambrose
  • Patent number: 9104422
    Abstract: An image processing apparatus included in a system including another image processing apparatus, and configured to transition to a first and a second electric power saving mode when functioning as a main apparatus and a slave apparatus, respectively, in the system where the second electric power saving mode is lower than that of the first electric power saving mode, includes a function determining unit which determines whether the image processing apparatus is to function as the main apparatus or the slave apparatus based on a status of the other image processing apparatus which is obtained when the image processing apparatus is performing a job; and an instruction sending unit which sends an instruction to have the other image processing apparatus function as the slave apparatus or the main apparatus when the image processing apparatus is determined to function as the main apparatus or the slave apparatus, respectively.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: August 11, 2015
    Assignee: RICOH COMPANY, LTD.
    Inventor: Yuuki Imaizumi
  • Patent number: 9104411
    Abstract: Methods, systems and devices that include a dynamic clock and voltage scaling (DCVS) solution configured to compute and enforce performance guarantees to ensure that a processor does not remain in a busy state (e.g., due to transient workloads) for more than a predetermined amount of time above that which is required for that processor to complete its pre-computed steady state workload. The DCVS may adjust the frequency and/or voltage of a processor based on a variable delay to ensure that the processing core only falls behind its steady state workload by, at most, a predefined maximum amount of work, irrespective of the operating frequency or voltage of the processor.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: August 11, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Steven S. Thomson, Bohuslav Rychlik, Ali Iranli, Sumit Sur, Norman Scott Gargash
  • Patent number: 9099998
    Abstract: In an embodiment of the invention, a flip-flop circuit contains a 2-input multiplexer, a master latch, a transfer gate and a slave latch. The scan enable control signals SE and SEN of the multiplexer determine whether data or scan data is input to the master latch. Clock signals CKT and CLKZ and retention control signals RET and RETN determine when the master latch is latched. The slave latch is configured to receive the output of the master latch, a second data bit D2, the clock signals CKT and CLN, the retain control signals RET and RETN, the slave control signals SS and SSN. The signals CKT, CLKZ, RET, RETN, SS, SSN and PREN determine whether the output of the master latch or the second data bit D2 is latched in the slave latch. Control signals RET and RETN determine when data is stored in the slave latch during retention mode.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: August 4, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Steven Bartling, Sudhanshu Khanna
  • Patent number: 9098970
    Abstract: Apparatus, systems, and methods may operate to receive operational power from a primary power supply at a processor housed within a wagering game machine, where the processor is operable to present a wagering game. Further activities may include determining that the wagering game machine is currently in a hibernation state, authenticating at least one hibernation file, and resuming operation of the wagering game machine to a base operation state defined by the at least one hibernation file. Additional apparatus, systems, and methods are disclosed.
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: August 4, 2015
    Assignee: WMS Gaming Inc.
    Inventors: Ryan Antkowiak, Jesse Garvey, Damon E. Gura, Vernon W. Hamlin, Budyanto Himawan, Mahesh Lakshmanaperumal, Laurie Lasseter, Robert A. McPeak, Jorge Luis Shimabukuro, Craig J. Sylla, Anussorn Andy Veradej, Jun Wang
  • Patent number: 9098224
    Abstract: In an image processing apparatus, a waiting time until power supply to a storage unit is stopped is suitably set corresponding to a type of input job and a state of power supply to the storage unit when the job has been input. A first waiting time is set if power is not supplied to the storage unit when the job has been input in a case where the input job is a first type of job. A second waiting time is set regardless of whether power is supplied to the storage unit when the job has been input in a case where the input job is a second type of job. Power supplied to the storage unit is controlled to stop when the waiting time has elapsed.
    Type: Grant
    Filed: June 25, 2010
    Date of Patent: August 4, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hiroyuki Tsuji
  • Patent number: 9098258
    Abstract: At least certain embodiments of the disclosures relate to methods, devices, and data processing systems for thermal-based acoustic management. In one embodiment, a computer-implemented method defers one or more background tasks during normal operation of a system if the system has a reduced performance feature that allows reduced or throttled performance in a non-user state. The system enters a low power state (e.g., sleep state) to cool the system after a period of normal operation. The system enters a different low power state (e.g., dark wake state) with a reduced performance and performs at least one of the deferred background tasks while in this low power state without needing a cooling mechanism.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: August 4, 2015
    Assignee: Apple Inc.
    Inventors: Russell Dean Reece, Jeffrey D. Whitman, Keith Cox
  • Patent number: 9098305
    Abstract: A computer system and a bootup and shutdown method thereof are provided. The computer system includes a memory, a chipset, a basic input/output system (BIOS), and an embedded controller, and an operating system (OS) is executed in the computer system. In the shutdown and bootup method, the embedded controller is notified to prepare to enter into a standby mode when the BIOS intercepts a shutdown instruction issued by the OS. The content of a register of the chipset is set according to the standby mode. A current operation mode data of the computer system is retained, and power is continuously supplied to the memory to make the computer system enter into the standby mode.
    Type: Grant
    Filed: May 30, 2011
    Date of Patent: August 4, 2015
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Chih-Chien Liu, Feng-Hsun Chen, Chien-Ting Yeh
  • Patent number: 9092069
    Abstract: A first list of forbidden words is selected from a plurality of lists of forbidden words on a computing device when the computing device is set to a first user mode corresponding to the first list of forbidden words, wherein each of the plurality of lists of forbidden words corresponds to at least one user mode of a plurality of user modes and contains user mode-based forbidden words whose use on the computing device is prohibited when the computing device is set to one or more corresponding user modes. First mode-based forbidden words of the first list of forbidden words are prevent from being be used on the computing device for as long as the computing device is set to the first user mode.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: July 28, 2015
    Assignee: Intel Corporation
    Inventor: Bran Ferren
  • Patent number: 9092051
    Abstract: An eye tracking based user function controlling method and a mobile device adapted thereto are provided. A camera unit of a mobile device is activated while a specific user function is executed. A gaze angle of a user's eye is acquired from an image obtained via the camera unit. An eye tracking function is executed in which execution state is controlled according to the gaze angle.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: July 28, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyungdae Park, Jiyoung Kang, Sanghyuk Koh, Mijung Park, Saegee Oh, Chihoon Lee
  • Patent number: 9092150
    Abstract: A method includes determining, based on an indication from a host device operatively coupled to a data storage device that includes a controller, a non-volatile memory including a hibernate area, a volatile memory, a non-volatile memory interface, and a volatile memory interface, that the data storage device is to enter a low-power state. The method includes, in response to determining that the data storage device is to enter a low-power state, performing a data save operation. The data save operation bypasses the non-volatile memory interface and the volatile memory interface and copies data from the volatile memory of the data storage device to the hibernate area of the non-volatile memory of the data storage device.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: July 28, 2015
    Assignee: SANDISK TECHNOLOGIES INC.
    Inventors: Daniel Zvi Yerushalmi, Yaniv Iarovici
  • Patent number: 9092220
    Abstract: A computer system comprising a graphics processor, a frame buffer, a display device, a system agent operable to detect an absence of active software applications and system configurations capable of rendering a disruptive user experience during system suspend, and a memory for storing instructions, that when executed perform a method of entering a power conservation state. The method comprises detecting a system idle event, activating the frame buffer, and storing display information in the frame buffer from the graphics processor. The method further comprises initiating a power reduction state for the graphics processor, self-refreshing the display device during the power reduction state with the display information stored in the frame buffer, and initiating a system suspend comprising a power reduction state for the computer system provided the system agent detects the absence of disruptive software and system configurations.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: July 28, 2015
    Assignee: NVIDIA CORPORATION
    Inventors: David Wyatt, Rambod Jacoby
  • Patent number: 9086867
    Abstract: In an embodiment, an information processing apparatus has a low power mode. The information processing apparatus includes: a communication control unit; a table that stores identification information identifying an external device in association with an operation need/no-need information representing an operation need/no-need of the external device in the low power mode; a power supply control unit that acquires identification information from an external device at a time of transition to the low power mode, and performs control such that supply of electric power to the communication control unit is to be restricted when determined that the operation need/no-need information corresponding to the identification information represents the operation no-need based on the table, and such that supply of electric power to the communication control unit is continued when determined that the operation need/no-need information represents the operation need based on the table.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: July 21, 2015
    Assignee: RICOH COMPANY, LIMITED
    Inventor: Takanari Hamasaki
  • Patent number: 9087102
    Abstract: Methods, systems, and computer program products are provided for improving the processing of database queries. Some embodiments include detecting an overly long running query execution plan, stopping execution of the plan, and utilizing the query optimizer to select an alternate plan for execution. Embodiments may utilize system timers which are set with a time limit for the first selected plan, with instructions to re-optimize and initiate selection of an alternate plan when the timer times out. Risky constructs may be located in the first plan and removed from future consideration for executing the query. In some embodiments, the additional overhead for non-problem queries consists of little more than creating and sending a message or setting a timer when starting query execution, and canceling a timer upon successful query processing completion. A secondary thread may be created responsive to detecting a long running query, to supervise selecting an alternate execution plan.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: July 21, 2015
    Assignee: International Business Machines Corporation
    Inventors: Robert Joseph Bestgen, Michael S. France, Brian Robert Muras
  • Patent number: 9075609
    Abstract: A processor includes a plurality of exclusive resources, a shared resource, and a controller configured to manage power state transitions of each of the plurality of exclusive resources and the shared resource. The controller receives a request from a resource to transition from a first power state to a lower power state and, in response to receiving the request, the controller controls power state transitions of the resource according to a first power control threshold when the resource is one of the plurality of exclusive resources and according to a second power control threshold that is greater than the first power control threshold when the resource is the shared resource.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: July 7, 2015
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: William Lloyd Bircher, Alexander J. Branover
  • Patent number: 9063775
    Abstract: Systems, methods, and apparatus for separately managing foreground work and background work. In some embodiments, an operating system may identify at least one foreground component and at least one background component of a same application or different applications, and may manage the execution of the components differently. For example, the operating system may receive a request that at least one background component of an application be executed in response to at least one event. In response to detecting an occurrence of the at least one event, the operating system may determine whether at least one first condition set by the application is satisfied and whether at least one second condition set by the operating system is satisfied, and may execute the at least one background component when it is determined that the at least one first and second conditions are satisfied following the occurrence of the at least one event.
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: June 23, 2015
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: James A. Schwartz, Jr., Arun U. Kishan, Richard K. Neves, David B. Probert, Hari Pulapaka, Alain F. Gefflaut
  • Patent number: 9063728
    Abstract: Systems and methods are disclosed for storing hibernation data in a non-volatile memory (“NVM”). Hibernation data is data stored in volatile memory that is lost during a reduced power event, but is needed to restore the device to the operational state it was in prior to entering into the reduced power event. When a reduced power event occurs, the hibernation data is stored in the NVM. When the device “wakes up” the hibernation data is retrieved and used to restore the device to its prior operational state.
    Type: Grant
    Filed: March 17, 2010
    Date of Patent: June 23, 2015
    Assignee: APPLE INC.
    Inventors: Nir Wakrat, David J. Yeh, Christopher P. Dudte
  • Patent number: 9049658
    Abstract: A group owner of a peer-to-peer communication network is configured to determine whether all client devices associated with the peer-to-peer communication network support direct data communication. The group owner is configured to implement an awake mode for a portion of each beacon interval when all the associated client devices support direct data communication. The group owner is configured to implement a sleep mode for a remaining portion of each beacon interval to save power at the group owner without interrupting communications between the associated client devices.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: June 2, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Kayalvizhi Ponmudi, Karthick Raja Chandrasekar
  • Publication number: 20150149803
    Abstract: In an embodiment, an electronic device includes a power supply module, a processor, a mode setting module and a clock module. The processor is configured to operate with power from the power supply module, and to be able to enter a power-saving operation state. The mode setting module turns on or off a mode in which the processor is inhibited from exiting the power-saving operation state due to an interrupt. The clock module is configured to generate the interrupt, if the mode is off, when predetermined time is reached while the processor is in the power-saving operation state, and not to generate the interrupt, if the mode is on, even when the time is reached while the processor is in the power-saving operation state.
    Type: Application
    Filed: August 25, 2014
    Publication date: May 28, 2015
    Inventor: Kei Takahashi
  • Publication number: 20150149804
    Abstract: A responding device has operating modes including a first mode and a second mode. The responding device includes a first responding unit and a second responding unit. The first responding unit operates during the first mode and outputs, when receiving a request, a response including information in accordance with the type of the request. The second responding unit outputs the response in place of the first responding unit during the second mode. The second responding unit includes a storage section, an information accumulation section, and a mode transition control section. The information accumulation section stores in the storage section the information included in the response output from the first responding unit during the first mode. The mode transition control section causes the responding device to transition to the second mode when a first condition and a second condition in terms of the information stored in the storage section are satisfied.
    Type: Application
    Filed: November 21, 2014
    Publication date: May 28, 2015
    Applicant: KYOCERA Document Solutions Inc.
    Inventor: Keiji SAKABE
  • Publication number: 20150149801
    Abstract: A processing system for sensing includes a sensor module including sensor circuitry coupled to sensor electrodes, the sensor module configured to generate sensing signals received with the sensor electrodes. The processing system further includes a determination module that is configured to determine, from the sensing signals, a positional information for a gesture while a host device is in low power mode, determine, based on the positional information and while the host device is in the low power mode, that the gesture is deliberate input, send, in response to determining that the gesture is deliberate input, a wake signal to the host device to switch the host device out of the low power mode, and send the positional information to the host device after the host device receives the wake signal.
    Type: Application
    Filed: November 26, 2013
    Publication date: May 28, 2015
    Applicant: Synaptics Incorporated
    Inventors: Tom Vandermeijden, Pranjal Jain
  • Publication number: 20150149802
    Abstract: This document discloses a solution for employing a power-save mode in an electronic device providing, in a display unit, a plurality of home screens and a mechanism to switch from one home screen to another home screen in response to a user input received through user input means of the electronic device. At least one of the home screens is a home screen for a power-save mode of the electronic apparatus and, upon detecting a user input causing a switch to the home screen for the power-save mode, the electronic device switches on at least some of the power-save features of the electronic device.
    Type: Application
    Filed: April 7, 2014
    Publication date: May 28, 2015
    Inventor: Pekka VÄYRYNEN
  • Patent number: 9043629
    Abstract: A multi-cluster processing system and a method of operating a multi-cluster processing system are provided. The multi-cluster processing system includes: a first cluster including a plurality of first-type cores: a second cluster including a plurality of second-type cores; and a control unit configured to monitor loads of the first-type cores and the second-type cores, wherein when utilization of at least one of enabled first-type cores exceeds a predetermined threshold utilization of each of the first-type cores, the control unit enables at least one of disabled first-type cores in a first mode, and the control unit enables at least one of the disabled second-type cores and disables the first cluster in a second mode, wherein an amount of computation per unit of time of each of the second-type cores is greater than an amount of computation per unit of time of each of the first-type cores.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: May 26, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Eui-Youl Ryu
  • Patent number: 9043628
    Abstract: We report methods, integrated circuit devices, and fabrication processes relating to power management transitions of multiple compute units sharing a cache. One method includes indicating that a first compute unit of a plurality of compute units of an integrated circuit device is attempting to enter a low power state, determining if the first compute unit is the only compute unit of the plurality in a normal power state, and in response to determining the first compute unit is the only compute unit in the normal power state: saving a state of a shared cache unit of the integrated circuit device, flushing at least a portion of a cache of the shared cache unit, repeating the flushing until either a second compute unit exits the low power state or the cache is completely flushed, and permitting the first compute unit to enter the low power state.
    Type: Grant
    Filed: August 24, 2012
    Date of Patent: May 26, 2015
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Paul Kitchin, William L. Walker, Steven J. Kommrusch
  • Patent number: 9043632
    Abstract: An SOC implements a security enclave processor (SEP). The SEP may include a processor and one or more security peripherals. The SEP may be isolated from the rest of the SOC (e.g. one or more central processing units (CPUs) in the SOC, or application processors (APs) in the SOC). Access to the SEP may be strictly controlled by hardware. For example, a mechanism in which the CPUs/APs can only access a mailbox location in the SEP is described. The CPU/AP may write a message to the mailbox, which the SEP may read and respond to. The SEP may include one or more of the following in some embodiments: secure key management using wrapping keys, SEP control of boot and/or power management, and separate trust zones in memory.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: May 26, 2015
    Assignee: Apple Inc.
    Inventors: Erik P. Machnicki, Manu Gulati, Josh P. de Cesare
  • Patent number: 9043625
    Abstract: A power controller can set the power state of a processor bridge based on which processor modules are in a communicative state. In addition, for a power state where selected processor modules are expected to be non-communicative, the power controller can set the supplied voltage to have a reduced voltage guard band as compared to other power states. These power management techniques can reduce the power consumed by the processor.
    Type: Grant
    Filed: April 13, 2012
    Date of Patent: May 26, 2015
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Maurice B. Steinman, Alexander J. Branover, Denis J. Foley, Ljubisa Bajic
  • Patent number: 9043081
    Abstract: The present invention provides an electronic control device including a processing unit having a function of shifting to a sleep mode in which the processing unit is adapted to start up from the sleep mode according to occurrence statuses of one or more startup factors, and shift to the sleep mode according to a system power supply voltage.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: May 26, 2015
    Assignees: KEIHIN CORPORATION, HONDA MOTOR CO., LTD.
    Inventors: Taku Yoshikawa, Daisuke Hoshi, Shinichi Daibo, Yuichi Kobata
  • Patent number: 9043585
    Abstract: In an example embodiment, there is described herein an apparatus comprising an interface for communicating with a plurality of digital signal processors and logic operable to send and receive data via the interface. The logic is configured to determine a first set of digital signal processors to be maintained in a ready state, a second set of digital signal processors to be maintained in a first energy saving state, and a third set of digital signal processors to be maintained in a second energy saving state.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: May 26, 2015
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Ming Chen, Prasad Miriyala, Ramakrishnan Kunnath, Jing Li
  • Patent number: 9041942
    Abstract: An image forming apparatus includes: an applying device configured to generate an output signal and apply the output signal to an image forming device; and a controller configured to generate a control signal to supply to the applying device so as to control a value of the output signal so that the value of the output signal is within a predetermined target range and control the applying device using the control signal in a start-up mode and in a normal mode, the normal mode being subsequent to the start-up mode. In the start-up mode, the controller sets a start control signal value larger than a value of the control signal immediately after a first predetermined time, the start control signal value being the value of the control signal during the first predetermined time, the first predetermined time being from a start timing of the start-up mode.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: May 26, 2015
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Masamitsu Takahashi, Katsumi Inukai
  • Publication number: 20150143151
    Abstract: A method for operating multiple standby states and a broadcast receiving apparatus using the same are provided. The method for operating multiple standby states includes releasing, by a framework, a full wake lock for an electronic device, and acquiring, by the framework, a partial wake lock for the electronic device and entering a first standby state. Accordingly, a broadcast receiving apparatus based on an Android framework can operate multiple standby states which are designated by an application.
    Type: Application
    Filed: July 5, 2012
    Publication date: May 21, 2015
    Applicant: KOREA ELECTRONICS TECHNOLOGY INSTITUTE
    Inventors: Jung Mee Yun, Sang Hak Lee
  • Publication number: 20150143152
    Abstract: An apparatus and method for a power-efficient framework to maintain data synchronization of a mobile personal computer (MPC) are described. In one embodiment, the method includes the detection of a data synchronization wakeup event while the MPC is operating according to a sleep state. Subsequent to wakeup event, at least one system resource is disabled to provide a minimum number of system resources required to re-establish a network connection. In one embodiment, user data from a network server is synchronized on the MPC without user intervention; the mobile platform system resumes operation according to the sleep state. In one embodiment, a wakeup alarm is programmed according to a user history profile regarding received e-mails. In a further embodiment, data synchronizing involves disabling a display, and throttling the system processor to operate at a reduced frequency. Other embodiments are described and claimed.
    Type: Application
    Filed: December 26, 2014
    Publication date: May 21, 2015
    Inventors: Shobhit Varshney, Gandhi Prashant, Joshi S. Mandar, Uttam K. Sengupta, Shreekant S. Thakkar
  • Publication number: 20150143150
    Abstract: Systems and methods are provided for enabling control of adapter primary side switching circuitry of an AC-DC adapter by a DC-powered information handling system that is connected to the AC-DC adapter for receiving DC power from the AC-DC adapter.
    Type: Application
    Filed: November 18, 2013
    Publication date: May 21, 2015
    Inventor: Gary J. Verdun
  • Patent number: 9037884
    Abstract: In accordance with one embodiment of the present disclosure, a multi-phase voltage regulator may comprise a plurality of phases, each phase configured to supply electrical current to one or more information handling resources electrically coupled to the voltage regulator. A controller may be electrically coupled to the plurality of phases. The controller may designate at least one of the plurality of phases as a first state phase, and designate each of the plurality of phases not designated as a first state phase as a second state phase. The controller may alternate the designation of at least two of the plurality of phases between a first state phase and a second state phase. Each first state phase may be configured to supply a first electrical current regardless of electrical current demand. Each second state phase may be configured to supply a second electrical current based on the current demand.
    Type: Grant
    Filed: November 6, 2014
    Date of Patent: May 19, 2015
    Assignee: Dell Products L.P.
    Inventors: Johan Rahardjo, John Breen, Shiguo Luo
  • Patent number: 9037885
    Abstract: Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: May 19, 2015
    Assignee: Intel Corporation
    Inventors: Stephen H. Gunther, Edward A. Burton, Anant Deval, Stephan Jourdan, Robert Greiner, Michael Cornaby
  • Publication number: 20150134989
    Abstract: Systems and methods are disclosed for reducing memory I/O power. One embodiment is a system comprising a system on chip (SoC), a DRAM memory device, and a data masking power reduction module. The SoC comprises a memory controller. The DRAM memory device is coupled to the memory controller via a plurality of DQ pins. The data masking power reduction module comprises logic configured to drive the DQ pins to a power saving state during a data masking operation.
    Type: Application
    Filed: November 13, 2013
    Publication date: May 14, 2015
    Applicant: Qualcomm Incorporated
    Inventors: DEXTER CHUN, HAW-JING LO
  • Publication number: 20150134992
    Abstract: A power-saving circuit for a computer that includes a host and a monitor, the power-saving circuit includes a sensing module and a control module. The sensing module is configured to detect whether an external object in vicinity of the monitor is absent from the vicinity of the monitor, and output a corresponding detecting signal in response to detecting that the external object is absent. The control module includes a controller electronically coupled to the sensing module, the host and the monitor. The controller is configured to calculate a time period of the absence of the external object according to the detecting signal, and control the host and monitor to proceed into different power modes according to the time period.
    Type: Application
    Filed: November 7, 2014
    Publication date: May 14, 2015
    Inventor: LONG ZHAO
  • Publication number: 20150134993
    Abstract: A first device of a multimedia over coax alliance (MoCA) network may grant a second device of the MoCA network permission to enter a power-saving state. While the second device is in the power-saving mode, the first device may grant bandwidth to the second device during one or more predetermined timeslots. The bandwidth may be granted without a corresponding reservation request from the second device. While the second device is in the power-saving state, it may track time utilizing a clock that is synchronized to the system time of the MoCA network, and transmit during one or more of the predetermined timeslots without first transmitting a corresponding reservation request. The second device may utilize a first modulation profile when not operating in the power-saving state, and utilize a second modulation profile when operating in the power-saving state.
    Type: Application
    Filed: November 14, 2014
    Publication date: May 14, 2015
    Inventors: Timothy Gallagher, Glenn DeLucio, Curtis Ling
  • Publication number: 20150134990
    Abstract: Provided is an information processing apparatus including a processor configured to control a system of the information processing apparatus, a power source controller configured to perform control of power supply to the system and to turn off a power source of the power source controller in standby mode in which a power source of the processor is turned off, a memory configured to store information in standby mode, and a power supply unit configured to perform power supply to the memory in standby mode.
    Type: Application
    Filed: March 14, 2013
    Publication date: May 14, 2015
    Inventors: Takeshi Masuda, Toshimasa Tsuchida, Takahiro Imai, Yoshiyuki Tanaka, Kiyotaka Akasaka, Kenichi Onishi, Norifumi Yoshida
  • Publication number: 20150134991
    Abstract: Includes receiving, from a link partner, a message specifying a link partner receive wake time and resolving to the lesser of the received link partner receive wake time and a local transmit wake time.
    Type: Application
    Filed: October 2, 2014
    Publication date: May 14, 2015
    Inventors: Aviad Wertheimer, Robert Hays
  • Patent number: 9032233
    Abstract: An on-board network system is presented. The on-board network system sends a sleep-entered message to a communication bus. The sleep-entered message is sent under a condition that a sleep condition is satisfied on a basis that a network management (NM) message is ceased during state transition process in which node's state transfers from a normal state to a power-saving state. A monitoring ECU corresponding to a master performs an abnormality detection process. In the abnormality detection process, the monitoring ECU detects an abnormality state of the state transition process based on whether or not the sleep-entered message is sent from any one of nodes, thereby it is possible to detect the abnormality state not only during each node is a normal state but also during a bus-sleep state.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: May 12, 2015
    Assignee: Denso Corporation
    Inventors: Takahiro Sasaki, Tomohisa Kishigami, Tomoko Kodama
  • Patent number: 9031544
    Abstract: A status switching method for a mobile device is disclosed. The status switching method includes receiving a first request for switching a radio function of the mobile device from a first status to a second status; keeping the radio function in the first status for a specific duration; switching the radio function to the second status if not receiving a second request for switching the radio function of the mobile device from the second status to the first status during the specific duration; and remaining the radio function in the first status if receiving a second request for switching the radio function of the mobile device from the second status to the first status during the specific duration; and switching the radio function to the first status.
    Type: Grant
    Filed: January 2, 2013
    Date of Patent: May 12, 2015
    Assignee: HTC Corporation
    Inventor: Chun-Yu Lai
  • Patent number: 9032174
    Abstract: A processor determines whether a first program is under execution when a second program is executed, and changes a setting of a memory management unit based on access prohibition information so that a fault occurs when the second program makes an access to a memory when the first program is under execution. Then, the processor determines whether an access from the second program to a memory area used by the first program is permitted based on memory restriction information when the fault occurs while the first program and the second program are under execution, and changes the setting of the memory management unit so that the fault does not occur when the access to the memory area is permitted.
    Type: Grant
    Filed: February 11, 2013
    Date of Patent: May 12, 2015
    Assignee: Fujitsu Limited
    Inventor: Naoki Nishiguchi
  • Patent number: 9032229
    Abstract: An information processing device (1) includes a main CPU (2) and a sub CPU (3). The main CPU (2) is provided with a function of managing schedules of task processing and idle processing and executes sleep control which reduces power consumption of the main CPU (2) as the idle processing when the task processing is not executed. The sub CPU (3) measures elapsed time during which the sleep control is executed, detects an interrupt event occurring during the sleep control, and notifies the elapsed time until the interrupt event occurs to the main CPU (2). The main CPU (2) terminates the sleep control in accordance with the notification of the elapsed time and reflects the elapsed time in the schedule. As a result, inconsistency of a timer caused by the sleep control can be solved, and the information processing device which can use a scheduler correctly even if the sleep control is executed is provided.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: May 12, 2015
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Mitsutaka Iwai, Tetsuji Ohtsuki, Kazuma Minami, Hiroyuki Yoshino
  • Patent number: 9032230
    Abstract: An information processing apparatus has a sub system that, while a main system is in power saving state, analyzes a protocol of a network communication and recovers the main system to an ordinary power mode from the power saving state, in accordance with the protocol. There is a setting unit that sets a re-transition condition which is a condition to make the main system switch to the power saving state again, depending on a kind of the network communication. Further, there is a control unit that monitors whether the re-transition condition is satisfied and switches the main system to the power saving state in response to the re-transition condition being satisfied.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: May 12, 2015
    Assignee: Ricoh Company, Ltd.
    Inventor: Takehito Kuroko
  • Patent number: 9032232
    Abstract: In one embodiment, the present invention includes a processor having a core with decode logic to decode an instruction prescribing an identification of a location to be monitored and a timer value, and a timer coupled to the decode logic to perform a count with respect to the timer value. The processor may further include a power management unit coupled to the core to determine a type of a low power state based at least in part on the timer value and cause the processor to enter the low power state responsive to the determination. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: May 12, 2015
    Assignee: Intel Corporation
    Inventors: Martin G. Dixon, Scott D. Rodgers, Taraneh Bahrami, Stephen H. Gunther, Prashant Sethi, Per Hammarlund
  • Patent number: 9032231
    Abstract: Systems and methods can provide for power saving in broadband communications devices. In some implementations, such systems and methods can generate and/or receive interrupts to ascertain external power unavailability, operate on battery power, instruct functional modules to enter power saving mode, await restoration of external power, and instruct modules to resume normal operations. In other implementations, such systems and methods can detect external power unavailability via polling, operate on battery power, instruct any or all of primary and auxiliary processor(s) to enter power saving mode, monitor when external power has been restored, and instruct functional modules to resume normal operation. Power saving mode can reduce the rate of modem battery drain and thus reduce the likelihood of a service outage and extend service duration.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: May 12, 2015
    Assignee: ARRIS Enterprises, Inc.
    Inventor: Russell L. Crisp
  • Patent number: 9032415
    Abstract: A method for activating processor cores within a computer system is disclosed. Initially, a value representing a number of processor cores to be enabled within the computer system is received. The computer system includes multiple processors, and each of the processors includes multiple processor cores. Next, a scale variable value representing a specific type of tasks to be optimized during an execution of the tasks within the computer system is received. From a pool of available processor cores within the computer system, a subset of processor cores can be selected for activation. The subset of processor cores is activated in order to achieve system optimization during an execution of the tasks.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: May 12, 2015
    Assignee: International Business Machines Corporation
    Inventors: Rijoy B. Lonappan, Shashikumar Mandya Krishnappa, Sethupathy R. Sivakumar, Venkatesh N. Sripathi Rao
  • Publication number: 20150127965
    Abstract: A method of controlling power supply for a fingerprint sensor is provided. The method includes receiving sensor data obtained from the fingerprint sensor; determining whether the received sensor data is a fingerprint form of data; if the received sensor data is the fingerprint form of data, determining an amount of change in sensor data received over a predetermined time is greater than or equal to a predetermined value; and if the received sensor data is not the fingerprint form of data or if the received sensor data is the fingerprint form of data but an amount of change in the received sensor data is less than the predetermined value, allowing the fingerprint sensor to enter a power saving mode.
    Type: Application
    Filed: November 5, 2014
    Publication date: May 7, 2015
    Inventors: Hyun Ju HONG, Seung Ki CHOI, Su Ha YOON, Su Young PARK, Eui Chang JUNG, Sung Hyuk SHIN