Active/idle Mode Processing Patents (Class 713/323)
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Patent number: 9933767Abstract: Systems and methods for providing a dynamically synchronized instance to a network device. A repository database stores a process model instance having a layout defined by data elements. A design tool processor coupled to the repository database provides the instance to a user device and a network device. The user device modifies data elements of the instance to generate a first version instance, and the design tool processor generates a dynamically synchronized instance for storing and serving the dynamically synchronized instance to a network device.Type: GrantFiled: July 29, 2015Date of Patent: April 3, 2018Assignee: Schneider Electric Software, LLCInventors: Iju V. Raj, Dirk K. Kozian, Thomas A. Troy, Prasanth Ittiera Eapen K, Elizabeth Geojy, Ajay Kumar Reddy Kopperla, Arvind Kamath
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Patent number: 9933831Abstract: A power control system includes: an information processing device including: a determining unit that determines whether to supply power to a device from a power supplying unit, based on first correspondence information, in which an output signal detected by a detecting unit of each of at least one electronic device is associated with identification information of a corresponding electronic device, received from the corresponding electronic device, and a stored second correspondence information, in which identification information to identify a power supplying unit of a power source control device that supplies power to a device is associated with identification information of each of the at least one electronic device, and an instruction unit that instructs the power source control device to supply power or to shut off power supply to a device from the power supplying unit, according to a determination result of the determining unit.Type: GrantFiled: December 8, 2015Date of Patent: April 3, 2018Assignee: RICOH COMPANY, LIMITEDInventor: Kiriko Chosokabe
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Patent number: 9927860Abstract: A method for reducing power consumption of a memory system and a memory controller are provided. The method for reducing power consumption of a memory system includes: determining whether a dynamic random access memory DRAM memory module with a low access frequency exists in a memory system; when a DRAM memory module with a low access frequency exists, transfer, according to a size of a working set in the memory system, page data that does not belong to the working set to a non-volatile memory NVM memory module, where the page data that does not belong to the working set is page data that does not need to be accessed when a process runs within preset time.Type: GrantFiled: April 13, 2015Date of Patent: March 27, 2018Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Yongbing Huang, Mingyu Chen, Yuan Ruan
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Patent number: 9916876Abstract: An apparatus with an ultra low power architecture is described herein. The apparatus includes a first power supply rail, wherein a plurality of subsystems are to be powered by the first power supply rail. The apparatus also includes a second power supply rail, wherein a plurality of autonomous subsystems are to be powered by the power supply rail, wherein the second power supply rail is to be always on, always available, and low power.Type: GrantFiled: July 21, 2014Date of Patent: March 13, 2018Assignee: Intel CorporationInventors: Suketu R. Partiwala, Prashanth Kalluraya, Bruce L. Fleming, Shreekant S. Thakkar, Kenneth D. Shoemaker, Sridhar Lakshmanamurthy, Sami Yehia, Joydeep Ray
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Patent number: 9910481Abstract: In an embodiment, a processor a plurality of cores to independently execute instructions, the cores including a plurality of counters to store performance information, and a power controller coupled to the plurality of cores, the power controller having a logic to receive performance information from at least some of the plurality of counters, determine a number of cores to be active and a performance state for the number of cores for a next operation interval, based at least in part on the performance information and model information, and cause the number of cores to be active during the next operation interval, the performance information associated with execution of a workload on one or more of the plurality of cores. Other embodiments are described and claimed.Type: GrantFiled: February 13, 2015Date of Patent: March 6, 2018Assignee: Intel CorporationInventors: Victor W. Lee, Daehyun Kim, Yuxin Bai, Shihao Ji, Sheng Li, Dhiraj D. Kalamkar, Naveen K. Mellempudi
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Patent number: 9904350Abstract: A recognition device includes a storage unit, an acquiring unit, a first calculator, a second calculator, a determining unit, and an output unit. The storage unit stores multiple training patterns each belonging to any one of multiple categories. The acquiring unit acquires a recognition target pattern to be recognized. The first calculator calculates, for each of the categories, a distance histogram representing distribution of the number of training patterns belonging to the category with respect to distances between the recognition target pattern and the training patterns belonging to the category. The second calculator analyzes the distance histogram of each of the categories to calculate confidence of the category. The determining unit determines a category of the recognition target pattern from the multiple categories by using the confidences. The output unit outputs the category of the recognition target pattern.Type: GrantFiled: December 10, 2013Date of Patent: February 27, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventors: Hiroyoshi Haruki, Masaya Tarui, Koichi Fujisaki, Tetsuro Kimura, Tatsunori Kanai, Junichi Segawa, Satoshi Shirai, Yusuke Shirota, Akihiro Shibata, Shiyo Yoshimura, Haruhiko Toyama
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Patent number: 9898067Abstract: A technique to change a thermal design power (TDP) value. In one embodiment, one or more environmental or user-driven changes may cause a processor's TDP value to be changed. Furthermore, in some embodiments a change in TDP may alter a turbo mode target frequency.Type: GrantFiled: April 1, 2016Date of Patent: February 20, 2018Assignee: INTEL CORPORATIONInventors: Eric Distefano, Guy M. Therien, Vasudevan Srinivasan, Tawfik M. Rahal-Arabi, Venkatesh Ramani, Ryan D. Wells, Stephen H. Gunther, Jeremy J. Shrall, James G. Hermerding, II
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Patent number: 9898308Abstract: Disclosed is a method for controlling a computing apparatus including a cover having a display on one surface facing into a keyboard when the cover is in a closed state. The method comprises, in response to receiving a command to turn on an automatic booting mode of the computing apparatus, storing a configuration value corresponding to an ON state of the automatic booting mode in a memory; when the cover is in the closed state, detecting an opening of the cover via a sensor of the computing apparatus; and, in response to detecting the opening of the cover when a system status of the computing apparatus is an S5 state defined by the Advanced Configuration and Power Interface (ACPI) standard, performing, via a controller of the computing apparatus, an operation of entering from the S5 state to an S0 state defined by the APCI standard based on the configuration value stored in the memory.Type: GrantFiled: March 15, 2017Date of Patent: February 20, 2018Assignee: LG ELECTRONICS INC.Inventors: Junghoon Park, Gwiro Lee
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Patent number: 9891689Abstract: According to one embodiment, a semiconductor integrated circuit includes the following configuration. A arithmetic processing circuit includes a first processor core performing arithmetic processing and a common unit containing a cache memory storing data and programs, and the first processor core or the common unit is divided into a first circuit and a second circuit. The first clock gating circuit supplies or stops a clock to the first circuit. The first power switch supplies or cuts off a power supply voltage to the first circuit. The second clock gating circuit supplies or stops the clock to the second circuit. The second power switch supplies or cuts off the power supply voltage to the second circuit. The controller controls the clock gating circuits and the power switches.Type: GrantFiled: November 20, 2015Date of Patent: February 13, 2018Assignee: Kabushiki Kaisha ToshibaInventor: Yoshihisa Kohara
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Patent number: 9891693Abstract: A storage system including a storage device comprising a media configured to store data, wherein the storage device is configured to be in a first operating mode or a second operating mode comprising a reduced power mode relative to the first operating mode, a communications port configured to connect to an electronic device, the communications port comprising one or more data lines configured to communicate data to the electronic device and to configure power supplied to the electronic device, and one or more controllers. The one or more controllers are configured to control an operation of the storage device, communicate data to the electronic device using the one or more data lines when the storage device is in the first operating mode, and configure power supplied to the electronic device using the one or more data lines when the storage device is in the second operating mode.Type: GrantFiled: May 24, 2013Date of Patent: February 13, 2018Assignee: Western Digital Technologies, Inc.Inventor: Barry L. Klein
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Patent number: 9888507Abstract: Embodiments discussed herein refer to systems, methods, and circuits for establishing EHF contactless communications links. The EHF contactless communication link may serve as an alternative to conventional board-to-board and device-to-device connectors. The link may be a low-latency protocol-transparent communication link capable of supporting a range of data rates. The link may be established through a close proximity coupling between devices, each including at least one EHF communication unit. Each EHF unit involved in establishing an EHF communication link may progress through a series of steps before data can be transferred between the devices. These steps may be controlled by one or more state machines that are being implemented in each EHF communication unit.Type: GrantFiled: March 13, 2014Date of Patent: February 6, 2018Assignee: KEYSSA, INC.Inventors: Ian A. Kyles, Ken Kveton, Mike Bourdess, John Wolcott, Steve Novak, Roger D. Isaac, Gary D. McCormack
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Patent number: 9876955Abstract: A standby process controller includes a mode control unit which is on standby without starting a standby-in process when a power-off signal is detected, stops audio and image output of an operation execution unit, sets a pre-standby mode to an electronic device so as to allow a standby-in process to be started and ended at any time, and releases the setting of the pre-standby mode when a power-on signal is detected, and a standby-in process start control unit which starts the standby-in process when a predetermined time elapses since the pre-standby mode is set. A standby-out process can be immediately performed in a case where a user performs a power-on operation within several seconds after a power-off operation is performed.Type: GrantFiled: May 27, 2016Date of Patent: January 23, 2018Assignee: ALPINE ELECTRONICS, INC.Inventors: Hironori Kurosaki, Yuji Hirose, Yoshinori Fujino
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Patent number: 9858234Abstract: A protocol transparent retimer circuit monitors certain link layer control signals, detects far-end receiver parameters of the link partners, and detects attributes of the data signal on the link to determine the link status and operate the retimer in accordance with the determined link status. By combining and reducing host and device system states into a few retimer states, the retimer circuit is largely simplified and yet still serves its purpose. The retimer includes a controller that employs a state machine to interpret the monitored and detected signals to determine the link state and operate the retimer in an operating state corresponding to the determined link state. The approach enables the retimer to restore signal integrity and forward what ever it receives in both downstream and upstream directions of the link without frequency alteration.Type: GrantFiled: July 17, 2015Date of Patent: January 2, 2018Assignee: PARADE TECHNOLOGIES, LTD.Inventors: Jian Chen, Ming Qu, KC Lee, Zhengyu Yuan, Qing Ouyang
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Patent number: 9854530Abstract: An apparatus and method for reducing power consumption of a portable terminal are provided. More particularly, an apparatus and method for reducing power consumption generated in an idle state in order to solve a power consumption problem in a portable terminal are provided. The apparatus includes a state determination unit which is configured independently from an application processor for controlling applications and which wakes up when entering an idle mode to allow the application processor to sleep, and thereafter determines a state of the portable terminal, and if it is determined that the portable terminal escapes from the idle mode, allows the application processor to wake up.Type: GrantFiled: November 8, 2016Date of Patent: December 26, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hee-Jun Song, Kwang-Choon Kim, Nam-Woo Kim, Sung Kwon, Yu-Jin Lee
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Patent number: 9854526Abstract: A method of controlling power consumption of a voice activation system in a mobile platform includes monitoring one or more sensors of the mobile platform. Next, it is determined whether a microphone of the mobile platform is concealed or obstructed in response to the monitoring of the one or more sensors. If so, the mobile platform transitions one or more components of the voice activation system from a normal power consumption power state to a low power consumption state.Type: GrantFiled: January 28, 2015Date of Patent: December 26, 2017Assignee: QUALCOMM IncorporatedInventors: Qing Xu, Carlos Manuel Puig, Shankar Sadasivam
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Patent number: 9838003Abstract: A detection circuit includes a first transistor coupled to a gate of a high power transistor, a second transistor whose source is coupled to a drain of the first transistor, a first voltage divider coupled to a source of the first transistor, and a second voltage divider coupled to the source of the second transistor. The first transistor is configured to generate a first transistor output voltage representative of a gate voltage of the high power transistor shifted based on a first gate-to-source voltage of the first transistor. The second transistor is configured to generate a second gate-to-source voltage substantially equal to the first gate-to-source voltage. The first divider is configured to divide the first transistor output voltage by a first factor. The second divider is configured to divide the second gate-to-source voltage by a second factor correlated with the first factor.Type: GrantFiled: July 14, 2016Date of Patent: December 5, 2017Assignee: Texas Instruments IncorporatedInventor: Sudheer Prasad
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Patent number: 9829950Abstract: Power management for a virtual machine farm in which each hypervisor respectively serving each virtual machine platform in the farm is provided with an extended hypervisor function coacts with functions provided by the connection broker and the manual configuration interface of the virtual machine farm management server for managing each respective virtual machine platform to maximize the time that each platform is in the reduced power state.Type: GrantFiled: May 26, 2009Date of Patent: November 28, 2017Assignee: Lenovo Enterprise Solutions (Singapore) PTE., LTD.Inventors: James J Bozek, Kellie Francis, Edward Stanley Suffern, James Lee Wooldridge
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Patent number: 9832325Abstract: An information processing apparatus includes a plurality of human body detecting sensors that detect a user, each of the human body detecting sensors having a detection area for detecting the presence of the user; an operation part that receives an operation by the user; and an erroneous detection determination part that determines an erroneous detection if the operation part does not receive the operation by the user within a predetermined time after one of the human body detecting sensors detects the presence of the user. If a number of erroneous detections of the one of the human body detecting sensors is equal to or more than a first threshold, the erroneous detection determination part sends an instruction to reduce the detection area to the one of the human body detecting sensors and sends an instruction to increase the detection area to another one of the human body detecting sensors.Type: GrantFiled: March 14, 2016Date of Patent: November 28, 2017Assignee: RICOH COMPANY, LTD.Inventor: Yuichi Nagasawa
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Patent number: 9830964Abstract: Individual first ones of a plurality of non-volatile logic element arrays are designated to restore first in response to entering a wakeup or restoration mode. These non-volatile logic element arrays include instructions for an order in which other non-volatile logic element arrays are to be restored next. So configured, the processing device can be set to have one or more NVL arrays restored first, which arrays are pre-configured to guide further wakeup of the device through directed restoration from particular NVL arrays. Certain NVL arrays can be skipped if the functions stored therein are not needed, and the order of restoration of others can be tailored to a particular wakeup time and power concern through restoration in parallel, serial, or combinations thereof.Type: GrantFiled: February 19, 2013Date of Patent: November 28, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Steven Craig Bartling, Sudhanshu Khanna
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Patent number: 9830116Abstract: A method of printing device discovery includes, with a low energy wireless (LEW) device within the printing device, sending a number of announcement messages. The printing device is in a sleep mode. The method further includes waking up the printing device upon receiving a response to the announcement messages from a mobile computing device. An LEW connection is established with the mobile computing device. The method further includes creating a second non-LEW wireless connection between the printing device and the mobile computing device.Type: GrantFiled: October 23, 2014Date of Patent: November 28, 2017Assignee: Hewlett-Packard Development Company, L.P.Inventors: Smith Kennedy, Alan C Berkema, David O Hamilton, Kenneth K Smith, David W Kinkley
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Patent number: 9829958Abstract: Power saving systems and methods for Universal Serial Bus (USB) systems are disclosed. When a USB physical layer (PHY) enters a U3 low power state, not only are normal elements powered down, but also circuitry within the USB PHY associated with detection of a low frequency periodic signal (LFPS) wake up signal is powered down. A low speed reference clock signal is still received by the USB PHY, and a medium speed clock within the USB PHY is activated once per period of the low speed reference clock signal. The medium speed clock activates the signal detection circuitry and samples a line for the LFPS. If no LFPS is detected, the signal detection circuitry and the medium speed clock return to low power until the next period of the low speed reference clock signal. If the LFPS is detected, the USB PHY returns to a U0 active power state.Type: GrantFiled: May 10, 2016Date of Patent: November 28, 2017Assignee: QUALCOMM IncorporatedInventors: Chad Everett Winemiller, Jon Raymond Boyette, Russell Coleman Deans, Zhi Zhu
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Patent number: 9820227Abstract: The power consumption of a mobile station is reduced according to the conditions of use by a user without stopping packet communication necessary for the user. In a program for a base station apparatus, a request for establishing radio connection and information indicating the conditions of use of the mobile station apparatus are acquired from the mobile station apparatus (step S1). When the information indicating the conditions of use indicates the use of the mobile station apparatus, a first timer is set for a relatively long time whereas when the information indicating the conditions of use indicates the non-use of the mobile station apparatus, the first timer is set for a relatively short time.Type: GrantFiled: July 28, 2014Date of Patent: November 14, 2017Assignee: SHARP KABUSHIKI KAISHAInventors: Yuichi Nobusawa, Shinichi Sawada
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Patent number: 9817469Abstract: In an embodiment, a digital power estimator (DPE) may be provided that may monitor the processors to estimate the amount of power being consumed. If the estimate exceeds a power threshold, the DPE may throttle one or more of the processors. Additionally, throttling events may be monitored to determine if a change in the operating point is desired. In one embodiment, the DPE throttling events may be counted, and if the counts exceed a count threshold, a change in the operating point to a reduced operation point may be requested. Additionally, if the DPE estimate is below the power threshold (or a second power threshold), a second count of events may be maintained. If the second count exceeds a threshold and the operating point is the reduced operating point, a return to the original operating point may be requested.Type: GrantFiled: October 21, 2015Date of Patent: November 14, 2017Assignee: Apple Inc.Inventor: Jong-Suk Lee
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Patent number: 9811770Abstract: An image forming apparatus dynamically determines the next communication timing with a server to thereby increase a power saving effect by preventing unnecessary release of the power saving state. The image forming apparatus having a first power state and a second power state in which power is saved more than in the first power state, and having a plurality of functions of periodically communicating with an external apparatus. A remaining time before the image forming apparatus next communicates with the external apparatus is calculated for each of the plurality of functions of periodically communicating with the external apparatus. There is set, in a timer, the shortest one from among the calculated plurality of remaining times. A power state of the image forming apparatus transits from the second power state to the first power state according to the remaining time set in the timer.Type: GrantFiled: May 25, 2016Date of Patent: November 7, 2017Assignee: CANON KABUSHIKI KAISHAInventor: Kensuke Kawajiri
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Patent number: 9804659Abstract: An on-chip sensor hub fabricated on a chip with a main processor of a mobile device, and the mobile device, and a method for multi-sensor management on the mobile device. An on-chip sensor hub includes a co-processor and uses an inter-process communication interface. The co-processor and main processor of the mobile device are fabricated on the same chip and communicate with each other via the inter-process communication interface. The co-processor controls a plurality of sensors in the mobile device in accordance with requests issued from the main processor. The co-processor further collects and manages sensor data from the sensors to be processed by the main processor.Type: GrantFiled: November 3, 2015Date of Patent: October 31, 2017Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.Inventors: Deming Gu, Zhou Hong
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Patent number: 9804782Abstract: A setting associated with a number of command execution units to enable is received at a host controller. The host controller is used to configure a plurality of command execution units so that the number of command execution units specified by the setting are enabled. The enabled command execution units are used to process one or more commands associated with storage.Type: GrantFiled: October 9, 2015Date of Patent: October 31, 2017Assignee: SK Hynix Memory Solutions Inc.Inventors: Shengkun Bao, Ananthanarayanan Nagarajan, Kin Ming Chan
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Patent number: 9804647Abstract: A continuously powered field device for use in a process control system includes a field device housing, a primary power port disposed within or connected to the field device housing, and a power source switching module comprising a first power terminal, a second power terminal, and a third power terminal. The first power terminal is coupled to the primary power port, and the third power terminal is configured to deliver power applied to the third power terminal to at least a portion of the field device. The power source switching module is operable in a first state of operation to couple the first power terminal to the third power terminal, and the power source switching module is operable in a second state of operation to couple the second power terminal to the third power terminal.Type: GrantFiled: January 6, 2012Date of Patent: October 31, 2017Assignee: FISHER CONTROLS INTERNATIONAL LLCInventors: Davin S. Nicholas, Mitchell S. Panther
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Patent number: 9804795Abstract: A memory including non-volatile memory. The memory system also includes a controller that controls data transfer between a host and the non-volatile memory, and a power supply unit that supplies a voltage to the controller. Further, the controller includes a power supply control unit that determines the voltage supplied to a module in the controller on the basis of an operation condition determined with the host. The power supply unit adjusts the voltage supplied to the module in accordance with a command from the power supply control unit.Type: GrantFiled: March 4, 2016Date of Patent: October 31, 2017Assignee: TOSHIBA MEMORY CORPORATIONInventors: Yoon Tze Chin, Norikazu Yoshida, Mitsuru Anazawa
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Patent number: 9798370Abstract: In the context of computer systems, the present invention broadly contemplates the ability to dynamically adjust the voltage and frequency of DRAM memory modules that are dual-voltage tolerant based on system performance. The invention allows a computer system to dynamically scale the memory voltage between a lower and a higher voltage, thereby allowing the system to save power when the system is idle or in low usage, but also allowing the system to realize the full memory performance when running more intensive applications.Type: GrantFiled: March 30, 2009Date of Patent: October 24, 2017Assignee: Lenovo (Singapore) Pte. Ltd.Inventors: Marc R. Pamley, Jose M. Orro, William F. Keown, Jr., Albert V. Makley
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Patent number: 9794439Abstract: An image forming apparatus includes a first controller, a display panel, a touch panel, a timer, a first storage unit storing a timeout period, and a first communication unit communicating with an external apparatus. When a user selects a predetermined service provided by the image forming apparatus, the first storage unit changes the timeout period to a value obtained from an external apparatus providing the selected service. The first controller uses the changed timeout period to determine whether or not a timeout process is to be performed.Type: GrantFiled: June 25, 2015Date of Patent: October 17, 2017Assignee: SHARP KABUSHIKI KAISHAInventor: Daisuke Nago
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Patent number: 9786370Abstract: According to one embodiment of the present disclosure, a device comprises a latching circuitry, where the latching circuitry comprises at least one correlated electron random access memory (CeRAM) element. The latching circuitry further comprises a control circuit coupled to the at least one CeRAM element. The control circuit is configured to receive at least one control signal. Based on the at least one control signal, perform at least one of storing data into the latching circuitry and outputting data from the latching circuitry.Type: GrantFiled: February 23, 2016Date of Patent: October 10, 2017Assignee: ARM Ltd.Inventors: Robert Campbell Aitken, Vikas Chandra, Bal S. Sandhu, George McNeil Lattimore, Shidhartha Das, John Philip Biggs, Parameshwarappa Anand Kumar Savanth, James Edward Myers
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Patent number: 9787704Abstract: Systems and methods may include receiving first data of components, which may represent performance characteristics of the components at a first time. The systems and methods may include performing a first cluster analysis of the first data to identify clusters of the components with similar characteristics. The systems and methods may include receiving second data of the components, which may represent performance characteristics of the components at a second time. The systems and methods may include performing a second cluster analysis of the second data to identify clusters of the components with similar characteristics. The systems and methods may include determining whether a component transitioned from a cluster identified in the first cluster analysis to a different cluster identified in the second cluster analysis. The systems and methods may include determining that an anomaly occurred in response to determining that the component transitioned from the cluster to the different cluster.Type: GrantFiled: March 6, 2015Date of Patent: October 10, 2017Assignee: CA, Inc.Inventors: Debra J. Danielson, Steven L. Greenspan, James D. Reno, Prashant Parikh
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Patent number: 9785760Abstract: A computer implemented method and apparatus for managing software entitlements. The method comprises receiving a user request to enable access to a first software product that requires a special entitlement, wherein the user is entitled to access one or more second software products that require a corresponding one or more general entitlements, and wherein the first software product and the one or more second software products are resident in a memory accessible via a single access portal; verifying a user entitlement to the first software product requiring the special entitlement; and providing a license to enable access to the first software product that requires the special entitlement and the one or more second software products that require the general entitlement.Type: GrantFiled: November 14, 2013Date of Patent: October 10, 2017Assignee: ADOBE SYSTEMS INCORPORATEDInventors: Sanjeev Kumar Biswas, Daniel Carl Brotsky, Pradeep Cyril Ekka
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Patent number: 9780644Abstract: An apparatus includes: a voltage regulator that outputs a voltage responsive to an enable signal; a power managed domain coupled to the voltage regulator and including a clock generator configured to output a clock signal from the clock generator; and an always on domain. The always on domain receives the clock signal. The always on domain includes a finite state machine coupled to receive the clock signal and receiving a shutdown request signal. The finite state machine is configured to output a signal to control power to the power managed domain and to disable the clock generator, responsive to the shutdown request signal. The finite state machine receives an asynchronous wake signal, and circuitry in the always on domain is coupled to enable power to the power managed domain and to the clock generator, responsive to the asynchronous wake input signal.Type: GrantFiled: July 26, 2016Date of Patent: October 3, 2017Assignees: TEXAS INSTRUMENTS INCORPORATED, TEXAS INSTRUMENTS DEUTSCHLAND GMBHInventors: Swapnil Anilkumar Tapadia, Bernd Schneider
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Patent number: 9774753Abstract: There is provided a technique of appropriately shifting an image forming apparatus to a power saving state in consideration of the use status of an external device such as a connected USB device. When a condition for shifting to a sleep state is satisfied, the CPU of the image forming apparatus determines whether or not a setting of a sleep shift at the time of use of the USB device is “permit”. If it is determined that the setting of the sleep shift at the time of use of the USB device is “do not permit”, the CPU determines whether or not the connected USB device is in use. If it is determined that the USB device is not in use, the CPU shifts the image forming apparatus to the sleep state.Type: GrantFiled: May 11, 2016Date of Patent: September 26, 2017Assignee: Canon Kabushiki KaishaInventor: Shinichi Chiba
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Patent number: 9760150Abstract: A method of entering a power conservation state comprises selecting and entering one of a plurality of low power states for the computer system in response to a detected system idle event. The plurality of low power states comprise a first low power state and a second low power state for the computer system. A memory of the computer system is self refreshed during the first low power state. A baseband module of the computer system remains powered, and the memory is accessible to the baseband module during the second low power state. The one low power state is selected depending upon baseband module activity. The method also includes exiting from the one of a plurality of low power states when a wake event is detected.Type: GrantFiled: November 27, 2012Date of Patent: September 12, 2017Assignee: NVIDIA CorporationInventors: Sagheer Ahmad, Pete Cumming, Brad Simeral, Matthew Longnecker, Sudeshna Guha
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Patent number: 9760295Abstract: According to one embodiment, a memory system includes a plurality of memories, a plurality of first processing units, and a second processing unit. The plurality of first processing units are respectively connected to one of the memories. The second processing unit sequentially distributes a plurality of first data inputted externally sequentially to the plurality of first processing units. Each of the first processing units outputs first data distributed thereto to the one of the memories. The second processing unit, until finishing transmission of a second data to one of the first processing units, keeps the others of the first processing units standing by outputting already-distributed first data. The second data is a last data from among the plurality of first data inputted externally.Type: GrantFiled: March 6, 2015Date of Patent: September 12, 2017Assignee: TOSHIBA MEMORY CORPORATIONInventor: Noritsugu Yoshimura
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Patent number: 9753525Abstract: Systems, methods, and devices are disclosed for mitigating voltage droop in a computing device. An example apparatus includes a plurality of threshold registers to store respective voltage droop thresholds, and an interface to receive a license grant message indicating a license mode for a processor core or domain. The license mode corresponds to a selected set of execution units in the processor core or domain. The apparatus also includes a voltage droop correction module to, based on the license mode indicated in the license grant message, select one of the voltage droop thresholds from the plurality of voltage droop registers, and compare a voltage droop in the processor core or domain with the selected voltage droop threshold. Based on the comparison, the apparatus triggers a voltage droop correction process.Type: GrantFiled: December 23, 2014Date of Patent: September 5, 2017Assignee: INTEL CORPORATIONInventors: Nazar S. Haider, Dean Mulla, Allen W. Chu
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Patent number: 9746904Abstract: A method and apparatus for recovering from a low power state in a computing system is disclosed. In one embodiment of the method, the computing system enters the low power state from a standard power state after an activity detector indicates a user controlled peripheral device connected to the computer system has been inactive for a period of time. To enter the low power state, the method disconnects the user controlled peripheral device from a host controller, while continuing to supply power to the user controlled peripheral device and shutting off power to the host controller. The method returns the computer system to the standard power state when the activity detector indicates the user controlled peripheral device has become active. To return to the standard power state, power is restored to the host controller and the user controlled peripheral device is reconnected to the host controller.Type: GrantFiled: April 23, 2015Date of Patent: August 29, 2017Assignee: APPLE INC.Inventors: Fiyinfolu O. Adewale, Paul J. Costa, David R. Cox, Michael J. Giles, Steven I. Kuo, Nicholas W. Ruhter, Steven J. Sfarzo
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Patent number: 9746906Abstract: Apparatus and techniques relating to data interface power consumption control are disclosed. Components of a data transfer module may be selectively moved between their normal operating states and reduced power states at times when the data transfer module is not to be used for transferring data. Decisions as to particular components that are to be moved to their reduced power states may be based on respective timing characteristics of the components and/or respective power consumption characteristics of the components, for example. In some embodiments, an action may be performed to reduce a powering up time of the data transfer module when normal operation of the data transfer module is to resume. In the case of a multiple-connection interface having respective data transfer modules for each connection, the interface may be partially shut down by moving a subset of the data transfer modules into reduced power states.Type: GrantFiled: July 2, 2015Date of Patent: August 29, 2017Assignee: INPHI CORPORATIONInventors: Fredrik Olsson, Shawn Lawrence Scouten, Ryan Patrick Donohue
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Patent number: 9733853Abstract: A method for a dispersed storage network (DSN) begins by selecting a first subset of storage units for temporary deactivation based on a write threshold number. The method continues by issuing a request message to temporarily deactivate the selected first subset storage units as deactivated storage units and, while the first subset of storage units are deactivated, maintaining a write threshold number of encoded data slices for each set of encoded data slices of data in remaining storage units and detecting, as new data is stored to the remaining storage units, a storage imbalance between the remaining storage units and the deactivated storage units. The method continues by selecting a second subset of storage units for temporary deactivation, issuing a request message to the deactivated storage units to reactivate the deactivated storage units as reactivated storage units, facilitating storage rebalancing and temporarily deactivating the second subset of storage units.Type: GrantFiled: November 4, 2016Date of Patent: August 15, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jason K. Resch, Ethan S. Wozniak
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Patent number: 9729075Abstract: A circuit and method for providing an improved efficiency for a DCDC converter. A power converter, comprising a buck converter comprising an adaptive output, an adaptive transconductance block configured to evaluate resistive power terms, a multiplier block configured to provide capacitive power terms, and a comparator configured to compare resistive power and capacitive power terms for determining the selection of the branches of said adaptive output. The method for improved efficiency includes providing a switching converter with an adaptive output stage comprising the steps of providing a switching converter, evaluate capacitive power loss, evaluate resistive power loss, compare capacitive power loss and resistive power loss, and lastly adapting the output stage size.Type: GrantFiled: May 15, 2015Date of Patent: August 8, 2017Assignee: Dialog Semiconductor (UK) LimitedInventors: Kemal Ozanoglu, Selcuk Talay
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Patent number: 9720487Abstract: Durations of power management states are predicted on a per-process basis. Some embodiments include storing, in one or more data structures associated with one or more processes, information indicating previous durations of a power management state associated with the process(es). Some embodiments also include predicting a subsequent duration of the power management state for the process(es) using information stored in the data structure(s).Type: GrantFiled: January 10, 2014Date of Patent: August 1, 2017Assignee: Advanced Micro Devices, Inc.Inventors: William L. Bircher, Madhu Saravana Sibi Govindan, Manish Arora, Michael J. Schulte, Nuwan S. Jayasena
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Patent number: 9723083Abstract: In accordance with an example embodiment of the present invention, there is provided a method, comprising exchanging connectivity information, setting up a connection, determining that a correspondent node has at least one access in an inactive state, and transmitting a request to the correspondent node to activate at least one of the at least one access in an inactive state. The setting up may be done based on the exchanged connectivity information.Type: GrantFiled: December 14, 2009Date of Patent: August 1, 2017Assignee: Nokia Technologies OyInventors: Jukka Pekka Reunamaki, Arto Tapani Palin
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Patent number: 9706031Abstract: A mobile phone 10 comprises a display 14, a touch panel 16 provided on the display 14, etc., and a screen lock state that a performance of a predetermined function (mail function or the like) based on a touch operation is invalidated is set. The screen lock state is set if an end key 22b is operated and the display 14 is turned off, for example. Then, the user can cancel the screen lock state by performing a canceling operation. In a case where the display 14 is turned off through an operation of a turn-off key (70), the display 14 is temporarily turned off. In such a case, it is possible for the user to restore the displaying of the display 14 to an original state thereof by operating the end key 22b or the like without canceling operation.Type: GrantFiled: January 10, 2013Date of Patent: July 11, 2017Assignee: KYOCERA CORPORATIONInventors: Keisuke Nagata, Yoshinori Kida
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Patent number: 9696789Abstract: An apparatus is disclosed that includes a processing sub-system having a plurality of processor circuits and an interrupt control circuit. The interrupt control circuit is configured to, in response to a peripheral interrupt, initiate performance of a task indicated by the peripheral interrupt by at least one of the plurality of processor circuits. The processing sub-system is configured to generate a power-down control signal in response to suspension of the plurality of processor circuits. A power management circuit disables power to the processing sub-system, including the interrupt control circuit, in response to the power-down control signal. The power management circuit enables power to the processing sub-system in response to a power-up control signal. The apparatus also includes a proxy interrupt control circuit configured to generate the power-up control signal in response to receiving a peripheral interrupt and power to the processing sub-system being disabled.Type: GrantFiled: August 18, 2014Date of Patent: July 4, 2017Assignee: XILINX, INC.Inventors: Sagheer Ahmad, Ahmad R. Ansari, Soren Brinkmann
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Patent number: 9699732Abstract: A method of controlling a communication module by an electronic device is provided. The method includes receiving, by a second processor, a specified signal from a first processor informing that the first processor enters an inactive state from an active state, by a second processor, and controlling, by the second processor, a Wireless Fidelity (WiFi) communication function in response to the specified signal. According to an operation state of the first processor, that is, an inactive state such as a sleep state or a power off state, or an active state, a subject which processes WiFi communication is changed. Accordingly, it is possible to efficiently and continuously monitor WiFi communication data and process the WiFi communication data on an accurate period.Type: GrantFiled: April 21, 2015Date of Patent: July 4, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Tae-Yoon Kim, Chae-Man Lim, Hyoung-Joo Lee
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Patent number: 9697149Abstract: A method for generating interrupt requests, the method comprising: receiving, by a first circuit, an indication of an occurrence of an interrupt triggering event; determining whether a time difference between the occurrence of the interrupt triggering event and an occurrence of a last interrupt triggering event that preceded the occurrence of the interrupt triggering event exceeded a threshold; generating, by the first circuit, an interrupt request in response to the occurrence of the interrupt triggering event if the time difference exceeded the threshold; and delaying, for a predetermined delay period after a generation of a last interrupt request, a generating of the interrupt request that is responsive to the occurrence of the interrupt triggering event if the time difference is shorter than the threshold.Type: GrantFiled: September 16, 2013Date of Patent: July 4, 2017Inventors: Said Bshara, Erez Izenberg, Yaniv Shapira, Nafea Bshara
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Patent number: 9692924Abstract: An image forming apparatus includes: an accepting unit to accept user operations to transition the apparatus from a standby state to a power save state; a detecting unit to detect objects around the apparatus; and a power control unit to transition the apparatus from the power save state to the standby state according to detection of an object by the detecting unit, and to transition the image forming apparatus from the standby state to the power save state according to user operations accepted at the accepting unit. The power control unit prohibits the apparatus from transitioning from the power save state to the standby state according to the detection of the object, until a user, which performed operations accepted by the accepting unit to transition the apparatus from the standby state to the power save state, thereafter ceases to be detected by the detecting unit.Type: GrantFiled: September 2, 2015Date of Patent: June 27, 2017Assignee: CANON KABUSHIKI KAISHAInventor: Takeru Imamura
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Patent number: 9684294Abstract: Techniques for using a multi-core processor for optimizing power consumption in a security and home automation system are described. The security and home automation system may include a multi-core processor having a first core and a second core. The first core may be partitioned from the second core to form an asymmetric multi-core processor. The first core is a master core assigned to execute a real time operating system (RTOS) and configured to periodically transition between a partial sleep state and an awake state during a power shortage condition. The second core is a slave core assigned to execute a standard operating system (OS) and configured to enter a deep sleep state during the power shortage condition.Type: GrantFiled: January 9, 2015Date of Patent: June 20, 2017Assignee: TYCO SAFETY PRODUCTS CANADA LTD.Inventors: Omid Ehtemam-Haghighi, Shuping Lu, Hector Perez