Abstract: In some implementations, a mobile device can be configured to monitor environmental, system and user events. The occurrence of one or more events can trigger adjustments to system settings. In some implementations, the mobile device can be configured to keep frequently invoked applications up to date based on a forecast of predicted invocations by the user. In some implementations, the mobile device can receive push notifications associated with applications that indicate that new content is available for the applications to download. The mobile device can launch the applications associated with the push notifications in the background and download the new content. In some implementations, before running an application or accessing a network interface, the mobile device can be configured to check energy and data budgets and environmental conditions of the mobile device to preserve a high quality user experience.

Abstract: A system with scalable data collection for system management comprises a plurality of local data collectors and a system collector. Each of the local data collectors is coupled with a corresponding subsystem of the system. Each of the local data collectors is configured to periodically collect power management related data from the corresponding subsystem, and to format the collected power management related data for conveyance along any one of a plurality of channels between the local data collector and the system collector. The system collector is coupled with the plurality of local data collectors via the plurality of channels. The system collector selects from the channels between the system collector and each of the local data collectors based, at least in part, on channel states, and retrieves the power management related data collected by each of the local data collectors along a selected channel for the local data collector.

Abstract: Embodiments of the disclosed invention include a body heat sensing control apparatus and method for automating features of an electronic device based on detection of a user's body heat. For example, in one embodiment, a data processing system is disclosed having a heat sensing mechanism for detecting the body heat of a user. In addition, the data processing system includes a data storage component for storing computer executable instructions and a processing unit for executing the computer executable instructions for enabling a user to configure one or more functions associated with the data processing system that are triggered in response to detecting the presence or absence of the user within the proximity of the data processing system using the heat sensing mechanism.

Abstract: Methods and systems input an energy consumption profile for each of a plurality of different sleep modes available for a device, and input a probability distribution of interjob times for the device. The methods and systems then compute the optimal time-out period for each sleep mode based on the energy consumption profile of each sleep mode and the probability distribution of interjob times. Further, such methods and systems monitor the usage of the device to determine the current interjob time, and switch between sleep modes to relatively lower power sleep modes as the current interjob time becomes larger.

Abstract: Methods and systems for supplying power to multiple voltage islands using a single supply source are disclosed. Aspects of one method may include providing power to a first of a plurality of voltage islands, and individually controlling providing of power to each of a remaining portion of the plurality of voltage islands. For example, when an electronic system is first powered on, a low current voltage source may be used to supply power to a primary voltage island. As a higher current voltage source becomes available, power derived from the higher current voltage source may be provided to the primary voltage island and to secondary voltage islands. Power to each of the secondary voltage islands may be, for example, individually controlled via a power MOS transistor. The power MOS transistor may also be configured to allow a faster blocking time than unblocking time.

Abstract: Synthesizing intermediate performance levels in integrated circuits, and related processor systems, methods, and computer-readable media are disclosed. In one embodiment, a synthesized performance level setting circuit receives an input indicating a synthesized performance mode. The circuit generates a power source selection output to select a first power source providing power to an integrated circuit functional block at a first voltage level, and generate a clock frequency setting output to select a first clock frequency associated with the first voltage level to clock the functional block, for a first predefined time interval. The circuit also generates the power source selection output to select a second power source to provide power at a second voltage level lower than the first voltage level, and generate the clock frequency setting output to select a second clock frequency associated with the second voltage level to clock the functional block, for a second predefined time interval.

Abstract: A method for assessing quality of a transmission channel in a wireless network comprises the steps of a) a first station transmitting a first unicast message to a second station by said transmission channel; b) if no acknowledgement of the first unicast message is received from the second station, the first station transmitting a further unicast message at a higher power level, and c) if an acknowledgment of the first or any further unicast message is received from the second station, assessing the quality of the transmission channel based on the power level or the number of transmissions that were needed to trigger the acknowledgment.

Abstract: While an information handling device is in a reduced power state, the information handling device transitions from the reduced power state to a higher power state in response to receiving a message over an established wireless network connection that maintains a presence on a wireless network. In turn, the information handling device processes the message accordingly in the higher power state.

Abstract: Apparatus and methods of reducing power consumption in solid-state disks (SSDs) that can reduce power levels in SSDs below levels achievable in known SSD reduced power states. The apparatus is a power management subsystem operative to detect whether an SSD subsystem has been enabled to enter a reduced power state, and to receive a control signal from a host directing the power management subsystem to place the SSD subsystem in the reduced power state. In the event the SSD subsystem is enabled to enter the reduced power state and the host asserts the control signal, the power management subsystem effectively disconnects at least a portion of the SSD subsystem from the power rail. In the event power-up clear circuitry asserts a clear signal to the power management subsystem, or the host negates the control signal, the power management subsystem reestablishes the connection between the SSD subsystem and the power rail.

Abstract: Methods and systems may provide for determining a latency constraint associated with a platform and determine an idle window based on the latency constraint. In addition, a plurality of devices on the platform may be instructed to cease one or more activities during the idle window. In one example, the platform is placed in a sleep state during the idle window.

Abstract: A system and method for efficiently caching metadata in a storage system. Addresses from a plurality of I/O accesses to the storage system are captured and then a frequency domain representation of the addresses is generated. The frequency domain representation is used to measure the randomness of the various applications which are accessing the storage system. Scores are generated based on the measure of randomness, and scores are assigned to the various regions of the logical address space. Scores are then assigned to the metadata pages which are stored in the cache based on the region of the logical address space to which the metadata pages correspond. The scores are used when determining which metadata pages to evict from the cache. The cache will attempt to evict those metadata pages which correspond to regions of the logical address space that are servicing random I/O accesses.

Abstract: Methods and apparatus relating to multiple-queue multiple-resource entry sleep and wakeup for power savings and bandwidth conservation in a retry based pipeline are described. In one embodiment, a bit indicates whether a corresponding queue entry is asleep or awake with respect to arbitration for resources in a retry based pipeline. Furthermore, multiple entries from different queues may be grouped together and multiple resources may be grouped together. Other embodiments are also disclosed.

Abstract: A system and method for wireless waking computing devices over a computer network is provided. A signal is broadcast over the network that includes one or more device specific wake-up data sequences. Each device specific wake-up data sequence includes multiple iterations of the hardware address of the wireless network card associated with that device. While in a reduced power or “sleep mode”, the wireless network card monitors wireless channels for packets containing a wake-up data sequence. If a wake-up data sequence is received, the sequence is matched against the hardware address information for that network card. If a match is determined, the network card sends a signal to the computing device causing full system power to be restored. A signal is sent to the network confirming that the device has been successfully woken from the sleep mode.

Abstract: A system and method for facilitating verification of software code. A first program point is selected, from the software code, indicating static analysis warning to be reviewed. Further, review-assisting information including at least one of a set of modification points and a controlling condition are determined for the user to judge whether the warning generated is safe or unsafe. From the set of modification points, non-useful modification points may be filtered out in order to determine only relevant modification points. After filtering, the system presents the review-assisting information (relevant modification points and controlling conditions) in a systematic manner to the user for facilitating verification of the software code.

Abstract: The present invention includes a circuit, system and method for selectively turning off internal clock drivers to reduce operating current. The present invention may be used to reduce power consumption by reducing operating current in a memory device. Operating current may be reduced by turning off internal clock drivers that deliver a clock signal during selected periods of time. According to an embodiment of clock control circuitry of the present invention, an internal clock can be selectively gated in response to a gating signal based in part on idle time and absence of a read or write burst operation. Methods, memory devices and computer systems including the clock control circuitry and its functionality are also disclosed.

Abstract: Technologies are generally described for systems, devices and methods effective to schedule access to a core. In some examples, a first differential voltage frequency scaling (DVFS) value of a first virtual machine may be received by a virtual machine manager. A second DVFS value of a second virtual machine may be received by the virtual machine manager. A third DVFS value of a third virtual machine may be received by the virtual machine manager. The third DVFS value may be substantially the same as the first DVFS value and different from the second DVFS value. A dispatch cycle may be generated to execute the first, second and third virtual machines on the core. After execution of the first virtual machine, the dispatch cycle may require execution of the third virtual machine before execution of the second virtual machine.

Abstract: Disclosed herein are a universal subscriber identification module card and a communication method using the same. The universal subscriber identification module card includes a Universal Subscriber Identification Module (USIM) chip, a pad, and a security chip. The USIM chip performs the user authentication of a mobile terminal. The pad electrically connects the USIM chip to the mobile terminal when the USIM chip is inserted into the mobile terminal. The security chip performs a security function for the mobile terminal independently of the USIM chip and shares the two power terminals of the pad with the USIM chip.

Abstract: Method and apparatus for activating a slave device are provided. The method including: receiving communication medium scan signals comprising a slave device identifier; controlling a main power supply when the slave device is in an inactive state; determining whether the slave device is completely booted; and executing an upper layer communication when the slave device is completely booted.

Abstract: The aspects enable a computing device or microprocessor to determine a low-power mode that maximizes system power savings by placing selected resources in a low power mode while continuing to function reliably, depending upon the resources not in use, acceptable system latencies, dynamic operating conditions (e.g., temperature), expected idle time, and the unique electrical characteristics of the particular device. The various aspects provide mechanisms and methods for compiling a plurality of low power resource modes to generate one or more synthetic low power resources from which can be selected an optimal low-power mode configuration made up of a set of selected synthetic low power resources.

Abstract: A system and method are provided to improve power efficiency of processor cores, such as processor cores in a multicore processor. A break-even time of a processor core may be determined that affects which power saving mode a processor core should enter when an expected idle of the processor core is identified. The break-even time of the processor core may be determined during run-time to help determine an applicable power saving mode that improves power efficiency of the processor core.

Abstract: Electronic device, accessory, and method for detecting an accessory are provided. The electronic device includes a connector, a control unit, and an audio processing unit. The connector is configured to connect to an accessory and has an audio contact. The control unit has first and second terminals, which are coupled to the audio contact. The control unit is configured to send a command, which is represented by a first serial digital signal, to the accessory through the first terminal and audio contact when the accessory is electrically connected to the connector, and to receive accessory data, which is represented by a second serial digital signal and generated by the accessory in response to the command, through the second terminal and audio contact. The audio processing unit is coupled between the audio contact and control unit, and configured to receive an audio signal from the accessory through the audio contact.

Abstract: A USB (Universal Serial Bus) communication apparatus includes: a driver circuit connected to a USB bus and configured to transmit a packet onto the USB bus for a packet transmission period which is determined based on a transmission request signal from another unit. A receiver control circuit generates a fixation request signal and a generation control signal in response to the transmission request signal. A receiver circuit connected to the USB bus generates a squelch signal showing that the packet is being transmitting onto the USB bus, and stops generating the squelch signal in response to the generation control signal. A line state signal control circuit is configured to output a specific line state signal based on the squelch signal to notify to another unit that the packet is been transmitting onto the USB bus, and to fix the specific line state signal in response to the fixation request signal.

Abstract: A system for supply of power source currents, the system includes: a power source input terminal configured to be supplied with a power source current; a plurality of power source output terminals, coupled to the power source input terminal in parallel, configured to output a power source current; a protecting circuit configured to protect a supply of a excessive power source current to the power source input terminal; a plurality of data signal terminals each corresponding to one of the plurality of power source output terminals; and a connector coupled to at least one pair of one of the plurality of power source output terminals and one of the plurality of data signal terminals.

Abstract: A server is provided in the present disclosure, and the server includes a power module, a motherboard circuit, and a power management circuit. The power management circuit is coupled to the motherboard circuit and the power module. The motherboard circuit receives a remote control signal through a network module and outputs a power-off command to the power management circuit according to the remote control signal. The power management circuit causes the power module to stop supplying power to the motherboard circuit for a predetermined time according to the power-off command. After the predetermined time, the power management circuit causes the power module to supply power again to the motherboard circuit to execute an initialization procedure.

Abstract: A system and method of managing power of a multi-function USB device suspends the device in response to receipt of a request to suspend from a USB host; assigns respective device functions to indefinite, locked or unlocked states; allows the device to resume if there are data or requests for host attention pending at a given function that is in the unlocked state and assigning the given function to the locked state; and otherwise maintains the suspend even if there are data are pending at one or more functions that are in the locked state.

Abstract: An electronic device (100) includes a network interface controller (102) and an input/output controller (110, 202) having a link layer. A portion of the input/output controller is configured to be powered off during a lower power mode of the electronic device, where the first portion contains the link layer. Wakeup logic (108) separate from the input/output controller receives a wake indication from the network interface controller in response to the physical layer receiving a wake message on the network while the electronic device is in the lower power mode. The wakeup logic activates an indication to awaken the electronic device from the lower power mode in response to the wake indication from the network interface controller.

Abstract: A control device for a vehicle network, having a microprocessor and a transceiver. The control device can be switched off or switched to a sleep mode during a previously defined state or event during the operation of the motor vehicle and/or the control device can be awakened from the sleep mode during a previously defined state or event during the operation. The disclosed embodiments also relate to a method for operating a vehicle network.

Abstract: A solid state drive (SSD) interface controller includes a host interface, first and second command interfaces, and an interface information storage unit. The interface information storage unit is configured to store information for determining activation or deactivation of each of the first and second command interfaces, and a capacity allocated to each of the first and second command interfaces. The interface information storage unit may comprise first and second registers storing interface information, which may be changed in response to an extension ROM BIOS executed during a booting operation. The command interfaces may be configured to communicate using interface protocols such as SATA, SATA express, or nonvolatile express. An interface power management unit may cut power to an interface when deactivated based on the stored interface information.

Abstract: An information processing apparatus which is capable of, when hang-up occurs, eliminating the hang-up state and restoring to a normal state without bothering a user. A first power supply unit supplies power to predetermined devices among a plurality of devices, and a second power supply unit supplies power to the plurality of devices. When startup is done with power being supplied to the predetermined devices, software is started by supplying power to all of the plurality of devices. When the second power supply unit is turned on during the startup, whether or not the software has been normally started is determined. When the software has not been normally started, the software is restarted by carrying out an off-on process in which the plurality of devices are reset, the second power supply unit is turned off, and then the second power supply unit is turned on again.

Abstract: In at least one embodiment described herein, an apparatus is provided that can include means for communicating a latency tolerance value for a device connected to a platform from a software latency register if a software latency tolerance register mode is active. The apparatus may also include means for communicating the latency tolerance value from a hardware latency register if a host controller is active. The latency tolerance value can be sent to a power management controller. More specific examples can include means for communicating a latency tolerance value from the software latency register if the software latency tolerance register mode is not active and the host controller is not active. The apparatus can also include means for mapping a resource space in the software latency register for the device using a BIOS/platform driver. The mapping can be achieved using an advanced configuration and power interface device description.

Abstract: In an image forming apparatus, in order to make an engine CPU perform first processing after output of a return request, a main CPU sets a level of a signal line, through which the return request is output, at a first level. In order to make the engine CPU perform second processing, the main CPU sets the level of the signal line at a second level. The engine CPU determines on the basis of the level of the signal line after the output of the return request which processing is to perform, the first processing or the second processing.

Abstract: A method for providing a secure communications link between a home PC and a vehicle through a wireless access point. The method includes providing a wireless connection between a vehicle communications system and the wireless access point and causing a user of the PC to initiate a communication with the vehicle communications system through the wireless access point so as to allow the user to send information to the vehicle from the home PC. The method also includes causing the vehicle communications system to send an authentication challenge to the PC, such as identifying a user name and password, to authorize the user to communicate with the vehicle communications system, and establishing a secure communications link between the vehicle communications system and the PC if the user responds to the challenge with a correct response.

Abstract: Devices and methods for optimizing semi-active workloads are described herein. A network interface device may be configured to offload data packet acknowledgment responsibilities of a host platform by transmitting, to the sender of the packets, acknowledgements of packets received throughout a time duration. Upon completion of the time duration, the network interface device may trigger the host platform to perform batch processing of the data packets received during the time duration.

Abstract: An information processing apparatus capable of reducing time taken to return to a standby state after turn-off of a power switch in a power saving state. A power supply supplies power to a CPU and a RAM in a standby state, supplies power to the RAM without supplying power to the CPU in a second waiting state caused by turning off the power switch, and supplies power to the RAM without supplying power to the CPU in the power saving state caused without having the power switch turned off when a shift-to-power saving state requirement defined in advance is satisfied. A power supply controller causes the apparatus to shift from the second waiting state to the standby state using a standby memory image. The CPU writes the standby memory image in the RAM for storage in the power saving state.

Abstract: An image forming apparatus includes: an accepting unit to accept user operations to transition the apparatus from a standby state to a power save state; a detecting unit to detect objects around the apparatus; and a power control unit to transition the apparatus from the power save state to the standby state according to detection of an object by the detecting unit, and to transition the image forming apparatus from the standby state to the power save state according to user operations accepted at the accepting unit. The power control unit prohibits the apparatus from transitioning from the power save state to the standby state according to the detection of the object, until a user, which performed operations accepted by the accepting unit to transition the apparatus from the standby state to the power save state, thereafter ceases to be detected by the detecting unit.

Abstract: A graphics processing unit (GPU) and a management method of the GPU are provided. The GPU includes at least one graphics engine and an engine manager. The graphics engine performs a video decoding function or a graphics rendering function according to a graphics command from a driver software. The engine manager records a workload index of each graphics engine. The engine manager also adjusts the work ability of one of or more of the at least one graphics engine according to an adjustment command from the driver software. The driver software provides the adjustment command according to the workload index.

Abstract: A computer and a waking method thereof are provided. The computer includes a switch circuit, a chipset, a peripheral component interconnect express (PCIE) device, and an embedded controller. The chipset includes a first wake-up pin and a power button pin, wherein the first wake-up pin is coupled to a terminal of the switch circuit. The PCIE device includes a second wake-up pin, and the embedded controller includes a general purpose input pin and a general purpose output pin. The general purpose input pin and the second wake-up pin are coupled to another terminal of the switch circuit. The general purpose output pin is coupled to the power button pin.

Abstract: A signal generation portion of an image forming apparatus generates a different level of signal according to an output value of a pyroelectric sensor. A recognition portion determines a measurement value on the speed of change of the signal and recognizes which of a first range and a second range the measurement value is. In a power supply portion, when the measurement value falls within the first range in a mode other than a power-saving mode, and the image forming apparatus is brought into the power-saving mode, and, when the measurement value falls within the second range in the power-saving mode, the power-saving mode is cancelled.

Abstract: In one example, a resource manager for an edge device is configured to intelligently distribute streams over the RF channel interface of the edge device. As a result of this intelligent stream distribution by the resource manager, the likelihood that the edge device can power down inactive internal components is significant, especially during periods of low activity.

Abstract: A processor is described that includes a processing core and a plurality of counters for the processing core. The plurality of counters are to count a first value and a second value for each of multiple threads supported by the processing core. The first value reflects a number of cycles at which a non sleep state has been requested for the first value's corresponding thread, and, a second value that reflects a number of cycles at which a non sleep state and a highest performance state has been requested for the second value's corresponding thread. The first value's corresponding thread and the second value's corresponding thread being a same thread.

Abstract: An information processing apparatus capable of suppressing occurrence of a failure in the processing to respond to reception information received from external equipment. In a normal power mode, a CPU of a main controller executes processing to respond to incoming packets, thereby generating response packets. In a power saving mode, a microprocessor of a LAN interface executes processing to respond to incoming packets to generate response packets. During return processing for return from power saving mode to normal power mode, the LAN interface transfers an incoming packet to the main controller and to the microprocessor of the LAN interface.

Abstract: A power-supply control device includes a power-supply-state transition control section, body-capable-of-movement detection sections, and an instruction section. The power-supply-state transition control section shifts a state of an operation target section from one state to another state among power-supply states and a non-power-supply state. The body-capable-of-movement detection sections detect a body capable of movement in a region. The instruction section provides, on the basis of results of detection of the body capable of movement by the body-capable-of-movement detection sections, at least an instruction for shifting between one of the power-supply states and the non-power-supply state, among instructions for shifting the state of the operation target section from one state to another state with the power-supply-state transition control section.

Abstract: Method for avoiding Guest I/O timeout, including generating a request to an I/O device in a Guest Operating System (GOS) running inside a VM; setting a VM timeout deadline; in a hypervisor, setting a supervisory timeout deadline for the I/O device to respond that is shorter than the VM timeout deadline; if no response is received before expiration of the supervisory timeout deadline, pausing the GOS; freezing system time of the GOS; activating a handler for the I/O device response in the hypervisor; upon receipt of the response prior to the supervisory timeout deadline, forwarding the response to the GOS, unpausing the GOS, unfreezing the system time of the GOS; upon receipt of the response after the supervisory timeout deadline, and after the GOS is unpaused by the hypervisor, the Guest OS receives the response from the hardware device; and if no response is received, the GOS is kept paused.

Abstract: An analysis system according to the present invention has a configuration for obtaining power consumption of an image forming apparatus in which a power log has been collected, and controlling a display of the power consumption. In a case where if the image forming apparatus is in a predetermined state, and power consumption of the image forming apparatus in the predetermined state has not been recorded in a log, then the analysis is performed and power consumption in the predetermined state is obtained by using time spent in the predetermined state and power consumption per unit time of the image forming apparatus in the predetermined state.

Abstract: Methods and systems of initiating a backup process of data stored on a computer are described. One method calls for the data to be backed up to be identified. A backup event trigger is defined, and the computer is monitored for the occurrence of the backup event trigger. If the trigger occurs, a balancing heuristic is applied, to determine whether to initiate the backup process.

Abstract: Embodiments of the invention describe methods, apparatuses and systems for providing an efficient low power exit sequence for peripheral devices. In embodiments of the invention, a signal from a host device is transmitted to a SATA peripheral device for exiting a low-power state. An initialization time for OOB transmission and reception logic of the SATA peripheral device is tracked, and a reference time value based on the tracked initialization time is stored. In subsequent transitions from said low-power state, the reference time value for waking a host physical layer is utilized, thereby improving the efficiency of the management and use of said low power state. In some embodiments, the above described tracked initialization comprises a time from a transmission of an OOB signal (from the host to the peripheral device) to receiving an OOB response at the host device from the SATA peripheral device.

Abstract: Embodiments of the invention relate to multiview displays. Methods and apparatus are provided for receiving input parameters, evaluating the input parameters to determine resolution settings within the display constraints, and outputting the resolution settings to the multiview display to control display of image data. The resolution settings include color, temporal, spatial and view resolutions. The input parameters include viewer tracking information and content information associated with the image data. Some embodiments provide for determination of view resolution and/or power settings for the display based on viewer tracking information.

Abstract: In one embodiment, an illustrative technique determines when an end-user is within a specified proximity of a client device configured to provide an interface to a virtual machine. In response to the end-user being within the specified proximity of the client device, the technique may then allocate data center resources for the virtual machine.

Abstract: A method and apparatus for exiting a low power state based on a prior prediction is disclosed. An integrated circuit (IC) includes a functional unit configured to, during operation, cycle between intervals of an active state and intervals of an idle state. The IC also include a power management unit configured to place the functional unit in a low power state responsive to the functional unit entering the idle state. The power management unit is further configured to preemptively cause the functional unit to exit the low power state at a predetermined time after entering the low power. The predetermined time is based on a prediction of idle state duration made prior to entering the low power state. The prediction may be generated by a prediction unit, based on a history of durations of intervals in which the functional unit was in the idle state.

Abstract: Methods and devices employing circuitry for quickly discharging pixels of a display before the display is turned off are provided. In one example, a method may include receiving at the electronic display a signal indicating the electronic display will be powered off within a period of time. The method may also include, in response to the signal, causing a frame of pixel data originating from the electronic display to be stored in pixels of the electronic display before the electronic display is powered off. Storing the frame of pixel data in the pixels may inhibit image artifacts from occurring on the electronic display when the electronic display is powered back on in the future.