Abstract: Disclosed is a storage system architecture. An Environmental service module (ESM) is coupled to one or more array controllers. The ESM is configured with a central processing unit and one or more assist functions. The assist functions may include nonvolatile memory. This nonvolatile memory may be used for write caching, mirroring data, and/or configuration data. The assist functions, or the ESM, may be controlled by the array controllers using SCSI or RDMA commands.

Abstract: A readily scalable modular progammable integrated circuit (IC) with improved power management is provided. An IC is described that contains one master controller module and a multiplicity of slave modules that include power-supplying functions, battery management functions, and analog and digital input-output functions. The master controller module configures the slave modules by writing data to the slave modules' configuration registers through the communication network. Each module contains a multiplicity of configuration registers that determine the module's operational and parametric characteristics. Programmability is achieved by configuring the modules to respond to appropriate signals on the configurable interconnection network.

Abstract: A system including an integrated circuit (IC) and a power supply regulator external to the IC. The IC operates in accordance with an active mode and a lower power mode, and is configured to retain a logical state during the low power mode. The power supply regulator is configured to i) supply a first voltage potential to a first pin of the IC during the active mode, and ii) disable the first voltage potential during the low power mode. The IC is configured to provide a first feedback signal from an internal supply of the IC to the power supply regulator via the first pin.

Abstract: An automatic banking machine operates responsive to data read from data bearing records corresponding to authorized user or financial account data. The machine includes a card reader for reading data from user cards. The automated banking machine causes financial transfers related to financial accounts that correspond to data read from user cards. The automated banking machine also includes devices that control the supply of power to included devices to avoid exceeding power supply capacity.

Abstract: Some embodiments of a system and a method to dynamically tune a computing system have been presented. In one embodiment, a processing device running in a computing system monitors usage of one or more hardware components of the computing system to determine a load on each hardware component. The processing device may tune each hardware component based on the load of a respective hardware component determined, and a respective weight associated with the respective hardware component. The hardware components may be tuned to reduce power consumption or to improve performance of the computing system.

Abstract: An image processing apparatus includes a managing part to perform a first process to store the log information in a storage unit and a second process necessary to turn OFF a main power, a generating part to generate the log information by performing a third process necessary to turn OFF the main power, and to send to the managing part a first request signal causing the managing part to perform the first process on the generated log information, and a request part to send to the managing part a second request signal causing the managing part to perform the second process and to send to the generating part a third request signal causing the generating part to perform the third process, when a detecting part detects an OFF state of a main power switch.

Abstract: A power supply control device includes a power supply controller that selectively performs a power supply mode and a power saving mode, a detector that detects a moving body in a predetermined range in the vicinity of the processor, a power supply mode change instruction unit that changes an operation mode from the power saving mode to the power supply mode when the detector detects the moving body, an information history unit that acquires information related to an operation for the processor in the power supply mode, and a sensitivity adjusting unit that adjusts a detection sensitivity of the detector for the moving body on the basis of the information acquired by the information history unit for a period from a change of the operation mode from the power saving mode to the power supply mode to a change of the operation mode to a next power saving mode.

Abstract: A device capable of controlling a supply voltage and a supply frequency using information of a manufacturing process variation includes a data storage device storing data indicating performance of the device, a decoder decoding the data stored in the data storage device and outputting decoded data, and a frequency control block outputting a frequency controlled clock signal in response to the decoded data output from the decoder. The device further includes a voltage control block outputting a level controlled supply voltage in response to the decoded data. The voltage control block outputs a body bias control voltage controlling a body bias voltage of at least one of a plurality of transistors embodied in the semiconductor device in response to the decoded data. The performance is operational speed of the device or leakage current of the semiconductor device.

Abstract: An information processing apparatus executes a processing sequence including a plurality of processing steps. A management apparatus makes the information processing apparatus execute the processing steps in predetermined order, and thereby manages execution of the processing sequence. The management apparatus takes over execution management of the processing sequence from a first management apparatus. At this time, an information acquisition unit of the management apparatus acquires state information indicating a progress state of the processing sequence from the information processing apparatus. A control unit of the management apparatus makes the information processing apparatus continue execution of an unexecuted processing step of the processing sequence based on the state information acquired by the information acquisition unit.

Abstract: A method for detecting temperature associated with a processor, results of the detecting being used for controlling power dissipation associated with the processor and/or apparatus and/or system employing the same.

Abstract: A programmable controller includes one or more extension units; a CPU unit for controlling the extension units; and a charging element. The CPU unit includes a voltage detection circuit for detecting an output voltage of the charging element and outputting a voltage reduction signal when the detected output voltage is lowered to a level equal to or lower than a reference value and a signal output circuit for outputting a power supply stop signal in response to the voltage reduction signal. Each extension unit includes a voltage detection circuit for detecting an output voltage of an power circuit and outputting a power supply stop signal when the detected output voltage is lowered to a level equal to or lower than a reference value and a power supply stop circuit for stopping the power circuit in response to the power supply stop signal.

Abstract: A processor integrated circuit has one or more processor cores and a power management controller in a North-Bridge that generates a first power state recommendation for the one or more processor cores. The North-Bridge also receives a second power state recommendation from a South-Bridge integrated circuit. The North-Bridge determines a final power state for the one or more processor cores based on the first and second power state recommendations.

Abstract: A method for processing power-off suitable for a server system is provided. The server system includes a first node, a second node, and a power supply. The first and second nodes share the power supply. The method includes the following steps. A power-off process is performed by the first and second nodes respectively according to a power-off signal. An interception process is activated to intercept a completion signal generated in the power-off process, and an interrupt is triggered. The interrupt is performed by an interrupt handler, so as to detect whether the first and second nodes complete a power-off process. When the first and second nodes already complete the power-off process, the interception process is inactivated and the generated completion signal is recovered and transferred to the power supply for turning off a power.

Abstract: A system that incorporates teachings of the present disclosure may include, for example, a Power Over Ethernet (PoE) device (PD) having a controller to receive signals over a first cable having twisted pair wires from at least one of a network element and a gateway where the network element is associated with a service provider where the gateway is associated with a premises and where the service provider provides network communications to the premises, adjust the signals, transmit the adjusted signals over a second cable having twisted pair wires to at least one of the network element and the gateway, and receive power from at least one of the network element and the gateway, where the power is received over at least one of the first and second cables, where the power is received according to PoE protocol, and where the PD is positioned between the network element and the gateway. Other embodiments are disclosed.

Abstract: A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.

Abstract: An image processing apparatus includes an image forming unit, power supplier, power controller, memory, signal transmission unit and transmission timer. The image forming unit forms an image based on image data from a plurality of host devices. The power supplier supplies power to a power system including the image forming unit. The power controller controls the power from the power supplier to the power system. The memory stores a usage amount of each host device. The signal transmission unit transmits a response request to a host device having at least a predetermined usage amount. The transmission timer counts a first time period from a transmission of the response request. The power controller halts the power from the power supplier to the power system when determining, based on the first time period, that a reply to the response request is not transmitted from the specific host device for a predetermined period.

Abstract: An automatic banking machine operates responsive to data read from data bearing records corresponding to authorized user or financial account data. The machine includes a card reader for reading data from user cards. The automated banking machine causes financial transfers related to financial accounts that correspond to data read from user cards. The automated banking machine also includes devices that control the supply of power to included devices to avoid exceeding power supply capacity.

Abstract: A computer system with reliable dynamic energy management includes a thread synchronized energy configurator, the thread synchronized energy configurator extending an instruction decoder of the computer system and the thread synchronized energy configurator is disposed to append an energy configuration field including energy configuration bits to pipeline control bits of instructions in the instruction decoder, a thread synchronized dynamic frequency shifter (DFS), the thread synchronized DFS disposed to set control signals indicative of a frequency shift both per thread and per pipeline, and a thread synchronized general purpose register (GPR) super scaler, wherein the GPR super scaler is disposed to optimize thread operation based upon the set control signals.

Abstract: In a method for managing servers in a data center, an peripheral BMC list of each candidate BMC is updated, when any candidate BMC receives a data packet from an peripheral BMC. A master BMC is determined from all of the candidate BMCs, and the master BMC sends starting instructions to each peripheral BMC at a specified time interval, according to a preset start sequence.

Abstract: A controller includes: a sub-control substrate that includes a first memory storing first control information to be used for controlling at least one of a plurality of modules of a processing apparatus, and controls the at least one of the plurality of modules by using the stored first control information while the controller is connected to the processing apparatus; and a main control substrate that includes a second memory and controls an operation of the sub-control substrate; and wherein: if a first operation is performed, the main control substrate acquires second control information that is to be used for controlling at least one of the plurality of modules and is determined from the first control information, and stores the acquired second control information in the second memory, when the controller is connected to the processing apparatus, and a second operation is performed, the main control substrate supplies the second control information stored in the second memory to another controller included

Abstract: The present invention discloses a power booting sequence control system and the control method thereof, which optimizes a power booting sequence of a plurality of power switches in an integrated circuit. An initial module initializes a target charge value, a preset current budget and a plurality of time intervals. A current lookup module obtains a booting current across a power switch from a built-in current lookup table. A first computing unit and a second computing unit compute a first and a second power switch numbers respectively. A processing module selects the small number of the first and the second power switch number to get a maximum number of power booting switches under the time intervals, and opens the maximum number of the power booting switches. Therefore, the system keeps the in-rush current value under the preset current budget and speeds up the ramp-up time in a power booting state.

Abstract: In one embodiment of the invention, a method is provided for protecting against attacks on security of a programmable integrated circuit (IC). At least a portion of an encrypted bitstream input to the programmable IC is decrypted with a cryptographic key stored in the programmable IC. A number of failures to decrypt the encrypted bitstream is tracked. The tracked number is stored in a memory of the programmable IC that retains the number across on-off power cycles of the programmable IC. In response to the number of failures exceeding a threshold, data that prevents the decryption key from being used for a subsequent decryption of a bitstream is stored in the programmable IC.

Abstract: A power management method of an image forming apparatus which communicates with at least one terminal device supporting a universal plug and play (UPnP) protocol, including: setting power save mode information which includes a plurality of levels corresponding to the UPnP protocol to the image forming apparatus; storing the set power save mode information; receiving a command to enter a first power save mode among the plurality of levels from the terminal device; comparing the received command to enter the first power save mode with the stored power save mode information; and entering a power save mode by the image forming apparatus corresponding to the received command to enter the first power save mode. With this configuration, the image forming apparatus supporting a UPnP protocol categorizes power save modes by using a low power protocol of the UPnP protocol, and can reduce unnecessary power consumption and improves usability.

Abstract: An electronic device includes a microcontroller (MCU) and a central processing unit (CPU). The CPU enters a sleep mode. The MCU determines whether a charger device is inserted in the electronic device according to whether power is supplied from the charger device, and wakes up the CPU when the charger device is inserted in the electronic device. After being awakened, the CPU detects a type of the charger device, and adjusts charging current from the charger device to the electronic device according to the type of the charger device.

Abstract: A power control method of servers is disclosed, where each of the servers includes a corresponding baseboard management controller. This method includes steps as follow. A rack management device is used for acquiring identification codes of the servers, wherein the identification codes of the servers are different from each other. Then, delay times based on the identification codes of the servers are generated by means of the rack management device, so that when each time passing through one of the delay times, the rack management device can send a power-on command to the corresponding server. The baseboard management controller can supply the power to the server according to the power-on command.

Abstract: An image forming apparatus includes a reading unit, a first control unit, a second control unit, and a power supply control unit. The reading unit reads authentication information including a card type and a user code. The first control unit determines, in a state where power is not being supplied to the second control unit, whether a card type included in the authentication information read by the reading unit corresponds to a predetermined card type. The second control unit requests an authentication apparatus to perform user authentication based on the authentication information read by the reading unit. The power supply control unit controls power supply to the second control unit. In response to the first control unit determining that the card type included in the authentication information read by the reading unit corresponds to the predetermined card type, the power supply control unit supplies power to the second control unit.

Abstract: An apparatus and method for making fractional assignments of processing elements to processing nodes for stream-based applications in a distributed computer system includes determining an amount of processing power to give to each processing element. Based on a list of acceptable processing nodes, a determination of fractions of which processing nodes will work on each processing element is made. To update allocations of the amount of processing power and the fractions, the process is repeated.

Abstract: A system comprising a plurality of subsystems and a master power sequencer. Each of the plurality of subsystems is coupled to an associated power switch and an associated slave power sequencer. The master power sequencer is coupled to each of the slave power sequencers and each of the power switches. Upon a slave power sequencer identifying a fault with its associated subsystem, the master power sequencer determines whether to provide power to any other subsystem. Further, the master power sequencer is configured to send a signal to each of the power switches indicating whether to provide power to the subsystem associated with each of the power switches.

Abstract: An SNMP network comprises a power manager with an SNMP agent in TCP/IP communication over a network with an SNMP network manager. The power manager is connected to control several intelligent power modules each able to independently control the power on/off status of several network appliances. Power-on and load sensors within each intelligent power module are able to report the power status of each network appliance to the SNMP network manager with MIB variables in response to GET commands. Each intelligent power module is equipped with an output that is connected to cause an interrupt signal to the network appliance being controlled. The SNMP network manager is able to test which network appliance is actually responding before any cycling of the power to the corresponding appliance is tried.

Abstract: Methods, systems, and devices are disclosed for producing and delivering packetized power within a DC computing environment. Within the DC computing environment a power requirement or request is communicated to a power router. The power router then determines a power source capable of fulfilling the power requirement and then causes the power to be delivered in packetized form. The packetized power is appended to a message header which allows the power packet to be received by the requesting device.

Abstract: A storage management apparatus includes a memory for storing logical volume information for indicating logical volumes and priority information for determining an order of the logical volumes to be activated, a first interface for connecting storages to the storage management apparatus, at least one of the storages corresponding to one of the logical volumes, a second interface connected to a power supply unit for supplying power to the storages, and a processor for executing determining whether the power supply unit is capable of supplying power for simultaneously starting the storages corresponding to the logical volumes corresponding to an access request for accessing the logical volumes, selecting one logical volume based on the priority information when the power supply unit is incapable of supplying power for simultaneously starting the storages, and transmitting a start request for staring the storages corresponding to the selected logical volume by using the first interface.

Abstract: A method of managing the power up of a device that has power down state and at least two power up states. The method includes statistically analyzing the power up time profile of the device. The method also includes determining one or more predetermined statistical indicators associated with the stored power up time profile. The method further includes calculating an anticipated start up time from the statistical indicators. The method also includes at the anticipated start up time changing the device state from the power down state to a predetermined one of the power up states depending on the statistical indicators. The method further includes maintaining the device at predetermined power up states for a predetermined duration. The method also includes returning the device to the power down state if there is no user interaction with the device during the predetermined duration.

Abstract: A computing device operates over a range of voltages and frequencies and over a range of processor usage levels. The computing device includes at least a variable frequency generator, a variable voltage power supply and voltage supply level and clocking frequency management circuitry. The variable frequency generator is coupled to the processor and delivers a clock signal to the processor. The variable voltage power supply is coupled to the processor and delivers voltage to the processor. The voltage supply level and clocking frequency management circuitry adjust both the voltage provided by the variable voltage power supply and the frequency of the signal provided by the variable frequency generator. The computing device includes a temperature sensor that provides signals indicative of the temperature of the processor and the voltage supply level and clocking frequency management circuitry adjusts the voltage and/or the clocking frequency provided by the variable voltage power supply.

Abstract: A power input utilization system includes a plurality of components and a plurality of power input connectors. A power utilization engine is coupled between the plurality of power input connectors and the plurality of components. The detect a power input to the plurality of power input connectors and determine a power input characteristic for the power input. The power utilization engine is also operable to use the power input characteristic to determine a plurality of operation characteristics for the plurality of components. The power utilization engine is also operable to operate the plurality of components using on the power input and the plurality of operation characteristics.

Abstract: A system includes a plurality of processor cores and a power management unit. The power management unit may be configured to independently control the performance of the processor cores by selecting a respective thermal power limit for each of the plurality of processor cores dependent upon an operating state of each of the processor cores and a relative physical proximity of each processor core to each other processor core. In response to the power management unit detecting that a given processor core is operating above the respective thermal power limit, the power management unit may reduce the performance of the given processor core, and thereby reduce the power consumed by that core.

Abstract: A remote power management technology for a cluster system of the present invention can monitor and control the power status of multiple hosts of the cluster system individually, thereby decreasing power consumption of the cluster system. A remote power management system includes a plurality of management nodes, a power proxy server, and a power management server. The management nodes, which manage power of the hosts of the cluster system respectively, are divided into groups. The power proxy server manages each group, monitors the power status of each management node of the group to generate proxy monitoring information, and transmits a power setting command to the management node of the specific host requiring power setting. The power management server monitors the power status of the hosts using the proxy monitoring information and transmits the power setting command to the power proxy server of the group including the management node of the specific host.

Abstract: An apparatus and method for enabling a computing device to process VoIP phone calls while conserving the computing device's resources is disclosed. The apparatus comprises a computing device configured to use a minimum resource device and an internally integrated or externally connected minimum resource device. Components of the minimum resource device may or may not be powered by the computing device. A method for processing VoIP phone calls while conserving the computing device's resources uses a minimum resource device.

Abstract: Systems and methods for a blade server to obtain the blade type and configuration of the chassis without requiring the blades to be fully powered. Using this method the user has the ability to acquire correct inventory and slot status of the chassis through the use of a low power auxiliary power state. The user is then able to apply the proper power budgeting and thermal algorithm requirements utilizing this information while minimizing the power consumption necessary to acquire such information. In addition, an intelligent search algorithm may be utilized to scan the blades for blade information thus further minimizing power consumption and decreasing the time needed to inventory the blades.

Abstract: An integrated circuit 2 is provided with a first power supply conductor 8 coupled via header transistors 14 to 26 to a second power supply conductor 10. Logic circuitry 4, 6 draws its power supply from the second power supply conductor. When switching from a sleep mode to an operating mode the header transistors 14 to 26 are divided into a plurality of sets of transistors which are switched on in a predetermined sequence using controller circuitry 28. The controller circuitry 28 senses the voltage of the second power supply conductor 10 to determine when each set of header transistors should be switched on. In this way, the in-rush current within the integrated circuit 2 associated with the switch from the sleep state to the operating state can be held within a predetermined range of a target in-rush current.

Abstract: A system and method is provided to accomplish distributed power sequencing function of a large electronics system with minimum number of signals in the sequencing network without compromising the flexibility and expandability. In one embodiment of the invention, the power sequencing function is accomplished with two signals of the sequencing network: power_on/power_off signal and SEQ_LINK signal. The power_on/power_off signal controls whether the sequencing is in power_on mode for turning on power to multiple devices in a predetermined sequence or power_off mode for for turning off power to multiple devices in a reverse sequence. The SEQ_LINK signal controls when the sequence counters, located in each participating device, are allowed to count to the subsequent state. Each sequencing logic circuit of these participating devices responds to a predetermined sequence position to enable the power on or power off of the power supply it controls.

Abstract: A method and apparatus for controlling the power usage of a processor is disclosed. The power usage of the processor is monitored. When the power usage of the processor exceeds a threshold power usage value, the power used by the processor is reduced or limited. A processor utilization value is also monitored. When the processor utilization value is above a threshold utilization value, the processor is ramped to a higher performance state. When power to the processor is being limited, a first rate is used to ramp the processor to the higher performance state. When power to the processor is not being limited, then a second rate, different from the first rate, is used to ramp the processor to the higher performance state.

Abstract: Systems and methods for measuring the effectiveness of a workload predictor operative on a mobile device are disclosed. A load manager includes a workload predictor, a sensor, an error generator and a controller. The workload predictor generates an estimate of the workload on a processor core operative on the mobile device. The sensor generates a measure of the actual workload on the processor core. The error generator receives the estimate of the workload and the measure of the actual workload on the processor core and generates an error signal. The controller receives the error signal and determines the effectiveness of the workload predictor as a function of the error signal over time.

Abstract: According to one embodiment, a memory system includes a NAND flash memory includes a memory cell array includes pages, and a volatile data register with a storage capacity of one page, and configured to write page data to the memory cell array through the data register, each of the pages includes nonvolatile memory cells and being a unit of data write, a volatile RAM, and a controller includes a power saving mode in which power consumption of the RAM is reduced, and configured to transfer data of the RAM to the data register before entering the power saving mode.

Abstract: A computer network management apparatus and method for remotely managing a networked device. The apparatus and method includes a management processor which is in direct communication with the networked device. The apparatus and method provides access for remotely and securely managing a networked device. The apparatus and method further separates management communications from user communications to ensure the security of the management communications. The apparatus and method further includes network and power monitoring and notification systems. The apparatus and method further provides authentication and authorization capabilities for security purposes.

Abstract: A mechanism is provided for routing a computing task to a computing resource for executing the computing task. A dispatcher receives a timestamp at which execution of the computing task can start on the computing resource and a duration that the execution would take. The computing resource is associated with a power consumption profile. The dispatcher estimates a power efficiency factor as a function of the power consumption profile, the timestamp and the duration thereby forming an estimated power efficiency factor. The dispatcher determines whether the computing resource can execute the computing task as a function of the estimated power efficiency factor. The dispatcher then sends the computing task to the computing resource in responsive to determining that the computing resource can execute the computing task.

Abstract: A mechanism is provided for routing a computing task to a computing resource for executing the computing task. A dispatcher receives a timestamp at which execution of the computing task can start on the computing resource and a duration that the execution would take. The computing resource is associated with a power consumption profile. The dispatcher estimates a power efficiency factor as a function of the power consumption profile, the timestamp and the duration thereby forming an estimated power efficiency factor. The dispatcher determines whether the computing resource can execute the computing task as a function of the estimated power efficiency factor. The dispatcher then sends the computing task to the computing resource in responsive to determining that the computing resource can execute the computing task.

Abstract: The invention relates to an apparatus (1) for powering an electrical consumer (3, 4, 5) via a data connection (6, 7, 8). The apparatus comprises a power supply (2) for supplying power to the electrical consumer via the data connection, a data receiving unit (9) for receiving data to be sent to the electrical consumer, and a controller (10) for activating the supply of power to the electrical consumer via the data connection, if data to be sent to the electrical consumer have been received and the supply of power to the electrical consumer is deactivated. The electrical consumer itself does therefore not need to receive power from the apparatus, in order to stay alert to be able to react on data connection activity, thereby reducing the power consumption.

Abstract: A datacenter schedules and executes requests to conserve energy. The datacenter uses an event-based opportunistic approach to schedule and run the requests, which provides energy efficiency. The requests are hierarchically batched and sent to the datacenter for scheduling and execution. They are selectively sent over low power links and selectively serviced by low power processors.

Abstract: A system comprises an AC/DC adapter having a connector. The system also comprises a portable computer that receives said connector. The portable computer comprising a delay circuit coupled to a power transistor that is coupled in parallel with a resistor. The delay circuit causes the power transistor to activate following a time delay after current from the adapter begins to flow through the resistor. As a result of a user beginning to remove the connector from the portable computer, a control transistor is activated to reset the delay circuit.

Abstract: The present invention relates to power consumption, and specifically an apparatus, method, and computer readable medium to manage and control power consumption in computer systems. Specifically, the present invention manages power consumption by controlling the types of threads that are executed by the processor. The present invention monitors the resources of the system to determine the power consumption of the system. If the power consumption is too high, the present invention issues more low power threads to be executed by the processor.