Concurrent, Redundantly Operating Processors Patents (Class 714/11)
-
Patent number: 10366024Abstract: A synchronous input/output (I/O) computing system includes a processor and a memory unit that stores program instructions. The system is configured to purge a device table cache (DTC) in response to the processor executing the program instructions. An operating system runs on the synchronous I/O computing system and issues a synchronous I/O command indicating a request to perform a device table entry transaction that has a total data length to be transferred. A device table entry is selected from a device table, loaded into the DTC, and data packets corresponding to the device table entry transaction are transferred using the selected device table entry. A host bridge processor monitors the data packets transferred using the selected table entry, and automatically purges the selected device table entry from the DTC in response to determining the transferred data packets match the total data length.Type: GrantFiled: May 9, 2016Date of Patent: July 30, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David F. Craddock, Matthias Klein, Eric N. Lais
-
Patent number: 10354430Abstract: An image update method executed by a render server, includes: acquiring a graphics instruction of a virtual machine, determining a type of the graphics instruction of the virtual machine, if the type of the graphics instruction of the virtual machine is a three-dimensional graphics instruction, sending a drawing instruction to a graphics processing unit to perform rendering processing, acquiring a rendering image corresponding to the graphics instruction of the virtual machine, sending a graphics update instruction to a primary surface management unit of the render server, acquiring an original primary surface of the virtual machine, synthesizing a new primary surface according to the original primary surface of the virtual machine, the first graphics update area, and the rendering image, sending an image corresponding to the new primary surface to a client of the virtual machine.Type: GrantFiled: October 23, 2017Date of Patent: July 16, 2019Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventor: Chuyue Ai
-
Patent number: 10318296Abstract: A method and apparatus are provided for executing instructions of a multi-threaded processor having multiple hardware threads with differing hardware resources comprising the steps of receiving a plurality of streams of instructions and determining which hardware threads are able to receive instructions for execution, determining whether a thread determined to be available for executing an instructions has the hardware resources available required by that instructions and executing the instruction in dependence on the result of the determination.Type: GrantFiled: March 23, 2017Date of Patent: June 11, 2019Assignee: MIPS Tech, LLCInventor: Andrew Webber
-
Patent number: 10303565Abstract: An information processing system includes a first determining unit, a second determining unit, and a processing unit. The first determining unit determines a result indicating a second fixed state for data when a first condition is satisfied, the first condition indicating that t2 or more results of a first recommended state or a first fixed state are selected for the same data. The second determining unit determines the result indicating the first fixed state for the data when a second condition is satisfied, the second condition indicating that t1 or more results indicating the second fixed state are selected for the same data. The second determining unit also determines the result indicating the first recommended state for the data when a third condition is satisfied, the third condition indicating that (b+1) or more results indicating the second fixed state are selected for the same data.Type: GrantFiled: September 14, 2016Date of Patent: May 28, 2019Assignees: Kabushiki Kaisha Toshiba, Toshiba Solutions CorporationInventor: Kotaro Endo
-
Patent number: 10296312Abstract: Methods, apparatuses, systems, and implementations of a zero silent data corruption (ZDC) compiler technique are disclosed. The ZDC technique may use an effective instruction duplication approach to protect programs from soft errors. The ZDC may also provide an effective control flow checking mechanism to detect most control flow errors. The ZDC technique may provide a failure percentage close to zero while incurring a lower performance overhead than prior art systems. The ZDC may also be effectively applied in a multi-thread environment.Type: GrantFiled: May 17, 2017Date of Patent: May 21, 2019Assignee: Arizona Board of Regents on Behalf of Arizona State UniversityInventors: Aviral Shrivastava, Moslem Didehban
-
Patent number: 10257282Abstract: A lock management solution in a cluster, where the cluster includes a client and a lock server, the lock server includes an interface card and a memory, the memory stores a read lock request queue recording an identifier of a client waiting for a read lock or obtaining the read lock, the memory further stores a write lock request queue recording an identifier of a client waiting for a write lock or obtains the write lock, and the memory further includes a read lock allocation count and a write lock allocation identifier, where the read lock allocation count records an allocated read lock, and the write lock allocation identifier indicates whether the write lock has been allocated.Type: GrantFiled: April 17, 2018Date of Patent: April 9, 2019Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Wenhai Lan, Wei Zhang, Xueyou Wang, Yue Zhang
-
Patent number: 10255834Abstract: A parallel redundant integrated-circuit system includes an input connection, an output connection and first and second active circuits. The first active circuit includes one or more first integrated circuits and has an input connected to the input connection and an output connected to the output connection. The second active circuit includes one or more second integrated circuits and is redundant to the first active circuit, has an input connected to the input connection, and has an output connected to the output connection. The second integrated circuits are separate and distinct from the first integrated circuits.Type: GrantFiled: July 23, 2015Date of Patent: April 9, 2019Assignee: X-Celeprint LimitedInventors: Ronald S. Cok, Robert R. Rotzoll, Christopher Bower, Matthew Meitl
-
Patent number: 10248610Abstract: A method for computing includes submitting a first command from a central processing unit (CPU) to a first peripheral device in a computer to write data in a first bus transaction over a peripheral component bus in the computer to a second peripheral device in the computer. A second command is submitted from the CPU to one of the first and second peripheral devices to execute a second bus transaction, subsequent to the first bus transaction, that will flush the data from the peripheral component bus to the second peripheral device. The first and second bus transactions are executed in response to the first and second commands. Following completion of the second bus transaction, the second peripheral device processes the written data in.Type: GrantFiled: June 9, 2016Date of Patent: April 2, 2019Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Adi Menachem, Shachar Raindel
-
Patent number: 10241803Abstract: Devices include a processor and a memory. The processor is configured to determine if a bootloader area does not contain a valid bootloader instruction set, to locate a bootloader instruction set, and to copy the bootloader instruction set to the bootloader area. The processor then executes the bootloader instruction set from the bootloader area.Type: GrantFiled: October 3, 2016Date of Patent: March 26, 2019Assignee: SCHNEIDER ELECTRIC IT CORPORATIONInventors: Wen-Chun Peng, Hsin-Hsiao Lin
-
Patent number: 10229017Abstract: Embodiments for systems and methods of resetting network devices for failover operation, by receiving an operating system panic function call, disabling error reporting for all device ports of a device to be reset to prevent primary interrupts to a disk dump operation, performing a function level reset of the all the device ports to be reset, and performing the reset operation on the device in a single thread context to prevent secondary interrupts to the disk dump process.Type: GrantFiled: October 1, 2015Date of Patent: March 12, 2019Assignee: EMC IP Holding Company LLCInventors: Colin Zou, Cory Gu, Oliver Yang, Victor Li
-
Patent number: 10223217Abstract: An information processing device includes at least a first storage device and a second storage device each to store a boot program, a first processor to read the boot program from the first storage device to boot the information processing device from the first storage device, and a second processor connected to each of the first storage device and the second storage device and the first processor. The second processor detects a completion or a failure of the boot from the first storage device, and when detecting the failure of the boot, switches a storage device to be used for booting from the first storage device to the second storage device to control the first processor to read the boot program from the second storage device.Type: GrantFiled: November 23, 2016Date of Patent: March 5, 2019Assignee: Ricoh Company, Ltd.Inventor: Kazunori Sakuma
-
Patent number: 10216949Abstract: A distributed database system may implement dynamic quorum group membership changes. In various embodiments, a quorum set may maintain a replica of a data object among group members according to a protection group policy for the data object. A group member may be identified as to be replaced. In response, a new quorum set may be created from the remaining group members and a new group member. The protection group policy may be updated to include the new group members such that subsequently received updates are maintained at both the previous quorum set and the new quorum set. Previously received updates may be replicated on the new group member. Upon completion of replicating the previously received updates, the protection group policy for the data object may be revised such that subsequently received updates are maintained at the new quorum set.Type: GrantFiled: September 20, 2013Date of Patent: February 26, 2019Assignee: Amazon Technologies, Inc.Inventors: Samuel James McKelvie, Maximiliano MacCanti, Anurag Windlass Gupta, Pradeep Jnana Madhavarapu, Yan Valerie Leshinsky
-
Patent number: 10200508Abstract: A special-purpose processing system, a method of carrying out sharing special-purpose processing resources and a graphics processing system. In one embodiment, the special-purpose processing system includes: (1) a special-purpose processing resource and (2) a Representational State Transfer (ReST) application programming interface operable to process data using the special-purpose processing resource in response to stateless commands based on a standard protocol selected from the group consisting of: (2a) a standard network protocol and (2b) a standard database query protocol.Type: GrantFiled: January 7, 2014Date of Patent: February 5, 2019Assignee: Nvidia CorporationInventors: Jonathan Cohen, Michael Houston, Frank Jargstorff, Eric Young, Roy Kim
-
Patent number: 10193745Abstract: Example implementations relate to a radio interrupt reboot. For example, an apparatus may include a first processing resource connected via an interface to a second processing resource. The first processing resource may execute instructions to receive an interrupt generated by a radio coupled to the second processing resource, increment a counter in response to receiving the interrupt during a configurable time interval, and determine that the counter has not been incremented during a threshold number of configurable time intervals. The first processing resource may execute instructions to reboot the first processing resource and the second processing resource in response to the determination that the counter has not been incremented during the threshold number of configurable time intervals.Type: GrantFiled: October 26, 2016Date of Patent: January 29, 2019Assignee: Hewlett Packard Enterprise Development LPInventors: Ho-Kuo Chan, Shahnawaz Siraj, Andre Beaudin
-
Patent number: 10185635Abstract: An apparatus comprises at least three processing circuits to perform redundant processing of common program instructions. Error detection circuitry coupled to a plurality of signal nodes of each of said at least three processing circuits comprises comparison circuitry to detect a mismatch between signals on corresponding signal nodes in said at least three processing circuits, the plurality of signal nodes forming a first group of signal nodes and a second group of signal nodes. In response to the mismatch being detected in relation to corresponding signal nodes within the first group, the error detection circuitry is configured to generate a first trigger for a full recovery process for resolving an error detected for an erroneous processing circuit using state information derived from at least two other processing circuits.Type: GrantFiled: March 20, 2017Date of Patent: January 22, 2019Assignee: ARM LimitedInventors: Balaji Venu, Xabier Iturbe, Emre Özer
-
Patent number: 10185500Abstract: Techniques to optimize use of the available capacity of a backup target storage device are disclosed. In various embodiments, a current capacity of a target system to which backup data is to be streamed to handle additional streams is determined dynamically, at or near a time at which a backup operation is to be performed. One or more backup parameters of the backup operation is/are set dynamically, based at least in part on the dynamically determined current capacity of the target system.Type: GrantFiled: June 26, 2015Date of Patent: January 22, 2019Assignee: EMC IP Holding Company LLCInventors: Shelesh Chopra, Rajkumar Palkhade
-
Patent number: 10169282Abstract: A serial bus is provided with a device (sometimes herein referred to as an I2C serializer device) including circuitry and machine logic that operates as follows: when one of the master devices is using the bus for data communication, then the other master(s) will receive a wait signal until the bus becomes available again. This wait signal allows the master devices to wait as a “hardware response,” rather than requiring the master devices to be equipped with software and/or firmware to control the operation of waiting until the serial bus is available. In some embodiments, the use of the I2C serializer device allows a bus operating under a bus serialization protocol (for example, I2C) to be simultaneously connected to multiple master devices even in the case that one, or more, master device(s) do not include any currently conventional form of multi-master support.Type: GrantFiled: July 7, 2017Date of Patent: January 1, 2019Assignee: International Business Machines CorporationInventors: Harald Freudenberger, Thomas Hess, Martin Raitza, Philip S. Schulz, Markus Strasser
-
Patent number: 10165086Abstract: According to an embodiment, an information processing system includes a client apparatus and three or more server apparatuses that each store data. The server apparatus includes a first storage, a receiver, a generator, a selector, a transmitter, and a changer. When the number of requests indicating identical changes among the requests of the data candidates is larger than a first threshold, the selector selects one of the requests indicating identical changes, and sets the state of the selected request to a second state. The transmitter transmits the data candidate including the selected request to one or more server apparatuses. When the number of requests in the second state among the requests of the data candidates is larger than a second threshold, the changer updates the history data and changes the data by using one of the data candidates including the requests in the second state.Type: GrantFiled: March 4, 2016Date of Patent: December 25, 2018Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA SOLUTIONS CORPORATIONInventor: Kotaro Endo
-
Patent number: 10162719Abstract: According to an embodiment, an ordering device determines a processing order of pieces of data in each computer in a multiplex system. The device includes a preliminary elector and a confidence elector. The preliminary elector is configured to generate, when a vote having the current order number, the current round number, and a nominated state is acquired from a primary computer, a vote that includes data included in the acquired vote, the current order number, a round number following the current round number, and a winning-assured state. The confidence elector is configured to determine, when a vote having the current order number, the current round number, and the winning-assured state is acquired for identical data from each of a threshold or more of the computers, data included in the acquired vote to be data to be processed at the current order number.Type: GrantFiled: September 15, 2016Date of Patent: December 25, 2018Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA SOLUTIONS CORPORATIONInventor: Kotaro Endo
-
Patent number: 10162875Abstract: According to an embodiment, database system includes nodes that communicate with each other to elect one node among the nodes, serving as a management device. The management device includes first and second assigning units. Depending on change in state of each node, the first assigning unit assigns a first node storing data pieces and receiving an access request to the data pieces, and assigns a second node storing the data pieces and serving as a backup node for the first node, and instructs each node to perform operations according to assignment. Depending on the state of nodes and a change in assignment state of the first and second nodes, the second assigning unit assigns a third node as a candidate node to serve as the first or second node, and instructs each node to make preparation for causing the third node to operate as the first or second node.Type: GrantFiled: February 24, 2016Date of Patent: December 25, 2018Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA SOLUTIONS CORPORATIONInventor: Masakazu Hattori
-
Patent number: 10146632Abstract: An information handling system and method allows implementation of fault-tolerant storage subsystems using multiple storage controllers not themselves originally designed to support the redundancy of such fault-tolerant storage subsystems. In accordance with one embodiment, uncommitted data is efficiently and rapidly replicated across multiple commodity storage controllers, enabling faster and less expensive fault-tolerant storage subsystems. A redundant storage controller system using non-redundant storage controllers can improve the efficiency of data replication while providing failure protection against controller failure. A redundant storage controller system using non-redundant storage controllers and shared memory commonly accessible to the storage controllers can be enhanced to replicate data within host memory regions to protect against non-volatile memory failure.Type: GrantFiled: February 22, 2017Date of Patent: December 4, 2018Assignee: Dell Products, LPInventors: Chandrashekar Nelogal, James P. Giannoules
-
Patent number: 10140172Abstract: In an example, there is disclosed a computing apparatus, having one or more logic elements, including at least one hardware logic element, comprising a network-aware data repair engine to compute a feasible repair log for n fragments of an original data structure, comprising: receiving a predictive failure scenario; identifying at least one repair ?i for the failure scenario; determining that ?i is feasible; and logging ?i to a feasible repair log. When a node failure occurs, a network cost may be computed for each repair in the feasible repair log, and an optimal repair may be selected.Type: GrantFiled: August 31, 2016Date of Patent: November 27, 2018Assignee: CISCO TECHNOLOGY, INC.Inventors: Marton Akos Sipos, Joshua Gahm, Narayan Venkat
-
Patent number: 10142124Abstract: A system includes a bus system to connect a number of components in a chain-like structure. A first control device (e.g., microcontroller or microprocessor) is configured to control the components in a first mode of the system. A second control device (e.g., microcontroller or microprocessor) is configured to control a first subset of the components in a second mode of the system.Type: GrantFiled: May 24, 2012Date of Patent: November 27, 2018Assignee: INFINEON TECHNOLOGIES AGInventors: Christian Heiling, Heimo Hartlieb, Michael Hausmann
-
Patent number: 10140184Abstract: A first static server configured to perform at least one first node process and a second static server configured to perform at least one second node process may be instantiated. A conglomerate server may periodically analyze the at least one first node process and the at least one second node process to identify a network process state based on the at least one first node process and the at least one second node process. The conglomerate server may store the network process state in a memory. A failure may be detected in the first static server. In response to the detecting, the first static server may be reinstantiated. The reinstantiating may comprise restarting the at least one first node process according to the network process state from the memory.Type: GrantFiled: March 14, 2018Date of Patent: November 27, 2018Assignee: Capital One Services, LLCInventors: Austin Walters, Jeremy Goodsitt, Fardin Abdi Taghi Abad
-
Patent number: 10129570Abstract: Embodiments of the present invention: provide, from a first VOD server having a first cache, a first media presentation to a first group of user devices and a second media presentation to a second group of user devices; provide, from a second VOD server having a second cache, a third content to a third group of user devices; measure a first popularity corresponding to the first media presentation and a second popularity corresponding to the second media presentation; store a copy of the first media presentation on the second cache based on the first popularity and the second popularity; determine when the first VOD server fails to continue to provide the first media presentation; and provide, from the second VOD server, the first media presentation to the first group of user devices, wherein the first cache has the first media presentation stored therein, and wherein the second cache has the second media presentation stored therein.Type: GrantFiled: September 28, 2016Date of Patent: November 13, 2018Assignee: GOOGLE TECHNOLOGY HOLDINGS LLCInventors: Brittain S. McKinley, Sathyam Ganesan, Yaron Eli Presente, Brian J. Tarbox
-
Patent number: 10114726Abstract: In an example embodiment, a system may facilitate a root cause analysis associated with one or more computer applications. The system may receive a global time reference at the one or more computer applications. Each computer application may have a corresponding local time reference. Each computer application may synchronize its local time reference with the global time reference. The system may monitor at least one computer instructions of the computer applications with respect to the corresponding local time reference. The system may retrieve information associated with the at least one computer instruction. The system may forward at least a portion of the retrieved computer instruction information to a validation engine. The system may facilitate the root cause analysis using the at least a portion of the retrieved computer instruction information.Type: GrantFiled: June 24, 2015Date of Patent: October 30, 2018Assignee: Virsec Systems, Inc.Inventor: Satya Vrat Gupta
-
Patent number: 10095601Abstract: A computer implemented method of detecting a fault in a system comprises the steps of executing at least three virtual machines, each virtual machine executing a same application software, in separated and isolated memory segments and in a dedicated core of a multi-core processor; the virtual machines being synchronized and concurrently executed by a common hypervisor; wherein non-faulty virtual machines provide an identical output message within a predefined time-interval; detecting a fault in an output of a virtual machine, the fault corresponding to a different output message of the faulty virtual machine. Developments include a distributed vote mechanism, pull/push mechanisms, association of output vote messages with a safety extension comprising identification information, virtual machine recovery using data context.Type: GrantFiled: December 8, 2014Date of Patent: October 9, 2018Assignee: THALESInventors: Jaime De Oliveira, Guy Estaves, Fabian Tourteau, Christoph Scherrer
-
Patent number: 10095611Abstract: Disclosures herein describe a record and replay regression and unit test automation framework for simulating any hardware on a virtual machine to achieve thorough, affordable and efficient software testing. According to the disclosures herein, the test automation framework includes a recording stage where input and output messages for all the interfaces for a process (e.g., an embedded system or any software system or process) running on the original hardware may be recorded along with metadata in a space-optimized and efficient manner. The testing framework also includes a replay stage using innovative thread synchronization approaches that leverage the metadata to simulate the environment for the recorded embedded process in isolation, which may be done on an inexpensive machine or hardware. Thus, the original custom hardware, which may be expensive and costly to run, is not needed for the replay phase of testing.Type: GrantFiled: March 31, 2017Date of Patent: October 9, 2018Assignee: Infinera CorporationInventors: Jayaram Hanumanthappa, Ravi Shankar Pandey, Rajasekar Venkatesan, Anthony Jorgenson
-
Patent number: 10089195Abstract: A method for redundant processing of data by at least two processing units is described. After a restart or reset, the first processing unit of the at least two processing units receives first portions of the data for processing from at least one second processing unit of the at least two processing units.Type: GrantFiled: September 29, 2016Date of Patent: October 2, 2018Assignee: ROBERT BOSCH GMBHInventors: Mikkel Liisberg, Roland Schleser
-
Patent number: 10084980Abstract: A solid-state image sensor includes an image sensing unit in which a plurality of pixels are arrayed, a plurality of readout units configured to read out signals from the image sensing unit, a detector configured to detect an occurrence of a latch-up in each of the plurality of readout units, and a controller configured to control power supply to the plurality of readout units. The plurality of readout units are configured to read out signals from a same pixel in the image sensing unit. The controller is configured to shut off power supply to at least part of a readout unit in which the occurrence of the latch-up has been detected out of the plurality of readout units and thereafter supply power to the at least part.Type: GrantFiled: March 15, 2016Date of Patent: September 25, 2018Assignee: Canon Kabushiki KaishaInventors: Takashi Moriyama, Kazuaki Tashiro, Tatsuhito Goden, Toshiaki Ono
-
Patent number: 10078559Abstract: A massively parallel real-time computing system receives input data events across many compute nodes, each with a processing algorithm in its processing pipeline. An Event Manager is placed before the algorithm processing pipelines, receives metadata about each incoming event, and collects and organizes it in a database. A fast histogram compares the metadata about each event to that of all the other events, in a processing interval. For sufficiently matching metadata, the events are forwarded to the processing nodes as “regular” events for processing. If the metadata for a processing interval does not match sufficiently, the histogram decides which events are the “correct” events and which events are “incorrect.” The “correct” events are sent on for processing and the “incorrect” events are combined with the “correct” metadata and sent back to the processing nodes to supplement or modify their incoming data to match the other nodes' expectations.Type: GrantFiled: May 27, 2016Date of Patent: September 18, 2018Assignee: Raytheon CompanyInventor: Benjamin M Howe
-
Patent number: 10069689Abstract: Systems and methods are provided for increasing the overall network performance experienced by a group of devices by forming a dynamic and collaborative cluster of computing devices. In particular, the computing devices within the cluster collectively may identify and leverage the current capabilities of each of the individual members of the cluster to respond efficiently to network resource requests from computing devices inside or outside the cluster. As such, various embodiments provide for a dynamic cluster of computing devices that tailor the responsibilities of the members of the cluster to the current capabilities, capacities, and state of these computing devices. In particular, devices in the cluster may participate dynamically in the cluster to ensure that a device in the cluster that is currently most suited to performing a task is the device selected to perform that task.Type: GrantFiled: December 18, 2015Date of Patent: September 4, 2018Assignee: Amazon Technologies, Inc.Inventors: Justin Jon Derby, Andrew Kenneth Milton, Faizal Sultanali Kassamali, Massimo Ramella-Pezza, Richard Christopher Green, Adib Roumani
-
Patent number: 10061744Abstract: A method, system and computer program product are disclosed for recovery in a virtualized environment using remote direct memory access (RDMA). In one embodiment, the method comprises operating a virtual computer system on a physical computer system, and the virtual system maintains in a memory area a record of a state of the virtual system. In this method, when defined error conditions occur on the virtual system, RDMA is used to pull the record of the state of the virtual system from that memory area onto a standby computer. This record on the standby computer is used to re-initialize the virtual computer. Embodiments of the invention provide methods that provide a very fast recovery from a virtual machine fault or error, while requiring much fewer resources than standard approaches. In embodiments of the invention, one spare real computer system can be used for backing up several virtual systems.Type: GrantFiled: September 18, 2015Date of Patent: August 28, 2018Assignee: International Business Machines CorporationInventors: Mohammad Banikazemi, John Alan Bivens, Michael R. Hines
-
Patent number: 10057309Abstract: Examples discussed herein relate to a system including a first data processing system and a second data processing system. The first data processing system can be configured to receive a first partial media stream of a media stream split into at least the first partial media stream and a second partial media stream and send the first partial media stream to a device. The second data processing system can be configured to receive the second partial media stream and send the second partial media stream to the device.Type: GrantFiled: June 29, 2016Date of Patent: August 21, 2018Assignee: Microsoft Technology Licensing, LLCInventors: Danny Levin, Bradford R. Clark, Amer Hassan
-
Patent number: 10031820Abstract: Systems and methods to mirror data and otherwise manage memory are provided. A buffer may be coupled to a processor and be configured to write a first copy of data to a first memory located at a first server computer and a second copy of the data to a second memory that is accessible to both the first server computer and a second server computer. The buffer may be coupled directly to at least one of the first memory and the second memory via a memory bus, copper cable, or an optical cable. The buffer may write the first and the second copies of the data concurrently.Type: GrantFiled: January 17, 2013Date of Patent: July 24, 2018Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.Inventor: John M. Borkenhagen
-
Patent number: 10027560Abstract: Particular embodiments use a process that can invalidate an elected leader using an invalidated leader value. The availability and use of the invalidated leader value can avoid the requirement of performing a new election round to elect a new leader. When one node of the group detects that there may be a fault with respect to the leader of the system, the node can start the process to establish a new leader autonomously. First, the node can invalidate the leader. Then, the node attempts to propose a new leader. If a quorum is received, then the proposed leader may be elected as the new leader. By invalidating the old leader, the node can ensure that the old leader cannot be elected the new leader once the quorum is received for the new leader.Type: GrantFiled: November 12, 2015Date of Patent: July 17, 2018Assignee: HULU, LLCInventor: Keith Ainsworth
-
Patent number: 10025634Abstract: One embodiment of the present invention provides a system. The system includes a high availability module and a data transformation module. During operation, the high availability module identifies a modified object belonging to an application in a second system. A modification to the modified object is associated with a transaction identifier. The high availability module also identifies a local object corresponding to the modified object associated with a standby application corresponding to the application in the second system. The data transformation module automatically transforms the value of the modified object to a value assignable to the local object, including pointer conversion to point to equivalent object of the second system. The high availability module updates the current value of the local object with the transformed value.Type: GrantFiled: April 28, 2016Date of Patent: July 17, 2018Assignee: BROCADE COMMUNICATIONS SYSTEMS LLCInventors: Girish K. Goyal, Suresh Vobbilisetty
-
Patent number: 10013192Abstract: An integrated circuit (IC) device including a first memory device, a second memory device stacked with the first memory device, and one or more memory controllers configured to detect a first error in data stored in the first memory device at a first physical location in the IC device, and upon detecting the first error, determine whether there is a second error in data stored in the second memory device in a second physical location in the IC device near the first physical location.Type: GrantFiled: August 17, 2016Date of Patent: July 3, 2018Assignee: NXP USA, Inc.Inventor: Andrew C. Russell
-
Patent number: 10007450Abstract: A storage controller is coupled to a plurality of storage devices, the storage controller is configured to receive a first write request of data, determine a first time when the first write request is received, specify, based on the first time, a first storage device included in the plurality of storage devices, write the data into the first storage device, receive a read request for the data, determine a second time when the read request is received, specify a second storage device included in the plurality of storage devices, wherein, in anticipation of a second write request received at the second time, the processor specifies the second storage device based on the second time, determine whether the first storage device is identical to the second storage device, and not read the data from the first storage device when the first storage device is identical to the second storage device.Type: GrantFiled: March 1, 2016Date of Patent: June 26, 2018Assignee: FUJITSU LIMITEDInventor: Toshihiro Ozawa
-
Patent number: 10001939Abstract: Example embodiments of the present invention relate to a method, a system, and a computer program product for managing a plurality of storage providers to allocate a second storage provider as an active storage provider. The method includes monitoring respective health states of a plurality of storage providers in a storage infrastructure and determining an unhealthy health state of a first storage provider, operating as an active storage provider, among the plurality of storage providers. The method also includes managing the plurality of storage providers to allocate a second storage provider, operating as a standby storage provider, among the plurality of storage providers as the active storage provider.Type: GrantFiled: June 30, 2014Date of Patent: June 19, 2018Assignee: EMC IP Holding Company LLCInventors: Katakam Gangadhar, Stalin Saravanakumar Thangapalam, Selvamanickam Anbalagan, Michael G. Hegerich, Anil Arun Degwekar, Anoop Ninan
-
Patent number: 9992010Abstract: Systems and methods are disclosed herein for a replicated fault-tolerant computer system. The system includes a triplet of network elements, which each maintain a clock signal, and a clock monitor at each network element for monitoring incoming clock signals. Each network interfaces with a fault containment region (FCR). The system provides the ability to transition from a duplex system to a triplex system if one of the previously offline FCRs can be brought back online. The network elements can determine or receive notification that the previously offline FCR can be brought back online, align their respective clock signals, and synchronize the memory state of the previously offline FCR. The system can then operate in a fault-tolerant, replicated triplex operating mode.Type: GrantFiled: November 24, 2015Date of Patent: June 5, 2018Assignee: The Charles Stark Draper Laboratory, Inc.Inventors: Samuel Beilin, David Crane
-
Patent number: 9985985Abstract: A method of DDoS and hacking protection for internet-based servers using a private network of internet servers utilizes multiple data streams sent over a network of proxy servers to mitigate malicious attacks and ensure fast connections from a user to a destination server. The destination server is hidden from the user and the redundancy of the proxy network serves to maintain security and connection quality between the user and the destination server.Type: GrantFiled: February 22, 2017Date of Patent: May 29, 2018Assignee: AAA Internet Publishing Inc.Inventors: Robert Michael Norman Bartlett, Alexander Edward Needham, Keelan Lightfoot
-
Patent number: 9983812Abstract: According to one embodiment, a secondary primary storage system monitors replicated data received from a primary storage system, where the primary storage system provides primary storage services to a host device and the second storage system operates as a redundant storage system. In response to determining that no replicated data has been received from the primary storage system over a first predetermined period of time, the secondary primary storage system determines an amount of read/write data requests have been received from the host device for a second period of time. The secondary primary storage system transitions into a second primary storage system in response to determining the amount of read/write data requests received from the host exceeds a predetermined threshold.Type: GrantFiled: June 13, 2016Date of Patent: May 29, 2018Assignee: EMC IP Holding Company LLCInventors: Arieh Don, Ian Wigmore, Stephen Smaldone
-
Patent number: 9959173Abstract: A node includes: an arithmetic processing device; and a first memory, wherein the arithmetic processing device includes: a processor core; a storing circuit to store a first failure node list in which first information indicating that a failure has occurred or second information indicating that no failure has occurred is set for each of nodes; a request issuing circuit to issue a first request to a second memory provided at a first node among the nodes; a setting circuit to set the first information for the first node in the first failure node list when the first request has timed out; and an issuance inhibition circuit to inhibit, based on a second request to the second memory from the processor core, the second request from being issued by the request issuing circuit when the first information is set for the first node in the first failure node list.Type: GrantFiled: June 3, 2016Date of Patent: May 1, 2018Assignee: FUJITSU LIMITEDInventors: Norihiko Fukuzumi, Makoto Hataida, Seishi Okada, Jin Takahashi
-
Patent number: 9959421Abstract: A system and method for monitoring and diagnostics in an application server environment. A system can comprise one or more computers, which can include an application server environment executing thereon, together with a plurality of deployable resources configured to be used within the application server environment, and a plurality of partitions, wherein each partition provides an administrative and runtime subdivision of a domain. A diagnostic framework, such as a WebLogic Diagnostic Framework (WLDF) can also be provided, wherein the diagnostic framework is configured to perform at least one action from the group consisting of partition scoped logging, partition scoped monitoring, and partition scoped diagnostic imaging.Type: GrantFiled: June 23, 2015Date of Patent: May 1, 2018Assignee: ORACLE INTERNATIONAL CORPORATIONInventors: Rajendra Inamdar, Anthony Vlatas, Michael Cico, Sandeep Shrivastava
-
Patent number: 9940210Abstract: Embodiments described herein are directed to migrating affected services away from a faulted cloud node and to handling faults during an upgrade. In one scenario, a computer system determines that virtual machines running on a first cloud node are in a faulted state. The computer system determines which cloud resources on the first cloud node were allocated to the faulted virtual machine, allocates the determined cloud resources of the first cloud node to a second, different cloud node and re-instantiates the faulted virtual machine on the second, different cloud node using the allocated cloud resources.Type: GrantFiled: June 26, 2015Date of Patent: April 10, 2018Assignee: Microsoft Technology Licensing, LLCInventors: Gaurav Jagtiani, Abhishek Singh, Ajay Mani, Akram Hassan, Thiruvengadam Venketesan, Saad Syed, Sushant Pramod Rewaskar, Wei Zhao
-
Patent number: 9942207Abstract: Described herein is a security network controller having a main bus to which is coupled a central processing unit, a cryptographic processing circuit, a security control circuit, and a memory controller. The security control circuit is configured to receive data stored in memory from the memory controller over the main bus and send the data over a first dedicated bus to the cryptographic processing circuit to obtain encrypted data. The security control circuit is further configured to receive the encrypted data over the first dedicated bus from the cryptographic processing circuit and send the encrypted data to the memory controller over the main bus. The memory controller stores the encrypted data in memory of the security network controller.Type: GrantFiled: June 13, 2016Date of Patent: April 10, 2018Assignee: Cypress Semiconductor CorporationInventors: Kenichi Iizuka, Kumiko Toshimori, Machiko Mikami
-
Patent number: 9933771Abstract: A machine tool includes two independent sequence programs that monitor status of safety signals and first and second CPUs that respectively activate the sequence programs. By a configuration in which the second CPU executes monitoring processing at different execution cycles predetermined for the sequence programs, CPU loads in monitoring of status of safety signals are reduced.Type: GrantFiled: August 27, 2015Date of Patent: April 3, 2018Assignee: FANUC CORPORATIONInventor: Yoshinori Hoshino
-
Patent number: 9934631Abstract: A bio-implantable identification device configured for implantation in a user's body is provided. The bio-implantable identification device includes at least one memory configured to store a key, a receiver configured to receive an identification request, at least one processor configured to sign the identification request using the key stored in the at least one memory of the device, and a transmitter configured to transmit the signed request.Type: GrantFiled: August 18, 2014Date of Patent: April 3, 2018Assignee: Location Labs, Inc.Inventors: Andrew Weiss, Scott Hotes
-
Patent number: 9898189Abstract: A user trial feedback method, an electronic device, and a computer-readable medium are provided. The user trial feedback method includes the following steps. A launch signal is received to record an image of current frame of the touch screen and launch the user trial feedback tool. An information is inputted by the user in the user trail feedback tool, and logs related to the inputted information are collected and upload to a server along with the recorded image of the current frame.Type: GrantFiled: March 17, 2015Date of Patent: February 20, 2018Assignee: HTC CorporationInventors: Wan-Yun Chen, Kuan-Chuan Su, Kuan-Chi Chen