Of Power Supply Patents (Class 714/14)
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Patent number: 8812802Abstract: A memory subsystem includes a volatile memory, a nonvolatile memory, and a controller including logic to interface the volatile memory to an external system. The volatile memory is addressable for reading and writing by the external system. The memory subsystem includes a power controller with logic to detect when power from the external system to at least one of the volatile and nonvolatile memories and to the controller fails. When external system power fails, backup power is provided to at least one of the volatile and nonvolatile memories and to the controller for long enough to enable the controller to back up data from the volatile memory to the nonvolatile memory.Type: GrantFiled: May 28, 2012Date of Patent: August 19, 2014Assignee: AgigA Tech, Inc.Inventor: Ronald H Sartore
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Publication number: 20140229765Abstract: A datacenter housing servers, computers, data storage devices, telecommunications and related equipment for storing and accessing large amounts of data on a continuous, uninterrupted and reliable basis, which is provided with a supporting system or infrastructure for supplying power and cooling to the datacenter, which involves equipment primarily contained in modules situated outside the building that houses the primary computer and server equipment, whereby said supporting system or infrastructure is designed with redundant equipment, connections, and controls to avoid any single point of potential failure.Type: ApplicationFiled: April 21, 2014Publication date: August 14, 2014Applicant: Beacon Property Group LLCInventor: Joshua Nathaniel Grimshaw
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Patent number: 8806283Abstract: Systems and methods for testing non-volatile storage devices are disclosed that provide functionality to control when testing of the non-volatile storage device is performed. In one embodiment, information stored in persistent memory indicates whether testing is enabled or disabled. For example, the testing information may indicate that testing is to be performed upon a first initialization of a non-volatile storage device, but not in connection with subsequent power-up events. Furthermore, functionality is disclosed for re-running and/or bypassing testing of the non-volatile storage device.Type: GrantFiled: December 15, 2011Date of Patent: August 12, 2014Assignee: Western Digital Technologies, Inc.Inventors: Michael S. Allison, Nathan J. Hughes, Stephen J. Silva, John A. Strange
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Patent number: 8806238Abstract: A rack server system and an operating method applicable thereto are provided. The rack server system includes a battery backup unit (BBU) and at least one server. The operating method includes: communicating the server and the BBU with each other; the BBU providing a status information and a previous self-discharging test information to the server for the server to judge a status of the BBU; and providing power from the BBU to the server and adjusting a loading of the server according to the status information of the BBU when an input power is interrupted.Type: GrantFiled: March 1, 2012Date of Patent: August 12, 2014Assignee: Quanta Computer Inc.Inventors: Maw-Zan Jau, Tzu-Hung Wang, Chin-Hsiang Chan
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Patent number: 8806271Abstract: A user device is provided. The device includes a main power supply, and an auxiliary power supply. The main power supply provides a main power. The auxiliary power supply cuts off the main power according to a power level of the main power supply and provides an auxiliary power upon Sudden Power-Off (SPO).Type: GrantFiled: December 8, 2009Date of Patent: August 12, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Hwan-jin Yong, Donghyun Song, Janghwan Kim, Young-Goo Ko, Hyuck-Sun Kwon, Taek-Sung Kim, Kwangho Kim, Byungjin Ahn, Dongjin Lee, Byungse So, Jonggyu Park, Kyoungsub Oh, Kwanjong Park, Jongsoo Seo, Taehwa Yoo, Min-ho Kim
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Patent number: 8788238Abstract: A computing system connects to a server that comprises a plurality of power supplies. The computing system sends a power on command to one or more alternating current (AC) relays which are connected to the power supplies. Each of the one or more AC relays powers on the corresponding power supply according to the power on command. The server starts if the all the power supplies are powered on. The computing system sends a power off command to each predefined AC relay to power off the power supply corresponding each predefined AC relay in sequence. An execution unit of the server tests application programs of the server when each power supply corresponding to the predefined AC relay has been powered off. A result of testing the server denotes if the server is abnormal when the power supply has been powered off.Type: GrantFiled: August 30, 2011Date of Patent: July 22, 2014Assignee: Hon Hai Precision Industry Co., Ltd.Inventor: Jui-Ching Lin
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Patent number: 8788898Abstract: An apparatus is provided that comprises a test circuit; a first receiver unit arranged to receive test commands and to provide the test commands to the test circuit; a power supply unit arranged to supply power to the test circuit and to the first receiver unit; a second receiver unit arranged to receive power commands. The second receiver is arranged to control the operation of the power supply unit in response to the power commands received by the second receiver unit.Type: GrantFiled: June 3, 2011Date of Patent: July 22, 2014Assignee: STMicroelectronics (Research & Development) LimitedInventor: Edward Kent
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Patent number: 8775847Abstract: Reliability of a power supply is assessed, such as for example considering one or more of the following: whether a host device is experiencing fast acceleration; whether a portable power supply has sufficient energy to meet current needs; whether a battery or removable memory cover is in place; and whether a software failure within the host device is imminent. In dependence on the assessed reliability, there is a selection made between a first mode and a second mode for operating a mass memory. The first mode comprises better data retention than the second mode for the case that the power supply is interrupted, and the second mode comprises faster data transfer than the first mode for the case that the power supply is not interrupted. In one embodiment the first and second mode buffers write data utilizing respective non-volatile (flash) and volatile (DRAM) memory.Type: GrantFiled: December 14, 2010Date of Patent: July 8, 2014Assignee: Memory Technologies LLCInventor: Mikko Sami Tapani Kursula
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Patent number: 8769337Abstract: A detection method for configuration of power supply units and a detection system using the same are provided. The detection method includes: storing a production information setting about configuration of power supply units in a field replace unit, in which the production information setting includes a number setting and a location setting; sensing actual configuration number and location of the power supply units by a sensing unit so as to obtain an actual configuration information; and reading the production information setting and the actual configuration information and comparing them by a controller, in which the controller determines that the detection is passed when the actual configuration information matches the number setting and the location setting; and the controller outputs an unusual message when the actual configuration information does not match the number setting and the location setting.Type: GrantFiled: December 30, 2010Date of Patent: July 1, 2014Assignee: Inventec CorporationInventor: Hsin-Jung Hsu
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Patent number: 8768532Abstract: Indirect thermal fan control is described. In one or more implementations, a speed of a fan may be adjusted based on indirect measurements of temperature. For example, a temperature of air entering an enclosure and a current draw of an electrical component within the enclosure may be determined. A speed of a fan may then be adjusted based on the temperature of the air and the current draw of the component to change a flow of the air over the electrical component.Type: GrantFiled: July 15, 2011Date of Patent: July 1, 2014Assignee: Microsoft CorporationInventor: Brandon A. Rubenstein
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Patent number: 8755964Abstract: An outlet is provided to output power stored in a power storage device as commercial power, and the outlet receives power supply from the power storage device via a voltage converter. A car navigation device is configured to store information about traveling of a vehicle to a destination. An ECU obtains the information about traveling to the destination from the car navigation device, and controls a state of charge of the power storage device based on the information up to the destination and a usage status of the outlet up to the destination.Type: GrantFiled: January 24, 2011Date of Patent: June 17, 2014Assignee: Toyota Jidosha Kabushiki KaishaInventors: Wanleng Ang, Yoshinobu Sugiyama
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Patent number: 8756384Abstract: An information processing device and information processing method including a management table that includes three pages. A pair of first and second pages is alternately used as a valid page and an invalid page to secure the data. The valid page is copied to a third page. Even when the power is shut off in the process of updating the page, at the next start time, the status of the data writing operation when the power is shut off is determined based on the validity and stability of the pages. Therefore, the data is restored without any corruption of valid page by using a proper restoring method.Type: GrantFiled: December 23, 2008Date of Patent: June 17, 2014Assignee: Sony CorporationInventors: Taro Kurita, Toshiharu Takemura
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Publication number: 20140143596Abstract: An approach for power supply noise mitigation on a processor is provided. In one aspect, the approach comprises a central computing unit operatively coupled to the processor to execute program operations. The approach further comprises a calibration circuit adapted to determine a first threshold on the processor to be used for comparison performed dynamically through the use of a detection circuit. A detection circuit adapted to dynamically monitor system operation of the processor and indicate if the first threshold is violated and a counting circuit adapted to prevent voltage from drooping if one or more voltage sensing measurements violates the first threshold are also provided.Type: ApplicationFiled: January 24, 2014Publication date: May 22, 2014Applicant: International Business Machines CorporationInventors: Robert W. Berry, JR., Michael S. Floyd, Jarom Pena, Ryan J. Pennington, Catherine Sherry
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Patent number: 8725946Abstract: Methods and systems for mass storage of data over two or more tiers of mass storage media that include nonvolatile solid-state memory devices, hard disk devices, and optionally volatile memory devices or nonvolatile MRAM in an SDRAM configuration. The mass storage media interface with a host through one or more PCIe lanes on a single printed circuit board.Type: GrantFiled: August 17, 2011Date of Patent: May 13, 2014Assignee: OCZ Storage Solutions, Inc.Inventors: Ryan Maurice Petersen, Franz Michael Schuette
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Patent number: 8726074Abstract: A handling device and method for voltage faults applicable for using in a computer system. The handling method includes acquiring a signal of voltage fault. According to the signal of voltage fault and by looking up at tables, an operating status of the computer system corresponding to the signal of voltage fault is acquired, and generating a control signal according to the operating status. Then, the computer system according to the control signal is restarted.Type: GrantFiled: January 11, 2012Date of Patent: May 13, 2014Assignee: Inventec CorporationInventor: Chia-Hsiang Chen
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Patent number: 8726073Abstract: A control apparatus controls a first and a second power supply units having a redundant configuration and converters connected to respective outputs of the power supply units. The power supply units generate a plurality of voltages and supply a storage device with the generated voltages through the respective converters. The control apparatus includes a determination unit for determining whether an abnormality occurs in a first voltage that the first power supply unit generates, upon the second power supply unit failing, and an instruction unit for instructing the converter connected to the first power supply unit to generate the first voltage on the basis of a second voltage that the first power supply unit generates, upon the abnormality occurring in the first voltage of the first power supply unit.Type: GrantFiled: November 17, 2010Date of Patent: May 13, 2014Assignee: Fujitsu LimitedInventors: Mitsuru Maejima, Yasuyuki Nagata
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Patent number: 8719629Abstract: Power-backup capabilities are provided by implementing a variety of different methods, systems and devices. According to one such implementation, a solid-state memory device is implemented with a primary power source that provides primary power. A secondary power source provides secondary power. A power controller provides the primary power to an operating power circuit. The secondary power is provided by enabling a secondary switch located between the secondary power source and the operating power circuit. A solid-state memory uses power from the operating power circuit as a primary source of power when accessing stored data and retains data in the absence of power being provided by the operating power circuit. A memory controller facilitates access to the stored data. In response to problems with the primary power source, pending writes are completed to the solid-state memory circuit. A timing circuit substantially delays full enablement of the secondary switch.Type: GrantFiled: July 18, 2012Date of Patent: May 6, 2014Assignee: Seagate Technology LLCInventor: Dean Clark Wilson
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Patent number: 8713363Abstract: The invention provides a power supply system for a data storage system, the power supply system comprising: a first power supply unit for supplying power to the storage system; a second power supply unit independent from the first power supply unit for supplying power to the storage system; an auxiliary power supply; a power redundancy controller, arranged to monitor the region of an efficiency curve within which the first and/or second power supplies are operating in and control the first and second power supplies accordingly such that the either or both of the first and second power supplies are providing power at any one time, wherein in the event of failure of a power supply unit when only one of the power supply units is operating, the power redundancy controller is arranged to provide power supply to the data storage system from the auxiliary power supply.Type: GrantFiled: September 29, 2010Date of Patent: April 29, 2014Assignee: Xyratex Technology LimitedInventor: Tim Williams
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Patent number: 8707084Abstract: A data center management unit (DCMU, 100) for managing and controlling power distribution to computers in a data center, includes a power inlet (101), a plurality of power outlets (111, 112, 113, 114, 115, 116, 117, 118) for providing power to respective ones of the computers, a processor (141), at least one wired data port (151, 152, 153, 154) for controlling one or more of the computers, and a network interface (155) enabling a data center administrator to manage the data center management unit (DCMU, 100) remotely via wired network connectivity. In addition the data center management unit (DCMU, 100) contains a redundant meshed wireless network interface (156). The data center management unit (DCMU, 100) is adapted to automatically switch to the redundant meshed wireless network interface as an alternative for the network interface (155) in situations where the wired network connectivity is lost.Type: GrantFiled: August 12, 2010Date of Patent: April 22, 2014Assignee: Racktivity NVInventors: Wilbert Ingels, Niko Vinken
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Patent number: 8707097Abstract: An information processing apparatus includes a controller, a plurality of electric power supply units and a backup electric power supply unit that supply electric power to the controller. The controller detects a malfunction occurring in the plurality of electric power supply units, stops electric power supply from the plurality of electric power supply units, starts electric power supply from the backup electric power supply unit when a malfunction is detected, identifies an electric power supply unit having a malfunction from the plurality of electric power supply units, disconnects the identified electric power supply unit, resumes electric power supply from an electric power supply unit determined to function normally and stops the electric power supply from the backup electric power supply unit when the electric power supply unit having the malfunction is disconnected.Type: GrantFiled: October 13, 2011Date of Patent: April 22, 2014Assignee: Fujitsu LimitedInventors: Ryo Kubota, Takanori Ishii, Kentarou Yuasa
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Patent number: 8707096Abstract: In a storage system for performing data backup using a battery during blackout, when the blackout continues for a long time, problems such as the loss of volatile memory data due to the consumption of battery capacity and the difference in recovery time between controller units after power recovery occur during restarting of the system. The present invention solves the problems by selecting (a1) battery backup or (a2) saving of data in a nonvolatile device based on the battery capacity or setting of modes, and selecting (b1) inhibiting restart of the system or (b2) storing of data in the volatile memory to a nonvolatile memory means and performing access via write-through based on the remaining capacity of the battery when restarting the system after power recovery. Further, the system enables to increase and decrease the volatile memory capacity of the write area and mutually confirms synchronization of controller units and contents of volatile memories.Type: GrantFiled: October 12, 2011Date of Patent: April 22, 2014Assignee: Hitachi, Ltd.Inventors: Yuta Sekino, Shinichi Nakayama, Akira Nishimoto, Ikuya Yagisawa
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Patent number: 8707095Abstract: A datacenter housing servers, computers, data storage devices, telecommunications and related equipment for storing and accessing large amounts of data on a continuous, uninterrupted and reliable basis, which is provided with a supporting system or infrastructure for supplying power and cooling to the datacenter, which involves equipment primarily contained in modules situated outside the building that houses the primary computer and server equipment, whereby said supporting system or infrastructure is designed with redundant equipment, connections, and controls to avoid any single point of potential failure.Type: GrantFiled: July 14, 2011Date of Patent: April 22, 2014Assignee: Beacon Property Group LLCInventor: Josh Grimshaw
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Patent number: 8707067Abstract: A power supply controlling system including: a first power supply controlling apparatus that supplies an electric power to a device; and a second power supply controlling apparatus that supplies an electric power to another device, communicates with the first power supply controlling apparatus, and mediates communication between the first power supply controlling apparatus and a terminal device to control power supply to the device, the terminal device controlling the power supply to the device; wherein the first power supply controlling apparatus communicates with the terminal device without relaying the second power supply controlling apparatus, according to interruption of the communication between the first power supply controlling apparatus and the second power supply controlling apparatus.Type: GrantFiled: May 31, 2011Date of Patent: April 22, 2014Assignee: Fujitsu Component LimitedInventors: Shinichi Katayama, Naoyuki Nagao
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Patent number: 8677110Abstract: A client terminal receives, in response to a boot command issued by a user to boot the client terminal, a first start command to start monitoring. The client terminal acquires first time information, repeatedly at certain time intervals from a basic software, and stores the first time information in a storage area. The client terminal receives a termination command to terminate the basic software. If the termination command is a command to terminate the basic software by using the basic software, the client terminal stores normal termination information in the storage area. When a second start command is received, and no normal termination information is stored in the storage area, the client terminal acquires second time information from the basic software and creates, depending on a result of comparison between the second time information and the first time information, log information relating to a termination of the basic software.Type: GrantFiled: September 20, 2011Date of Patent: March 18, 2014Assignee: Fujitsu LimitedInventors: Kanako Ogasawara, Tadashi Okada
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Patent number: 8677181Abstract: A storage apparatus includes a drive unit device including multiple storage drives, a drive interface unit and a power supply unit, a storage controller including multiple processing units and a drive control interface unit, a recording part recording whether a relevant data input/output process was successful for each of multiple data paths, and a failure detection unit performing a process which, when one processing unit determines the data input/output process not being performed successfully, determines whether a result of the data input/output process performed by other processing units is recorded in the recording part within a predetermined period of time after an abnormality of the relevant data input/output process is recorded, and, when the first processing unit detecting the abnormality determines that the data input/output process abnormality is recorded, provides an instruction to stop the data input/output processes to the drive unit device in which the abnormality is detected.Type: GrantFiled: December 13, 2010Date of Patent: March 18, 2014Assignee: Hitachi, Ltd.Inventors: Yosuke Nakayama, Tetsuya Inoue, Tsutomu Koga, Hiroshi Suzuki
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Patent number: 8667307Abstract: A power control circuit and a power control method applied to a computer system are disclosed. A regulator receives a first voltage, the regulator converting the first voltage to an embedded controller voltage when the regulator is enabled. A detecting and controlling circuit receives the first voltage and the button signal, and the regulator is enabled when the detecting and controlling circuit detects the button signal. An embedded controller connects to the regulator for receiving the embedded controller voltage and outputting the plurality of power control signals. The embedded controller sends a power on signal to the detecting and controlling circuit to keep the regulator enabled.Type: GrantFiled: May 7, 2010Date of Patent: March 4, 2014Assignee: ASUSTeK Computer Inc.Inventor: Yi-Wen Chiu
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Patent number: 8650363Abstract: A memory subsystem includes a volatile memory, a nonvolatile memory, and a controller including logic to interface the volatile memory to an external system. The volatile memory is addressable for reading and writing by the external system. The memory subsystem includes a power controller with logic to detect when power from the external system to at least one of the volatile and nonvolatile memories and to the controller fails. When external system power fails, backup power is provided to at least one of the volatile and nonvolatile memories and to the controller for long enough to enable the controller to back up data from the volatile memory to the nonvolatile memory.Type: GrantFiled: May 27, 2012Date of Patent: February 11, 2014Assignee: AgigA TechInventor: Ronald H Sartore
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Patent number: 8645753Abstract: The present disclosure discloses a power system with hot-swap with a buck converter. The power system comprises a front stage, a hot-swap stage and a load stage; wherein the hot-swap stage comprises: a buck converter having a switch operate at ON/OFF state to provide a desired output voltage to the load stage with low power loss and optimized thermal design.Type: GrantFiled: December 22, 2011Date of Patent: February 4, 2014Assignee: Monolithic Power Systems, Inc.Inventors: Eric Yang, ZhengXing Li, Yuancheng Ren
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Patent number: 8635494Abstract: Provided is a RAID controlled storage device of a PCI-Express (PCI-e) type, which provides data storage/reading services through a PCI-Express interface. The RAID controller typically includes a disk mount coupled to a set of PCI-Express SSD memory disk units, the set of PCI-Express SSD memory disk units comprising a set of volatile semiconductor memories; a disk monitoring unit coupled to the disk mount for monitoring the set of PCI-Express memory disk units; a disk plug and play controller coupled to the disk monitoring unit and the disk mount for controlling the disk mount; a high speed host interface coupled to the disk monitoring unit and the disk mount for providing high-speed host interface capabilities; a disk controller coupled to the high speed host interface and the disk monitoring unit; and a host interface coupled to the disk controller.Type: GrantFiled: April 30, 2010Date of Patent: January 21, 2014Assignee: Taejin Info Tech Co., Ltd.Inventor: Byungcheol Cho
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Patent number: 8635495Abstract: Systems and methods for classifying a possible failure in a power network are provided. In one embodiment, a method may include receiving network device status information for multiple network devices in communication with a communications network and capable of receiving primary power from a power network; and determining that a possible power network failure exists based on a first portion of the network devices associated with an inactive status and a second portion of the network devices associated with an active status, wherein the first portion comprises network devices without battery back-up capabilities and the second portion comprises network devices with battery back-up capabilities.Type: GrantFiled: November 16, 2010Date of Patent: January 21, 2014Assignee: Cox Communications, Inc.Inventors: Bruce Dexter Beeco, Ian Derrick Tabb
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Patent number: 8606420Abstract: A system, a method and a computer program product for determining an amount of an electric power to be generated in an electric power system and determining a total cost for generating the amount of electric power while satisfying at least one contingency constraint and one or more customer request. The system creates an optimization problem for calculating amount of the electric power to be generated and a total cost for generating the calculated amount of the electric power while meeting the at least one contingency constraint. The system runs the optimization problem in real-time. The system outputs, from the optimization problem, an output specifying the calculated amount of the electric power and the total cost to generate the calculated amount of the electric power.Type: GrantFiled: July 15, 2011Date of Patent: December 10, 2013Assignee: International Business Machines CorporationInventors: Jayant R. Kalagnanam, Dung Phan
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Patent number: 8601315Abstract: A device is configured with components to enable debugging of the device's entry into and exit from a low power mode. The device includes: core logic, debug components, and a power management module (PMM). When the device exits a low power mode in which the states of the debug components are lost, the PMM prevents the core logic from resuming processing operations until the debug components have been re-configured to their prior states. The PMM either holds the core logic in reset or alternatively withholds power to the core logic. Reconfiguration of the debug components is initiated by a connected debugger, which can set one or more control and status (CS) register values within the device. The CS register values determine when the PMM prevents the core logic processing from resuming and when the PMM enables core logic processing to resume following the device's return from low power mode.Type: GrantFiled: November 1, 2010Date of Patent: December 3, 2013Assignee: Freescale Semiconductor, Inc.Inventors: Robert Ehrlich, George Baker, Alan Carlin
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Patent number: 8601316Abstract: A power supply system includes a power supply unit, a number of electrical loads and a sequence circuit. The power supply unit provides power for the electrical loads through the sequence circuit. When any one of the electrical loads fails the sequence circuit will record the failure, shut down and lock the power supply unit to prevent the power supply unit from powering the electrical loads.Type: GrantFiled: March 9, 2011Date of Patent: December 3, 2013Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Kai-Fu Chen, Chia-Yun Lee, Chuang-Wei Tseng
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Patent number: 8595558Abstract: A computer turning on/off testing apparatus for turning on a computer automatically includes a control module, a switch module, and a power supply module. The control module outputs control signals and receives a turn on signal from the computer to determine whether the computer turns on successfully. The switch module receives the control signals and turns on/off the computer according to the control signals. The power supply module provides power to the control module and the switch module. The control module stores a predetermined test time. The control module records abnormal information and test times when the computer turns on/off, and outputs the control signals to turn on the computer again when the computer cannot restart. The computer is turned on and off until a turning on/off time of the computer is equal to the predetermined test time.Type: GrantFiled: December 13, 2010Date of Patent: November 26, 2013Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.Inventors: Ling-Yu Xie, Xing-Ping Xie
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Patent number: 8595521Abstract: A redundant power supply may obtain a rule for increasing mean time between failures (MTBF) for a first internal power supply and a second internal power supply connected to an electronic device, apply the rule to the first and second power supplies, activate the second internal power supply based on the rule to permit the second internal power supply to provide power to the electronic device, and deactivate the first internal power supply based on the rule.Type: GrantFiled: November 26, 2012Date of Patent: November 26, 2013Assignee: Juniper Networks, Inc.Inventors: Ankur Singla, Harshad Nakil, Surendra Patel
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Patent number: 8595545Abstract: A method is disclosed for balancing the requirements of high availability achieved by redundant active components and power saving achieved by less active components. The requirement for high availability can be expressed by the recovery time objective (RTO) which specifies the amount of time it takes to recover from a failure in the system. Based on the configured RTO, the system configures the most appropriate power mode.Type: GrantFiled: November 2, 2012Date of Patent: November 26, 2013Assignee: International Business Machines CorporationInventors: Thomas Gardelegen, Nils Haustein, Peter Kimmel
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Patent number: 8595550Abstract: A network switch includes a power connection configured to receive power from a primary power source and at least two ports. At least a first one of the ports is configured to connect to a first network interface of a first computing device through a communication medium configured to conduct operating power for the network switch. The first network interface is configured to draw electrical power from a power supply of the first computing device and provide, through the network cable, at least a portion of the drawn electrical power as the operating power. A switching circuit is configured to route network data between the ports and a power management circuit coupled at least to the first port. The power management circuit is configured to draw at least a portion of the operating power from the first port, and power the switching circuit using the drawn power responsive to a detected failure of the primary power source.Type: GrantFiled: March 30, 2011Date of Patent: November 26, 2013Assignee: Google Inc.Inventors: Taliver Brooks Heath, Shawn M. Ledbetter, Bob Felderman
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Patent number: 8589721Abstract: A system and method are disclosed for balancing the requirements of high availability achieved by redundant active components and power saving achieved by less active components. The requirement for high availability can be expressed by the recovery time objective (RTO) which specifies the amount of time it takes to recover from a failure in the system. Based on the configured RTO, the system configures the most appropriate power mode.Type: GrantFiled: June 28, 2011Date of Patent: November 19, 2013Assignee: International Business Machines CorporationInventors: Thomas Gardelegen, Nils Haustein, Peter Kimmel
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Patent number: 8589729Abstract: A data preservation device includes a circuit board configured to be positioned within a memory module slot of a computing device and releasably engage a memory bus of the computing device. A non-volatile memory storage device is electrically coupled to the circuit board. A control circuit is electrically coupled to the circuit board and is configured to read a data portion from the computing device and write the data portion to the non-volatile memory storage device during the occurrence of a power failure event on the computing device. An independent power supply is configured to power the data preservation device during the power failure event.Type: GrantFiled: September 28, 2007Date of Patent: November 19, 2013Assignee: EMC CorporationInventors: Jason Pritchard, Himanshu Agrawal, Michael Robillard, Robert Beauchamp
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Patent number: 8572415Abstract: A storage system includes one or more first power supplies which receive power from the first input and supplies power to each of multiple load groups through multiple first paths and multiple second power supplies which receive power from the second input and supplies power to each of the multiple load groups through multiple second paths. Each load group is comprised of at least one load, and each load is a storage device. Power is supplied from different second power supplies respectively to two or more load groups to which power is supplied from the first power supply through two or more first paths.Type: GrantFiled: February 2, 2012Date of Patent: October 29, 2013Assignee: Hitachi, Ltd.Inventor: Yosuke Tsuyuki
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Patent number: 8566639Abstract: A memory device includes: volatile memory; an interface for connecting to a backup power source; non-volatile memory; a first configuration data bus for accessing parameters describing substantially permanent characteristics of the volatile memory; a second configuration data bus for accessing at least one of state of health information of the backup power source and status information of the memory device, wherein the first configuration data bus and the second configuration data bus implement a same bus protocol; a controller programmed to detect a loss of power of a primary power source and move data from the volatile memory to the non-volatile memory, wherein configuration information of the controller is at least one of readable and writable through the first configuration data bus; and wherein at least one of the state-of-health information and the status information is at least one of readable and writable through the second configuration data bus.Type: GrantFiled: February 11, 2009Date of Patent: October 22, 2013Assignee: STEC, Inc.Inventors: Mark Moshayedi, Douglas Finke
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Publication number: 20130262922Abstract: The present invention relates to a centralized and networked protection system and method of regional distribution network, and belongs to the field of electrical system automation and relay protection.Type: ApplicationFiled: October 14, 2012Publication date: October 3, 2013Applicants: STATE GRID CORPORATION OF CHINA, XJ GROUP CORPORATIONInventors: Xiaohui SONG, Xing LIU, Yong WEI, Dingguo WANG, Jungang LI
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Patent number: 8539265Abstract: A power protection system for a power supply includes a power unit, a microcontroller, a connector, a current sensing resistor, a hot-swap controller, and an electronic switch having first to third terminals. The first terminal is connected to the connector through the current sensing resistor. The second terminal is connected to the power unit. The third terminal is connected to a control pin of the hot-swap controller. First and second sensing pins of the hot-swap controller are respectively connected to two ends of the current sensing resistor. A monitoring pin of the hot-swap controller is connected to the second terminal. A clock pin and a data pin of the hot-swap controller are connected to two terminals of the microcontroller.Type: GrantFiled: February 28, 2011Date of Patent: September 17, 2013Assignee: Hon Hai Precision Industry Co., Ltd.Inventor: Chun-Po Chen
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Patent number: 8533514Abstract: The power draw of equipment in a data center may be capped in order to keep the power draw under the capacity of the Uninterruptable Power Supply (UPS) that serves the data center. The current capacity of the UPS may be estimated, and the equipment may be controlled so as to keep the equipment's power draw under that current capacity. Factors that may affect the estimate of the UPS's current capacity include the history of temperature and humidity to which the UPS has been subject, and charge/discharge history of the UPS. Factors that may affect the decision of which equipment to throttle to a lower power level include: the current power load at the data center, the type of software that each server is running, and the demand for that software.Type: GrantFiled: June 26, 2011Date of Patent: September 10, 2013Assignee: Microsoft CorporationInventors: Harry R. Rogers, Kushagra Vaid, Mark E. Shaw, Badriddine Khessib, Bryan Kelly, Matthew Faist
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Patent number: 8533528Abstract: A system comprising a plurality of subsystems and a master power sequencer. Each of the plurality of subsystems is coupled to an associated power switch and an associated slave power sequencer. The master power sequencer is coupled to each of the slave power sequencers and each of the power switches. Upon a slave power sequencer identifying a fault with its associated subsystem, the master power sequencer determines whether to provide power to any other subsystem. Further, the master power sequencer is configured to send a signal to each of the power switches indicating whether to provide power to the subsystem associated with each of the power switches.Type: GrantFiled: December 16, 2009Date of Patent: September 10, 2013Assignee: Hewlett-Packard Development Company, L.P.Inventor: David Maciorowski
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Patent number: 8522077Abstract: Examples relate to a grid switch adapted for use with a power supply, wherein the grid switch selects an operational power grid from first and second power grids if one of power grids has failed, and selects between the first and second grids based on a policy if both the first and second power grids are operational.Type: GrantFiled: October 27, 2010Date of Patent: August 27, 2013Assignee: Hewlett-Packard Development Company, L.P.Inventors: Stephen Ejner Horvath, Sean Cerniglia
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Patent number: 8516300Abstract: Embodiments include a system, a device, and a method. A computing system includes a synchronous circuit. The synchronous circuit includes a first subcircuit powered by a first power plane having a first power plane voltage and a second subcircuit powered by a second power plane having a second power plane voltage. The system also includes an error detector operable to detect an incidence of a computational error occurring in the first subcircuit. The system further includes a controller operable to change the first power plane voltage based upon the detected incidence of a computational error. The system may include a power supply operable to provide a selected one of at least two voltages to the first power plane in response to the controller.Type: GrantFiled: January 13, 2009Date of Patent: August 20, 2013Assignee: The Invention Science Fund I, LLCInventor: William Henry Mangione-Smith
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Patent number: 8510593Abstract: A control apparatus includes a lower layer control unit configured to perform control of a load, an upper layer control unit configured to control the lower layer control unit, a communication unit configured to perform communication between the upper layer control unit and the lower layer control unit via a communication line, a detection unit configured to detect power supply voltage of the lower layer control unit, wherein the upper layer control unit detects communication abnormality of the communication unit and notifies the communication abnormality, the upper layer control unit notifying abnormality of power supply voltage of the lower layer control unit, in such a manner as to be identified from the communication abnormality of the communication unit.Type: GrantFiled: September 20, 2010Date of Patent: August 13, 2013Assignee: Canon Kabushiki KaishaInventor: Noriaki Adachi
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Patent number: 8510598Abstract: A method for providing reduced power consumption in a computer memory system is provided. The method includes transferring, by a memory controller coupled to a volatile memory, a non-volatile memory, and a buffer, first data from the volatile memory to the buffer. The buffer stores less data than the volatile memory and the non-volatile memory. The method also includes placing the volatile memory into self-refresh mode after transferring the first data to the buffer. The method further includes conveying the first data from the buffer to the non-volatile memory, where the amount of first data exceeds a predetermined threshold. While conveying the first data, the memory controller takes the volatile memory out of self-refresh mode when the amount of first data in the buffer reaches the predetermined threshold. The volatile memory is ready to transfer second data to the buffer when the memory controller is finished transferring the first data.Type: GrantFiled: January 24, 2011Date of Patent: August 13, 2013Assignee: Dot Hill Systems CorporationInventors: Rex Weldon Vedder, Bradford Edwin Golson, Michael Joseph Peters
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Patent number: 8489058Abstract: A receiver includes a memory, processing circuitry, and a memory protection unit. The processing circuitry is coupled to the memory, and has an input for receiving a radio frequency (RF) signal, and an output for providing an output signal at another frequency. The processing circuitry includes one or more independently powered components adapted to write data to the memory. The memory protection unit is coupled to the memory, and monitors a power supply voltage level corresponding to each independently powered component and, if the power supply voltage level changes during a power supply transition of an independently powered component in which the power supply voltage remains sufficiently large to power the independently powered component, to prevent write operations received from a corresponding one of the one or more independently powered components from occurring at least while the power supply voltage level is changing.Type: GrantFiled: June 21, 2011Date of Patent: July 16, 2013Assignee: Silicon Laboratories Inc.Inventors: Donald A. Kerth, Brian D. Green, Augusto M. Marques