Of Power Supply Patents (Class 714/14)
  • Patent number: 7725742
    Abstract: A remote monitor module for power initialization of a computer system includes a monitor logic and a BMC (Baseboard Management Controller). The monitor logic is in circuit connection with a power-up sequence controller and several basic voltage domains on a system board of the computer system. The monitor logic also defines a monitor power-up sequence to perform a basic power-up sequence defined in the power-up sequence controller and allow system changes in power initialization. Extra voltage domain(s) may be enabled and monitored according to the monitor power-up sequence. Eventually, multiple power initialization event/state signals are transmitted by the monitor logic to a remote management host through the BMC.
    Type: Grant
    Filed: December 6, 2006
    Date of Patent: May 25, 2010
    Assignee: Mitac International Corp.
    Inventors: Tomonori Hirai, Jyh Ming Jong
  • Publication number: 20100122096
    Abstract: The invention relates to a switch mode power supply (SMPS—Switching Mode Power Supply) which provides the output voltages generated in the AC-network-input switch mode power supply (SMPS—Switching Mode Power Supply) circuits also with battery and similar supply inputs when necessary by using a shared power transformer (T3) having separate power input windings (7, 6) appropriate for the particular input voltage for each input supply and the power switching transistors (Q1, Q2, Q5, Q6) connected to this windings in accordance with the topology used and, which other remaining control, feedback, output rectifying and filtering circuits and other windings of the transformer are single and shared without using a second independent power supply or regulator circuit in addition to the network-input power supply.
    Type: Application
    Filed: February 15, 2008
    Publication date: May 13, 2010
    Inventor: Sergin Özenc
  • Patent number: 7702930
    Abstract: A control device controls a device to be on and off in response to boot data that instructs boot of the device. The control device includes a receiving unit that receives the boot data through a network; a counting unit configured to count the number of the boot data received within a predetermined time; and a control unit that controls to turn on and to turn off the device. The control device controls to turn on the device when the number of the boot data counted is “1”. The control device controls to turn off the device when the number of the boot data counted is “N”.
    Type: Grant
    Filed: December 19, 2005
    Date of Patent: April 20, 2010
    Assignee: Fujitsu Limited
    Inventor: Taketoshi Yasumuro
  • Publication number: 20100095136
    Abstract: A powered device can provide information to another device (such as a power sourcing equipment) via a powered communications interface when operating power is not being provided to the powered device via the powered communications interface, enabling a variety of functions and applications. Relatively low voltages and currents of the type used for detection and classification of the powered device are used in an extended way to achieve the communications. The power sourcing equipment performs additional detections and/or classifications, and the powered device responds by presenting corresponding signatures or identity networks that convey additional information beyond the presence and power requirements of the powered device. As an example, a powered device can present a sequence of signatures signifying that power should be applied to the powered device notwithstanding an active policy of withholding power in furtherance of a power conservation scheme.
    Type: Application
    Filed: October 10, 2008
    Publication date: April 15, 2010
    Applicant: CISCO TECHNOLOGY, INC.
    Inventor: Roger Karam
  • Patent number: 7698595
    Abstract: Provided is a highly reliable storage apparatus for supplying power to a plurality of memory mediums. This storage apparatus has a plurality of hard disks separately disposed in groups of eight; a plurality of power supply units for supplying power to each of the eight hard disks belonging to each group; and a redundant power supply unit connected in parallel with each power supply unit, wherein power is supplied from the redundant power supply unit to the eight hard disks connected to the power supply unit subject to a malfunction during such malfunction among the plurality of power supply units.
    Type: Grant
    Filed: May 22, 2006
    Date of Patent: April 13, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuya Inoue, Hiroshi Suzuki, Masahiro Sone, Yousuke Kawakubo, Toshiyuki Nagamori
  • Patent number: 7694163
    Abstract: A system for generating and monitoring voltages on a variety of different components on a common printed circuit board. The system includes a programmable controller, a plurality of DC/DC converters for producing voltages for the devices and a plurality of voltage regulators for produced voltages for a plurality of CPUs on the board, such CPU voltages being produced in accordance with VIDs provided to the regulator by the CPU. The programmable controller: establishes a set point voltage for such one of the DC/DC converters; sequentially monitors the produced voltages produced, monitors voltages produced by the regulators for the CPUs by comparing the VIDs to the voltages produced by the regulators, and if during the sequencing any one of the converters is determined by the programmable controller as producing an improper voltage or if the any one of the regulators fails top produce the voltage indicated by the VIDs, disables the board.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: April 6, 2010
    Assignee: EMC Corporation
    Inventor: David C. Bisbee
  • Publication number: 20100083010
    Abstract: Power management for clusters of computers, a cluster including a configuration of computers operating in a power management domain, one or more of the computers of the cluster having a power requirement that differs from power requirements of other computers in the cluster, data processing operations on the cluster effecting a processing load on the computers in the cluster, including selecting, from a plurality of configurations of computers capable of supporting a plurality of processing loads at a plurality of power levels, a configuration of computers capable of supporting the processing load at a lowest power level, the lowest power level defined by comparison among configurations capable of supporting the processing load; and reconfiguring the cluster according to the selected configuration.
    Type: Application
    Filed: October 1, 2008
    Publication date: April 1, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Eric R. Kern, William G. Pagan
  • Publication number: 20100064170
    Abstract: Some embodiments of the present invention provide a system that prolongs a remaining useful life of a power supply in a computer system. First, performance parameters of the power supply are monitored. Next, the remaining useful life of the power supply is predicted based on the monitored performance parameters. Then, an operational regime of the power supply is adjusted based on the predicted remaining useful life to prolong the remaining useful life.
    Type: Application
    Filed: September 5, 2008
    Publication date: March 11, 2010
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Kenny C. Gross, Aleksey M. Urmanov, Anton A. Bougaev
  • Patent number: 7673176
    Abstract: A computing device comprising a plurality of devices and a plurality of visual indicators is disclosed. Each of the plurality of visual indicators is interconnected with a power source and is associated with a different one of the plurality of devices. None of the plurality of visual indicators comprises a capacitor.
    Type: Grant
    Filed: September 15, 2006
    Date of Patent: March 2, 2010
    Assignee: International Business Machines Corporation
    Inventors: Richard Lionel Bradshaw, Gregg Steven Lucas, Andrew Ellis Seidel
  • Publication number: 20100037093
    Abstract: A method and apparatus for redundant power and data over a wired data telecommunications network permits power to be received at a local powered device (PD) from remote power sourcing equipment (PSE) via at least one conductor at a first time and power and/or data to be obtained by the local device from another port of the remote device or another remote device at a second different time. Power levels obtained may be adjusted from time to time in response to circumstances.
    Type: Application
    Filed: October 16, 2009
    Publication date: February 11, 2010
    Applicant: CISCO TECHNOLOGY, INC.
    Inventors: Daniel Biederman, Kenneth Coley, Frederick R. Schindler
  • Patent number: 7661002
    Abstract: A storage controller has a capacitor pack for storing energy to supply power during a main power loss, a temperature sensor that senses the capacitor pack temperature, and a CPU, which detects that the temperature of the capacitor pack has risen above a predetermined threshold while operating at a first voltage value and determines whether a projected lifetime of the capacitor pack is less than the warranted lifetime. If the projected lifetime is less than the warranted lifetime, the CPU reduces the operating voltage of the capacitor pack to a second value, in order to increase the capacitor pack lifetime. In one embodiment, the CPU reduces the voltage if an accumulated normalized running time of the capacitor pack is greater than an accumulated calendar running time. In another embodiment, the CPU reduces the voltage if a percentage capacitance drop of the capacitor pack is greater than a calendar percentage capacitance drop.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: February 9, 2010
    Assignee: Dot Hill Systems Corporation
    Inventors: Victor Key Pecone, Yuanru Frank Wang
  • Patent number: 7653834
    Abstract: Embodiments include a system, an apparatus, a device, and a method. An apparatus includes a synchronous circuit including a first subcircuit powered by a first power plane having a first power plane voltage and a second subcircuit powered by a second power plane having a second power plane voltage. The apparatus also includes an error detector operable to detect an incidence of a computational error occurring in the first subcircuit. The apparatus includes a controller operable to change the first power plane voltage based upon the detected incidence of a computational error. The apparatus also includes a power supply configured to electrically couple with a portable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller.
    Type: Grant
    Filed: March 17, 2006
    Date of Patent: January 26, 2010
    Assignee: Searete, LLC
    Inventor: William Henry Mangione-Smith
  • Patent number: 7647519
    Abstract: A method, system, and computer program product are disclosed for dynamically managing power in a microprocessor chip that includes physical hardware elements within the microprocessor chip. A process is selected to be executed. Hardware elements that are necessary to execute the process are then identified. The power in the microprocessor chip is dynamically altered by altering a present power state of the hardware elements that were identified as being necessary.
    Type: Grant
    Filed: June 2, 2008
    Date of Patent: January 12, 2010
    Assignee: International Business Machines Corporation
    Inventors: Thomas J. Heller, Jr., Michael Ignatowski, Bernard S. Meyerson, James W. Rymarczyk
  • Patent number: 7634688
    Abstract: A system and method for automatically saving the contents of volatile memory in a data processing device on power failure. A secondary power supply is provided, which upon failure of the primary power supply supplies power long enough for all modified information stored in volatile memory to be written to a non-volatile memory device such as NAND flash in an AutoSave procedure. In the preferred embodiment modified sectors in volatile memory are flagged, and only modified sectors with a directory list are written to non-volatile memory during the AutoSave procedure.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: December 15, 2009
    Assignee: Research In Motion Limited
    Inventors: Richard C. Madter, Karin Alicia Werder, Wei Yao Huang
  • Patent number: 7627774
    Abstract: A system comprises plural electronic modules, at least one interconnect structure and plural power supplies. The electronic modules communicate over the interconnect structure. The system further comprises plural redundant manager modules to perform management tasks with respect to the at least one interconnect structure and the power supplies.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: December 1, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kevin A. Egan, Brad O. Underwood, Mark E. Shaw, Mark A. Shaw, Brian M. Johnson, D. Glen Edwards
  • Patent number: 7624303
    Abstract: A power controller system is described herein, which may consist of one or more power controller ICs and other components. Each power controller selectively couples power supply voltages to a plurality of electrical devices, such as cards that have been inserted into expansion slots in a server. To simplify processing by a system processor monitoring the health of the power subsystem, each power controller IC asserts a power-good signal at a power-good terminal only if the operating conditions for all channels are satisfactory. A power good signal is generated even if a channel is not supplying power to a channel due to a card retention switch signal not being asserted or the channel is not enabled. The power-good signals from all power controllers in the system are then ANDed together to determine if any of the power controllers are experiencing unsatisfactory conditions.
    Type: Grant
    Filed: August 23, 2006
    Date of Patent: November 24, 2009
    Assignee: Micrel, Inc.
    Inventors: William Andrew Burkland, Adolfo A. Garcia
  • Patent number: 7620846
    Abstract: A method and apparatus for redundant power and data over a wired data telecommunications network permits power to be received at a local powered device (PD) from remote power sourcing equipment (PSE) via at least one conductor at a first time and power and/or data to be obtained by the local device from another port of the remote device or another remote device at a second different time. Power levels obtained may be adjusted from time to time in response to circumstances.
    Type: Grant
    Filed: October 7, 2004
    Date of Patent: November 17, 2009
    Assignee: Cisco Technology, Inc.
    Inventors: Daniel Biederman, Kenneth Coley, Frederick R. Schindler
  • Patent number: 7613940
    Abstract: A power supply unit supplies power for each of a plurality of power supply groups configured to supply the power to a first recording device that belongs to a first redundant-array-of-independent-disks group and a second recording device that belongs to a second redundant-array-of-independent-disks group. The second redundant-array-of-independent-disks group includes recording devices different from those of the first redundant-array-of-independent-disks group. A power-supply control unit cuts off, when a malfunctioning occurs in a specific recording device, power supply to a power supply group that includes the specific recording device.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: November 3, 2009
    Assignee: Fujitsu Limited
    Inventor: Ryohei Nishimiya
  • Patent number: 7607043
    Abstract: A system for analyzing mutually exclusive conflicts among a plurality of redundant devices in a computer system includes a data management module operable on the computer system. The data management module parses through status data generated by the plurality of redundant devices to identify an error condition in one of the plurality of redundant devices, generate metadata describing the error condition, and take action to resolve the error condition. A method of analyzing mutually exclusive conflicts among redundant devices in a computer system includes collecting status data from the redundant devices, identifying an error condition, generating metadata describing the condition, analyzing the metadata to determine a lowest-level or least impacting redundant device that is the root cause of the condition, and taking an action to resolve the condition.
    Type: Grant
    Filed: January 4, 2006
    Date of Patent: October 20, 2009
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Crawford, Michael R. Groseclose, Jr., David A. Larson
  • Patent number: 7596715
    Abstract: A network-configured computing device providing services to one or more other computing devices. A circuit board contained within a housing of the computing device includes a plurality of interfaces for coupling one or more devices therewith. Processing units mounted on the circuit board provide services to the network-configured computing devices. A memory device connects to the circuit board, and a primary power source is coupled to the processing units for supplying power thereto. A cooling device positioned within the housing reduces heat generated during operation of the network-configured computing device. A modular network interface connection device positions within the housing and operatively connects to at least one processing unit via a circuit board interface. A modular network router device positions within the housing and operatively connects to the modular network interface connection device.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: September 29, 2009
    Inventor: Carlo Leonardo Di Cristofano
  • Publication number: 20090240981
    Abstract: A method of booting a multi-processor data processing device includes establishing a link between a first processor and a memory. The link is monitored to determine if, in response to a request from the processor, expected initialization data is communicated between the memory and the first processor. If unexpected data is detected on the link, the link is severed and a new link established between a second processor and the memory to allow the second processor to initiate the boot process. This ensures that, in the event of an error in the boot process at the first processor, the device can complete the boot process, thereby reducing device downtime.
    Type: Application
    Filed: March 24, 2008
    Publication date: September 24, 2009
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Andelon X. Tra, David M. Lynch, Oswin Housty
  • Publication number: 20090217088
    Abstract: A power over Ethernet (PoE) powered device with power fallback states. A powered device can be powered using a primary local power source and a secondary PoE power source. To enable consistent behavior by the powered device, a controlled power fallback state can be defined that would ensure limited functionality in the powered device upon a failure of the primary local power source. For example, the limited functionality could include a communication channel to the switch, diagnostic circuitry, etc.
    Type: Application
    Filed: February 22, 2008
    Publication date: August 27, 2009
    Applicant: Broadcom Corporation
    Inventor: Wael William Diab
  • Publication number: 20090210738
    Abstract: A data control unit includes a primary power supply line to which a primary power supply voltage is supplied; a secondary power source line to which a secondary power supply voltage is supplied; a voltage converter for converting the primary power supply voltage into the secondary power supply voltage; a voltage level detection unit which is connected to the primary power source line, and outputs a voltage level detection signal; a reset signal generator which is connected to the secondary power source line, and outputs a reset signal; and a control signal generation unit which receives the voltage level detection signal and the reset signal, and outputs a control signal. The data control unit detects power supply cutoff, and secures the time for sufficient backup process.
    Type: Application
    Filed: February 12, 2009
    Publication date: August 20, 2009
    Applicant: Rohm Co., Ltd.
    Inventor: Hiromitsu Kimura
  • Patent number: 7558988
    Abstract: Provided is a storage system, including: one or more disk drives storing data; a disk controller for controlling data access to the disk drive; a power supply controller for autonomously turning off a power source of the disk drive according to the data access status to the disk drive, and autonomously turning on the power source of the disk drive, which was turned off, after the lapse of a prescribed period from the time the power source was turned off irrespective of the data access status to the disk drive; and a media inspection unit for inspecting a failure in the disk drive in which the power source thereof was autonomously turned on irrespective of the data access status to the disk drive.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: July 7, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Kenji Ishii, Akira Murotani, Tetsuya Abe
  • Publication number: 20090172469
    Abstract: A method, apparatus, logic device, and storage system for power-fail protection are disclosed. The method includes: when a system power supply fails, supplying, by a battery, power to a south bridge chip (SBC), a non-volatile flash storage medium, an interface conversion circuit (ICC) between the SBC and the non-volatile flash storage medium and a memory; and transmitting unsaved data in the memory to the corresponding non-volatile flash storage medium via the ICC, by using an unused bus interface of the SBC. The ICC converts a bus interface of the SBC into a corresponding bus interface of the non-volatile flash storage medium. The embodiments of the invention can effectively solve problems of data loss in case of system power failure and short retention time, and realize protection operation in case of system power failure, convenient upgrading memory capacity, and saving system space, without adding cost and total capacity of battery.
    Type: Application
    Filed: December 22, 2008
    Publication date: July 2, 2009
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventor: Ji XIAO
  • Patent number: 7548502
    Abstract: HDD boxes 831 to 83n are each incorporated with a secondary battery box 87, a non-isolated DC/DC converter 89, and an HDD 91. Logical circuit boards 851 to 85n are each incorporated with the secondary battery box 87, fast-transient-response-type non-isolated DC/DC converters 931 to 933, and a plurality of loads 951 to 953. Every secondary battery box 87 is provided with a charge/discharge circuit 97, and a plurality of in-line secondary batteries 99. In the HDD box, the output voltage from the secondary battery box 87 goes to an HDD 91 via the DC/DC converter 89. In the logical circuit board, the output voltage from the secondary battery box 87 goes to the corresponding loads 951 to 953 via the DC/DC converters 931 to 933. With such a structure, in a disk array apparatus, realized are higher energy efficiency and less space occupation through reducing power loss and optimizing power capacity setting for a backup power.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: June 16, 2009
    Assignee: Hitachi, Ltd.
    Inventor: Katsunori Hayashi
  • Patent number: 7543199
    Abstract: A test device that can improve test reliability is provided. In the test device, an error detecting unit detects an error of inputted test signals to generate an error flag, a normal test unit performs a test operation according to the test signals when the error flag is deactivated, and an error information providing unit indicates the error of the test signals when the error flag is activated.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: June 2, 2009
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Jae-Il Kim, Jae-Hyuk Im
  • Patent number: 7543170
    Abstract: A system for monitoring and controlling the safety system of equipment, which is used to insure personnel safety and cause the system to “fail safe” in the event of computer or software failure, the failure of a critical piece of hardware, or the opening of any interlock indicating, for example, the unexpected entry of personnel into a dangerous area. Provides an integrated system of timed status monitoring hardware and software for use in a distributed-network computer-controlled environment. The hardware piece of this system includes a digital I/O computer add-on card, or other hardware supporting high-speed alternating state telemetry, and a custom circuit card. Such a circuit, when used within the overall control system can monitor the state of interlock switches and monitor the status of the computer control system(s). Such a safety circuit can then cause a shutdown appropriate to the failure detected.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: June 2, 2009
    Assignee: Novacentrix Corp.
    Inventors: Rens Ross, Steven C. McCool
  • Patent number: 7536576
    Abstract: This storage apparatus has a plurality of units for transferring or storing data sent from an information processing device, and includes a failure notification unit for notifying a failed unit among the plurality of units, a power supply switching command unit for commanding the switching of off and on of the power supply of the failed unit notified from the failure notification unit, and a power supply switching unit for switching off and thereafter switching on the power supply of the failed unit according to the command of the power supply switching command unit.
    Type: Grant
    Filed: June 22, 2006
    Date of Patent: May 19, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Seiji Shima, Kosaku Kambayashi
  • Patent number: 7536608
    Abstract: A method for providing an indication from a network interface controller to a microcontroller is disclosed wherein upon occurrence of a particular condition within the network interface controller, an indication is provided from a reset pin of the network interface controller to the microcontroller unit. Upon receipt of the indication by the microcontroller unit, communications between the network interface controller and the microcontroller unit are inhibited.
    Type: Grant
    Filed: November 2, 2007
    Date of Patent: May 19, 2009
    Assignee: Silicon Laboratories Inc.
    Inventors: Thomas Saroshan David, Randall Kent Sears
  • Publication number: 20090113238
    Abstract: A heater unit includes power failure management to detect disruptions in the electrical power supply, such as the AC supply, for the unit. The heater unit emits an audible alarm in response to detection of such a disruption, and may shut down the heater(s) and visuals display(s). The heater unit advantageously includes a power storage device, such as a super-capacitor, to temporarily power the electronic circuitry of the heater unit. Operating parameters, such as of a processor of the electronic circuitry, may be stored in a non-volatile memory response to the disruption, and recalled if the disruption terminates before the level of power has gotten too low to sustain reliable operation of the processor.
    Type: Application
    Filed: October 29, 2007
    Publication date: April 30, 2009
    Applicant: SMITHS MEDICAL ASD, INC.
    Inventors: Zhan Liu, Ashok Mahadevan, Robert L. Snyder
  • Patent number: 7526674
    Abstract: Methods and apparatuses for supplying power to processors in multiple processor systems are disclosed. Embodiments comprise a method of monitoring a parameter that is related to a first voltage potential coupled to the processor. When the parameter or condition monitored indicates that the first voltage is bad or faulty, the method generally involves isolating the voltage from the processor, disabling or resetting the processor, and coupling a second voltage potential to the processor. The method may also allow the computer system to continue operating with the processor disabled. Other embodiments comprise an error detection circuit for detecting an error related to a first voltage regulator, a disabling circuit to disable the first voltage regulator in response to the error, a processor isolating circuit, and a voltage switching circuit to supply voltage from a second voltage regulator to the processor.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: April 28, 2009
    Assignee: International Business Machines Corporation
    Inventors: Warren D. Bailey, Srinivas Cheemalapati
  • Patent number: 7512637
    Abstract: A storage system and an undo processing method that can facilitate undo processing for configuration change operations that have been performed for storage apparatuses by different administrators. A management server manages the history of configuration change operations it performs for storage apparatuses while a storage apparatus manages the history of configuration changes it makes in itself in accordance with the configuration change operations performed by the management server.
    Type: Grant
    Filed: January 24, 2006
    Date of Patent: March 31, 2009
    Assignee: Hitachi, Ltd.
    Inventor: Takeshi Saito
  • Patent number: 7512838
    Abstract: Disclosed is a method and apparatus relating generally to analysis techniques for data integrity following an un-safe power down occurrence of non-tape media components comprising a storage system. The data storage system comprises at least one random access memory storage device adapted to be power cycled in at least an on and off condition. The random access memory storage device comprises at least one storage medium comprising a first stored data segment. The storage device is adapted to receive data for storage on the medium in at least a second data segment. At least one state bit has a first state associated with the second data segment during the storage of the second data segment and a second state associated with the second data segment after completion of the storage of the second data segment wherein the state bit is stored in non volatile memory associated with the storage device.
    Type: Grant
    Filed: May 10, 2005
    Date of Patent: March 31, 2009
    Assignee: Spectra Logic Corporation
    Inventors: Richard Douglas Rector, Walter Wong
  • Patent number: 7509529
    Abstract: A processor embedded in a device includes instructions for procedures to be completed by a user. A display provides the instructions as steps for completion to the user. The processor monitors status of the device to determine completion of the steps before proceeding with the next step. Errors in performing steps are identified by the processor and steps to correct the errors are displayed for execution by the user.
    Type: Grant
    Filed: July 18, 2003
    Date of Patent: March 24, 2009
    Assignee: American Power Conversion Corporation
    Inventors: David A. Colucci, Neil Rasmussen
  • Patent number: 7502950
    Abstract: A dual power supply switching system for use in an electronic sign where independent suitably sized power supplies each capable of independently powering an entire plurality of LED display modules supply power on an alternating distributed basis to the plurality of LED display modules. A microcontroller having an odd or even address on each LED display module controls the connection of the respective LED display module to a particular power supply by controlling onboard solid state switches and, upon sensing an inadequate power source supply, switches to the other power supply to re-establish power to the LED display module.
    Type: Grant
    Filed: April 26, 2006
    Date of Patent: March 10, 2009
    Assignee: Daktronics, Inc.
    Inventor: Jason L. Brands
  • Patent number: 7500120
    Abstract: Techniques for identifying UPS-sub-system interconnections using manual data, UPS identification signals, and variations in UPS voltage variations that produce error signals. Once interconnections have been identified an operating system can check the UPS/sub-system topology to isolate potential errors and/or to enable controlled shut-down of sub-systems in case of potential power failure.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: March 3, 2009
    Assignee: International Business Machines Corporation
    Inventors: Patrick K. Egan, Todd J. Rosedahl
  • Publication number: 20090049337
    Abstract: A system for testing redundancy and hot-swapping capability of a redundant power supply includes a power switch fixture, a system under test (SUT), and a computing device. The power switch fixture includes a processor, an alternating current (AC) source, a first relay, a second, and two AC outputs. The processor is configured for controlling the AC source to output voltage to the two AC outputs by switching one of the first and the second relay on and the first and the second relay off, so as to ensure that one of the first power supply and the second power supply is operable to provide power to the SUT. The SUT includes a redundant power supply that includes a first power supply and a second power supply. The computing device includes a test control unit for testing redundancy and hot-swapping capability of the redundant power supply.
    Type: Application
    Filed: July 7, 2008
    Publication date: February 19, 2009
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: CHUNG-JEN HSIEH, CHAO-TSUNG FAN, CHIEN-MIN FANG
  • Patent number: 7490252
    Abstract: An abnormal power interruption internal circuitry protection method and system is proposed for use with a computer platform, such as a blade server, which is characterized by the utilization of each server module's identification code (i.e., blade ID signal) and power-good signal to judge whether each server module is subjected to an abnormal power interruption, such that in the event of the abnormal power interruption, a small amount of remnant electrical power left in the internal circuitry of the blade server can be fetched as power source to shut down the server modules through a normal shutdown procedure. This feature can help protect the internal circuitry of the server modules of the blade server from being damaged due to abnormal shutdown in the event of abnormal power interruption.
    Type: Grant
    Filed: March 17, 2006
    Date of Patent: February 10, 2009
    Assignee: Inventec Corporation
    Inventor: Sheng-Yuan Tsai
  • Publication number: 20090037768
    Abstract: This descriptive document is about a new backup device that takes advantage of the components of a PC's conventional power supply and it combines them with additional typical electronic components from an uninterruptible power supply (UPS). The result of such combination is a lower cost backup function that is applied directly to the PC and, therefore, eliminates the requirement of external devices—such as a UPS—to perform this backup function. In this document, the electronic components that combine with the PC's power supply in order to provide the backup functionality described above are referred to as integrated backup unit (URI).
    Type: Application
    Filed: November 13, 2007
    Publication date: February 5, 2009
    Applicant: Cove Distribution, Inc.
    Inventor: Mary Louise Adams
  • Patent number: 7487391
    Abstract: A storage controller has a capacitor pack for storing energy to supply during a main power loss, a temperature sensor that senses the capacitor pack temperature, and a CPU, which repeatedly: receives the temperature during an interval over which the capacitor pack is operated, determines a lifetime over which the capacitor pack would have a capacity to store at least a predetermined amount of energy if operated at the temperature during the lifetime, normalizes the interval by a ratio of a warranted lifetime of the capacitor pack relative to the determined lifetime, and adds the normalized interval to an accumulated normalized running time. The operating voltage of the capacitor pack may also sampled and used to determine the lifetime. The predetermined amount of energy may be for backing up a volatile write cache to a non-volatile memory in response to the loss of main power.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: February 3, 2009
    Assignee: Dot Hill Systems Corporation
    Inventors: Victor Key Pecone, Yuanru Frank Wang
  • Patent number: 7484109
    Abstract: A system for placing and maintaining a computer in a standby mode during power failure, utilizing one of: a powered device controller exhibiting a maintain power signature functionality and arranged to receive power over communication cabling; and a MEMS flywheel energy system to provide a standby power. The standby power is less than the power required for full operation. In one embodiment the system additionally exhibits: a mains power failure sensor; a volatile memory arranged to be powered from the source of standby power in the event of a failure of mains power; and a processor operative responsive to the mains power failure sensor to store status information on the volatile memory and reduce power demand of the processor and associated devices to no more than that available from the source of standby power.
    Type: Grant
    Filed: September 12, 2005
    Date of Patent: January 27, 2009
    Assignee: Microsemi Corp. - Analog Mixed Signal Group Ltd.
    Inventors: Daniel Feldman, Arkadiy Peker, Dror Korcharz, Simon Kahn, Ilan Atias, Mohamad A. Saleh
  • Patent number: 7478251
    Abstract: A controller in PSE (Power Sourcing Equipment) controls how to provision uninterruptible power through corresponding ports (and cables) of the PSE to network devices. For example, the controller of the PSE receives a signal indicating a transition of powering the PSE from a primary power input to a backup power supply. The backup power supply has a limited ability to provide backup power to the PSE. In response to receiving the signal, the controller of the PSE utilizes a powering/de-powering algorithm to generate control information used by the controller to selectively discontinue providing power through the certain ports to respective network devices. Consequently, the PSE and, more specifically, the controller provisions power from the PSE depending on a priority level associated with network devices, extending the power life of critical powered network devices and more efficiently using the backup power supply in the case of a power failure.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: January 13, 2009
    Assignee: Cisco Technology, Inc.
    Inventors: Wael William Diab, Matthew A. Laherty
  • Patent number: 7472290
    Abstract: A controller in PSE (Power Sourcing Equipment) controls how to provision uninterruptible power through corresponding data ports (and cables) of the PSE to network devices. For example, the controller receives power profile information associated with the network devices indicating how to provision power to the network devices during a power failure such as when an uninterruptible power supply providing power to the power sourcing equipment runs on a battery rather than failed primary wall power. In response to detecting a power failure condition, the power sourcing equipment provisions power to the network devices based on the power profile information associated with the network devices. Consequently, the PSE can smartly provision power to more critical network devices while in a power failure mode rather than provision power to the network devices in the same way before and after occurrence of the power failure mode.
    Type: Grant
    Filed: March 4, 2005
    Date of Patent: December 30, 2008
    Assignee: Cisco Technology, Inc.
    Inventors: Wael William Diab, Matthew A. Laherty
  • Patent number: 7464292
    Abstract: A redundant power supply system with several individual power supplies, each connected to one of several power inlets. At least one power supply can be connected to a selectable one of the several power inlets by means of a steering network.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: December 9, 2008
    Assignee: Network Appliance, Inc.
    Inventors: Zoltan Zansky, William F. M. Jacobsen, Sandeep K. Shah
  • Patent number: 7463543
    Abstract: A lock-out device is provided that determines whether to lock out a chip or not according to the result of operation voltage drop detected at a plurality of positions in a semiconductor integrated circuit device. As a result, unnecessary lock-out operations can be prevented and a program operation or an erase operation in a semiconductor memory device can be executed stably.
    Type: Grant
    Filed: October 5, 2005
    Date of Patent: December 9, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Pan-Suk Kwak
  • Patent number: 7461303
    Abstract: A system for improving Field Replacement Unit (FRU) isolation in memory sub-systems by monitoring Voltage Regulator Module (VRM) induced memory errors. A comparator compares the output voltage coming from the VRM to memory. If the comparator detects a VRM output voltage transient that is outside a rated threshold, then a counter is increased by one. If the counter exceeds a count threshold, a VRM error is posted. If a memory failure occurs within a predetermined period of time, then the VRM error pinpoints the VRM output voltage transient as being the likely cause of the memory failure.
    Type: Grant
    Filed: March 23, 2007
    Date of Patent: December 2, 2008
    Assignee: International Business Machines Corporation
    Inventors: Charles R. Dart, Edmund Sutherland Gamble, Gary Anthony Jansma, Terence Rodrigues, Robert Joseph Ruckriegel, Bruce James Wilkie
  • Patent number: 7451336
    Abstract: The present invention provides a method, apparatus and computer-readable program for providing management of a computing complex during a utility interruption. More specifically, the present invention provides an automated method, apparatus and computer-readable program to manage the selected power down of devices within an information technology computing complex when the loss of conventional utility service occurs. This invention selectively shuts down systems/devices within the computing complex based on the criticality of the systems/devices and the current state of environment parameters (e.g., battery reserve level, temperature, time, etc.) monitored within the computing complex.
    Type: Grant
    Filed: October 16, 2003
    Date of Patent: November 11, 2008
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey Donald Manuell, Michael James Pascoe, Maureen Faye Peters
  • Patent number: 7451348
    Abstract: A high data availability write-caching storage controller has a volatile memory with a write cache for caching write cache data, a non-volatile memory, a capacitor pack for supplying power for backing up the write cache to the non-volatile memory in response to a loss of main power, and a CPU that determines whether reducing an operating voltage of the capacitor pack to a new value would cause the capacitor pack to be storing less energy than required for backing up the current size write cache to the non-volatile memory. If so, the CPU reduces the size of the write cache prior to reducing the operating voltage. The CPU estimates the capacity of the capacitor pack to store the required energy based on a history of operational temperature and voltage readings of the capacitor pack, such as on an accumulated normalized running time and warranted lifetime of the capacitor pack.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: November 11, 2008
    Assignee: Dot Hill Systems Corporation
    Inventors: Victor Key Pecone, Yuanru Frank Wang
  • Patent number: RE41014
    Abstract: A system and method for preventing damage to media files within a digital camera comprise a power manager for detecting power failures, an interrupt handler for responsively incrementing a counter device and a removable memory driver for performing memory access operations, evaluating the counter device to determine whether a power failure has occurred during the memory access operation and for repeating the memory access operation whenever a power failure has occurred during the memory access operation.
    Type: Grant
    Filed: July 17, 2003
    Date of Patent: November 24, 2009
    Assignee: Apple Inc.
    Inventor: Eric C. Anderson