Of Power Supply Patents (Class 714/14)
  • Publication number: 20110208998
    Abstract: To shorten the time from power restoration to the resumption of business operation. During a power failure, a memory controller saves configuration information and directory information of a shared memory to a nonvolatile memory, and saves data of a cache memory to the nonvolatile memory. During power restoration from a power failure, the memory controller returns information of the nonvolatile memory to the shared memory so that it can be updated before the lapse of the initialization time, the micro processor executes online processing based on information of the shared memory, and the memory controller 70 controls the storage area of the cache memory so that it will become gradually writable according to the battery capacity of the battery if the battery capacity of the battery is still gradually increasing even after the lapse of the initialization time.
    Type: Application
    Filed: February 19, 2010
    Publication date: August 25, 2011
    Applicant: HITACHI, LTD.
    Inventor: Fumiaki Hosaka
  • Patent number: 8006132
    Abstract: The present invention includes a plurality of disk units for storing data from a host computer, a plurality of power supply apparatuses for supplying DC power to each of the disk units via main power supply wirings, and a redundant power supply apparatus for generating, with any one of the disk units among the plurality of disk units as a load, DC power to the load. As auxiliary power supply wirings for guiding the output of the redundant power supply apparatus to each of the disk units, a common power supply wiring that is common to each of the power supply apparatuses, a plurality of branch power supply wirings branching from the common power supply wiring and connected to each of the disk units, and a redundant power supply wiring for connecting the redundant power supply apparatus and the common power supply wiring are wired to a backboard.
    Type: Grant
    Filed: January 29, 2008
    Date of Patent: August 23, 2011
    Assignee: Hitachi, Ltd.
    Inventor: Masahiro Sone
  • Patent number: 8005118
    Abstract: A method and apparatus for implementing a secure clock having no internal power source are disclosed. The apparatus accesses a host device having an internal power source and transmits and receives data. The apparatus includes a clock control unit, a counter, and a time information unit. The clock control unit performs control such that the time information of the host device is acquired and a counter value corresponding to the acquired time information is set, when the clock control unit is connected to the host device and is supplied with power from the host device. The counter changes the set counter value in steps of a predetermined value at regular time intervals while the power is supplied. The time information unit updates current time information to correspond to the changed counter value while the power is supplied.
    Type: Grant
    Filed: December 6, 2006
    Date of Patent: August 23, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-gyoo Sim, Yun-sang Oh, Kyung-im Jung, Suk-bong Lee
  • Patent number: 8001419
    Abstract: An industrial automation controller module includes a main module and an energy storage module (ESM) releasably connected to the main module. The ESM includes a back-up electrical power source such as a battery or a capacitor that is electrically connected to processor circuitry of the main module when the ESM is physically connected to the main module. In case of interruption of operating power to the processor circuitry of the main module, the back-up power source of the ESM supplies back-up power to the main module to allow for completion of an emergency save operation to save data to non-volatile memory in the main module. If the ESM includes a capacitor back-up power source, it is charged by the main module and the capacitor charge is dissipated if the ESM is separated from the main module.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: August 16, 2011
    Assignee: Rockwell Automation Technologies, Inc.
    Inventors: Daniel E. Killian, Douglas R. Bodmann, Dale R. Terdan, Ronald E. Schultz, James J. Kay
  • Patent number: 7962787
    Abstract: A method, and a system of using the method, of preserving memory of a processor powered by an external source. The method includes determining a drop in a first power to be supplied to the processor, generating a reset signal when the drop falls below a threshold, supplying a second power from a power store to the processor based on the reset signal, and holding the reset signal until the first power rises above the threshold.
    Type: Grant
    Filed: January 29, 2008
    Date of Patent: June 14, 2011
    Assignee: Robert Bosch GmbH
    Inventors: Paul M. Camilleri, Jerry A. Gohl
  • Patent number: 7962776
    Abstract: A method to detect component removal while operating in a battery backup mode, comprising providing power from a battery backup unit (BBU) to a control card memory device, and measuring the current drawn by the control card memory device. If the current drawn by the control card memory device is less than or equals a pre-determined disconnect current, the method determines if a BBU release pin has been asserted. If the BBU release pin has been asserted, the method encodes in an event log a battery backup removal event. If the BBU release pin has not been asserted, the method encodes in the event log a control card removal event.
    Type: Grant
    Filed: October 14, 2007
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Steven Mark Groff, Larry Juarez, Joseph Dean Ohrazda, Kenny Nian Gan Qiu
  • Patent number: 7958346
    Abstract: Systems, methodologies, and other embodiments associated with providing multi-layered security for configuration items are described. One exemplary system may include a security logic configured to process the contents of a configuration item based on the source of the configuration item and the integrity of the configuration item. The exemplary system may also include a verification logic configured to further process the contents and to selectively provide the contents. A configuration item may be provided to the security logic by a configuration item provider known to the security logic and related to the security logic by a first set of keys. The security logic may be related to the verification logic by a second set of keys different from the first set of keys.
    Type: Grant
    Filed: August 18, 2005
    Date of Patent: June 7, 2011
    Assignee: Oracle International Corp.
    Inventor: Daniel ManHung Wong
  • Publication number: 20110126046
    Abstract: An embodiment is a method and apparatus to save data during power failure. A power supply generator generates operating voltages to a circuit from a generator supply source. A power monitor monitors a normal supply voltage and a backup supply voltage to provide a normal supply voltage to the generator supply source in a normal mode and to provide a backup supply voltage to the generator supply source in a power failure mode. A data transfer circuit transfers data from a volatile memory in the circuit to a non-volatile memory during the power failure mode.
    Type: Application
    Filed: November 24, 2009
    Publication date: May 26, 2011
    Applicant: VIRTIUM TECHNOLOGY, INC.
    Inventor: Phan Hoang
  • Patent number: 7949897
    Abstract: A predetermined power failure recovery process is carried out when power failure recovery data is determined to be present in a flash ROM when a power supply is turned on after a power failure. However, when a tray opening and closing key is pressed before completion of this power failure recovery process, it is determined that a power failure recovery process interruption request is received, and the power failure recovery process interruption request is displayed at a power failure recovery selection screen. When interruption of the power failure recovery process is selected on the power failure recovery selection screen, it is determined whether or not reading of predetermined units of data relating to the power failure recovery process from the optical disc 1 is complete. A power failure recovery interruption process is then carried out after completion. A tray is then automatically opened when the power failure recovery interruption process is complete.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: May 24, 2011
    Assignee: Funai Electric Co., Ltd.
    Inventor: Shojiro Fujimoto
  • Patent number: 7934123
    Abstract: Some embodiments of the present invention provide a system that prolongs a remaining useful life of a power supply in a computer system. First, performance parameters of the power supply are monitored. Next, the remaining useful life of the power supply is predicted based on the monitored performance parameters. Then, an operational regime of the power supply is adjusted based on the predicted remaining useful life to prolong the remaining useful life.
    Type: Grant
    Filed: September 5, 2008
    Date of Patent: April 26, 2011
    Assignee: Oracle America, Inc.
    Inventors: Kenny C. Gross, Aleksey M. Urmanov, Anton A. Bougaev
  • Publication number: 20110078379
    Abstract: An I/O processor determines whether or not the amount of dirty data on a cache memory exceeds a threshold value and, if the determination is that this threshold value has been exceeded, writes a portion of the dirty data of the cache memory to a storage device. If a power source monitoring and control unit detects a voltage abnormality of the supplied power, the power monitoring and control unit maintains supply of power using power from a battery, so that a processor receives supply of power from the battery and saves the dirty data stored on the cache memory to a non-volatile memory.
    Type: Application
    Filed: December 3, 2010
    Publication date: March 31, 2011
    Inventors: Junichi IIDA, Xiaoming Jiang
  • Patent number: 7913274
    Abstract: An apparatus such as a television signal receiver includes an emergency alert function which, when activated, provides an alert output to notify users of an emergency event. According to an exemplary embodiment, the apparatus includes a tuner operative to tune signals including emergency alert signals capable of activating the emergency alert function. A processor is operative to detect a condition indicating relocation of the apparatus after a power interruption to the apparatus, and to enable a predetermined output associated with the emergency alert function responsive to detecting the condition.
    Type: Grant
    Filed: October 15, 2003
    Date of Patent: March 22, 2011
    Assignee: Thomson Licensing
    Inventors: Scott Allan Kendall, Rajeev Madhukar Sahasrabudhe
  • Publication number: 20110066884
    Abstract: A power supply control device including: a control unit which controls power supplied from a first device to a disk array unit accessible from host devices through a network device; and a second device which supplies power to the disk array unit and the power supply control device when the power supply from the first device is disconnected, the control unit including: a collecting unit which collects power supply fault information regarding at least one of the host devices and the network device; a starting unit which starts power supply from the second device when power supplied from the first device is disconnected; and a transmitting unit which transmits a notification to the disk array unit in response to collection of power supply fault information after starting the power supply from the second device, the notification indicating that the power supplied from the first device is disconnected.
    Type: Application
    Filed: September 17, 2010
    Publication date: March 17, 2011
    Applicant: NEC CORPORATION
    Inventor: Ryo SUZUKI
  • Patent number: 7904734
    Abstract: A redundant power supply may obtain a rule for increasing mean time between failures (MTBF) for a first internal power supply and a second internal power supply connected to an electronic device, apply the rule to the first and second power supplies, activate the second internal power supply based on the rule to permit the second internal power supply to provide power to the electronic device, and deactivate the first internal power supply based on the rule.
    Type: Grant
    Filed: September 4, 2007
    Date of Patent: March 8, 2011
    Assignee: Juniper Networks, Inc.
    Inventors: Ankur Singla, Surendra Patel, Harshad Nakil
  • Publication number: 20110055599
    Abstract: A power supply circuit for supplying electric power to a portable computer includes a main battery, a first control circuit, a backup battery and a second control circuit. The main battery includes a first output terminal and a second output terminal shorter than the first output terminal. When the main battery is drawn out of the portable computer, a disconnection between the second output terminal and the portable computer occurs earlier than a disconnection between the first output terminal and the portable computer to from a time difference between the two disconnections. During this time difference, the main battery is controlled by the first control circuit to change from supplying electric power to the portable computer to not supplying electric power to the portable computer, and the backup battery is controlled by the second control circuit to supply electric power to the portable computer instead of the main battery.
    Type: Application
    Filed: October 26, 2009
    Publication date: March 3, 2011
    Applicants: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: XIANG-MING ZHAO
  • Patent number: 7900087
    Abstract: Techniques for identifying UPS-sub-system interconnections using manual data, UPS identification signals, and variations in UPS voltage variations that produce error signals. Once interconnections have been identified an operating system can check the UPS/sub-system topology to isolate potential errors and/or to enable controlled shut-down of sub-systems in case of potential power failure.
    Type: Grant
    Filed: February 20, 2008
    Date of Patent: March 1, 2011
    Assignee: International Business Machines Corporation
    Inventors: Patrick K. Egan, Todd J. Rosedahl
  • Patent number: 7900091
    Abstract: The invention discloses a method for recovering a basic input output system (BIOS) and a computer device thereof. The computer device of the invention includes a motherboard, a power button, a BIOS storage unit, and an embedded controller. The BIOS storage unit is disposed on the motherboard, and it stores a first boot block code and a second boot block code. When the computer device is connected with a power supply to supply standby power to the motherboard, and the power button is not pressed, the embedded controller detects whether the first boot block code is damaged. If the first boot block code is damaged, the embedded controller recovers the first boot block code via the second boot block code.
    Type: Grant
    Filed: December 5, 2008
    Date of Patent: March 1, 2011
    Assignee: Asustek Computer Inc.
    Inventors: Yen-Ting Chou, Jin-En Liao
  • Patent number: 7895466
    Abstract: An integrated circuit includes a DMA controller for performing conventional DMA transfers and for backing-up and restoring data during low power events. The integrated circuit includes one or more processor components, one or more peripheral components, a power management circuit and the DMA controller. The power management circuit manages power control within the integrated circuit. The DMA controller includes a DMA engine for executing DMA transfers between different ones of the components and memory based on configuration parameters provided to the DMA engine. A detection circuit configured determines if the power management circuit initiates a power state change. The DMA controller also has circuitry for providing a first set of configuration parameters to the DMA engine if no change in power state is detected and overriding the first set of configuration parameters with a second set of configuration parameters if a change in power state is detected.
    Type: Grant
    Filed: September 2, 2008
    Date of Patent: February 22, 2011
    Assignee: Telefonaktiebolaget L M Ericsson (PUBL)
    Inventor: David Barrow
  • Patent number: 7886173
    Abstract: A method for powering a system is described. The method includes receiving a signal that indicates availability of a primary power source to supply operating power to a plurality of computing devices, and responsive to the received signal, transitioning each of the plurality of computing devices from a secondary power source to receiving power from the primary power source after a delay time that is a function of a substantially unique seed value for each computing device.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: February 8, 2011
    Assignee: Exaflop LLC
    Inventors: Ken Krieger, Albert Borchers
  • Publication number: 20110029793
    Abstract: A signal suitable for signaling a computer system to reduce power consumption is generated from a plurality of power supplies. The signal is asserted when at least one of the power supplies of the plurality of power supplies signals impairment, and at least one of the power supplies of the plurality of power supplies signals that the power supply is supplying current above a threshold level.
    Type: Application
    Filed: July 30, 2009
    Publication date: February 3, 2011
    Inventors: Stephen Ejner Horvath, Kevin Edward Boyum, Martin Goldstein
  • Patent number: 7882392
    Abstract: An electronic device includes a power supply unit that generates plural output voltages from an input voltage and outputs the various output voltages from respective plural power supply channels, a voltage detecting unit that monitors voltages of two power supply channels among plural power supply channels which are different in decreases of the output voltage in the case that the input voltage is cut off, outputs a first detecting signal upon detecting a decrease in voltage of a first power supply channel having a fast decrease to a first threshold and outputs a second detecting signal upon detecting a decrease in voltage of a second power supply channel having a slow decrease to a second threshold, and a control unit that saves data upon receiving the first detecting signal and stops an operation of the electronic device upon receiving the second detecting signal.
    Type: Grant
    Filed: May 14, 2008
    Date of Patent: February 1, 2011
    Assignee: Murata Machinery, Ltd.
    Inventors: Manami Edamoto, Shuji Kawakatsu
  • Publication number: 20110022882
    Abstract: Mechanisms are provided for performing a failover operation of an application from a faulty node of a high availability cluster to a selected target node. The mechanisms receive a notification of an imminent failure of the faulty node. The mechanisms further receive health information from nodes of a local failover scope of a failover policy associated with the faulty node. Moreover, the mechanisms dynamically modify the failover policy based on the health information from the nodes of the local failover scope and select a node from the modified failover policy as a target node for failover of an application running on the faulty node to the target node. Additionally, the mechanisms perform failover of the application to the target node based on the selection of the node from the modified failover policy.
    Type: Application
    Filed: July 21, 2009
    Publication date: January 27, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Astrid A. Jaehde, Manjunath B. Muttur, Thomas V. Weaver
  • Patent number: 7873851
    Abstract: A method is used in powering disk drive spinup. A disk drive is powered with a primary power source and is temporarily powered with a secondary power source in addition to the primary power source. The secondary power source powers the disk drive when the disk drive is spinning up.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: January 18, 2011
    Assignee: EMC Corporation
    Inventors: Thomas E. Linnell, Phillip J. Roux
  • Patent number: 7873867
    Abstract: Provided is a computer system which includes plurality of computers including a first, second, and third computers, and a storage device coupled to the plurality of computers via a network, in which: the first computer is configured to: access data in a storage area of the storage device; cut, based on settings information and loads on the plurality of computers, at least a part of electric power supplied to the first computer; and send, before cutting the at least a part of electric power supplied to the first computer, a takeover request to the second computer; and the second computer accesses the data within the storage area after receiving the takeover request. With the configuration as described above, power consumption in NAS is reduced.
    Type: Grant
    Filed: February 11, 2008
    Date of Patent: January 18, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Hirofumi Ikawa, Takeshi Kitamura, Nobuyuki Saika
  • Publication number: 20110010582
    Abstract: A storage system has a first power supply unit, a second power supply unit for supplying electronic power to the storage system when the first power supply unit is not supplying electronic power to the storage system, a storage for storing data, a first memory for storing data, a control unit for reading out data stored in the storage and writing the data into the first memory, and reading out data stored in the first memory and writing the data into the storage, a second memory for storing cache data, a table indicating whether each of the data stored in the first memory is to be evacuated to the second memory or not, respectively, and an evacuating unit for evacuating the data stored in the first memory to the second memory in reference to the table when the second power supply unit is supplying electronic power to the storage system.
    Type: Application
    Filed: June 24, 2010
    Publication date: January 13, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Nina TSUKAMOTO, Sadayuki OHYAMA
  • Patent number: 7870338
    Abstract: An I/O processor determines whether or not the amount of dirty data on a cache memory exceeds a threshold value and, if the determination is that this threshold value has been exceeded, writes a portion of the dirty data of the cache memory to a storage device. If a power source monitoring and control unit detects a voltage abnormality of the supplied power, the power monitoring and control unit maintains supply of power using power from a battery, so that a processor receives supply of power from the battery and saves the dirty data stored on the cache memory to a non-volatile memory.
    Type: Grant
    Filed: January 2, 2008
    Date of Patent: January 11, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Junichi Iida, Xiaoming Jiang
  • Patent number: 7870401
    Abstract: A system and method for power over Ethernet (PoE) provisioning for a computing device using a network profile. Various types of power management information can be used in a process for determining a power request/priority. Power management information such as user information or device information can be stored in a profile in a network database. This network database can be accessed by a switch in determining a power request/priority for a computing device.
    Type: Grant
    Filed: August 15, 2007
    Date of Patent: January 11, 2011
    Assignee: Broadcom Corporation
    Inventors: Wael William Diab, Stephen Bailey
  • Publication number: 20100332896
    Abstract: Power-backup capabilities are provided by implementing a variety of different methods, systems and devices. According to one such implementation, a capacitive storage circuit is operated at a threshold voltage that is set to provide sufficient power to operate backup functions of a data storage device, and that is further selectively adjusted during a test period to maintain such sufficient power while also providing power to carry out test functions. In other implementations, the threshold voltage is set in response to operating characteristics of one or more of a data storage device to which backup power is to be provided and the capacitive storage circuit itself. The threshold voltage is reduced or otherwise maintained at a low level that is yet sufficient to supply appropriate power (e.g., thus maintaining the capacitive circuit at a voltage level that is about as low as possible, which can enhance operational characteristics of the capacitive circuit).
    Type: Application
    Filed: December 7, 2009
    Publication date: December 30, 2010
    Inventors: Dean Clark Wilson, Darren Edward Johnston
  • Publication number: 20100332897
    Abstract: Power-backup capabilities are provided by implementing a variety of different methods, systems and devices. According to one such implementation, a solid-state memory device is implemented with a primary power source that provides primary power. A secondary power source provides secondary power. A power controller provides the primary power to an operating power circuit. The secondary power is provided by enabling a secondary switch located between the secondary power source and the operating power circuit. A solid-state memory uses power from the operating power circuit as a primary source of power when accessing stored data and retains data in the absence of power being provided by the operating power circuit. A memory controller facilitates access to the stored data. In response to problems with the primary power source, pending writes are completed to the solid-state memory circuit. A timing circuit substantially delays full enablement of the secondary switch.
    Type: Application
    Filed: December 7, 2009
    Publication date: December 30, 2010
    Inventor: Dean Clark Wilson
  • Patent number: 7856737
    Abstract: This invention relates to an apparatus and a method that reduces a moisture content of an agricultural product, particularly by using moisture sensors and/or temperature sensors. The apparatus includes at least one moisture sensor, optionally at least one temperature sensor, a controller, a flow regulator and/or a dryer. The method includes obtaining a moisture content and a temperature to calculate a product flowrate and optionally an energy input. A product flowrate signal is used to vary the flow regulator and an energy input signal is used to vary the energy regulator.
    Type: Grant
    Filed: August 28, 2007
    Date of Patent: December 28, 2010
    Assignee: Mathews Company
    Inventors: Robert James McMahon, Jr., Kenneth William Kroeker
  • Publication number: 20100325484
    Abstract: One or more switches are interposed between a controller portion and a storage device. When transmission of a command to a certain storage device fails, a command is transmitted starting from an upstream side to a downstream side of a path between the controller portion and the switch to which the certain storage device is connected, and when command transmission fails while transmitting a command from a kth switch (k is an integer of 0 or more) which is connected to a (k+1)th switch and is one level upstream of the (k+1)th switch or from any port of the controller portion, it is determined that a failure has occurred in a power source that supplies power to the (k+1)th switch.
    Type: Application
    Filed: August 26, 2010
    Publication date: December 23, 2010
    Applicant: HITACHI, LTD.
    Inventors: Hiroshi SUZUKI, Tsutomu KOGA, Tetsuya INOUE, Tomokazu YOKOYAMA, Kenji JIN
  • Publication number: 20100299558
    Abstract: An apparatus includes a cache memory for storing user data and control information of the apparatus, a nonvolatile memory and a processor for executing a process including when the power failure occurs, saving the user data and the control information stored in the cache memory into the nonvolatile memory, when the power failure recovers, restoring the data stored in the nonvolatile memory into the cache memory, and erasing the data stored in the nonvolatile memory after restoring the data into the cache memory and when another power failure occurs during erasing the data stored in the nonvolatile memory, erasing the control information stored in the nonvolatile memory if the control information is remained in the nonvolatile memory and saving, into the nonvolatile memory, the updated control information stored in the cache memory and the user data which has been erased from the nonvolatile memory.
    Type: Application
    Filed: May 12, 2010
    Publication date: November 25, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Mihoko TOJO, Hidefumi Kobayashi, Yusuke Oota, Satoshi Hayashi, Keiichi Umezawa
  • Patent number: 7840840
    Abstract: A DC backup power supply system having a plurality of loads to which AC from a commercial power source is supplied, and DC power storage means for supplying DC power to the plurality of the loads at the time of a power outage of the commercial power source, said DC backup power supply system including: a control circuit having a first DC backup output for supplying a power from the DC power storage means to the plurality of the loads, including a specific load, only during the power outage of the commercial power source, and a second DC backup output for continuously supplying a power from the DC power storage means to the specific load regardless of the power outage of the commercial power source or sound operation thereof, the control circuit supplying the respective powers from the same DC power storage means to the first and second DC backup outputs.
    Type: Grant
    Filed: July 28, 2008
    Date of Patent: November 23, 2010
    Assignee: Hitachi Computer Peripherals Co., Ltd.
    Inventors: Fumikazu Takahashi, Minehiro Nemoto, Isao Nemoto, legal representative, Akihiko Kanouda, Masahiro Hamaogi, Yoshihide Takahashi
  • Patent number: 7840837
    Abstract: A system and method for protecting memory during system initialization is provided. A complex programmable logic device (CPLD) is operatively interconnected with a multiplexer to enable control of a memory to be switched between a memory controller and the CPLD in response to error conditions. If an error condition is identified, the CPLD assumes control of the memory and activates a battery subsystem to provide memory refreshes until system re-initialization. Upon system bring-up, interactions between the BIOS and CPLD assure that protected memory is fully recovered by the system. The contents of memory will remain protected from any further faults that may occur during the bring-up sequence.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: November 23, 2010
    Assignee: NetApp, Inc.
    Inventors: George Totolos, Jr., Roger Blood
  • Patent number: 7836336
    Abstract: A method and apparatus for redundant power and data over a wired data telecommunications network permits power to be received at a local powered device (PD) from remote power sourcing equipment (PSE) via at least one conductor at a first time and power and/or data to be obtained by the local device from another port of the remote device or another remote device at a second different time. Power levels obtained may be adjusted from time to time in response to circumstances.
    Type: Grant
    Filed: October 16, 2009
    Date of Patent: November 16, 2010
    Assignee: Cisco Technology, Inc.
    Inventors: Daniel Biederman, Kenneth Coley, Frederick R. Schindler
  • Patent number: 7831860
    Abstract: A system for testing redundancy and hot-swapping capability of a redundant power supply includes a power switch fixture, a system under test (SUT), and a computing device. The power switch fixture includes a processor, an alternating current (AC) source, a first relay, a second, and two AC outputs. The processor is configured for controlling the AC source to output voltage to the two AC outputs by switching one of the first and the second relay on and the first and the second relay off, so as to ensure that one of the first power supply and the second power supply is operable to provide power to the SUT. The SUT includes a redundant power supply that includes a first power supply and a second power supply. The computing device includes a test control unit for testing redundancy and hot-swapping capability of the redundant power supply.
    Type: Grant
    Filed: July 7, 2008
    Date of Patent: November 9, 2010
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Chung-Jen Hsieh, Chao-Tsung Fan, Chien-Min Fang
  • Patent number: 7823026
    Abstract: Redundancy of data and/or Inline Power in a wired data telecommunications network from a pair of power sourcing equipment (PSE) devices via an automatic selection device is provided by providing redundant signaling to/from each of the pair of PSE devices, and coupling a port of one PSE device and a redundant port of the second PSE device to respective first and second interfaces of a port of the selection device. The selection device initially selects one of the two PSE devices and communicates data and/or Inline Power to a third interface of the selection device. A powered device (PD) coupled to that third interface communicates data and/or Inline Power with the selected one of the first and second PSE device through the selection device. Upon detection of a condition, such as a failure condition, the selection device may select the other of the two interfaces.
    Type: Grant
    Filed: October 7, 2004
    Date of Patent: October 26, 2010
    Assignee: Cisco Technology, Inc.
    Inventors: Roger A. Karam, Luca Cafiero
  • Patent number: 7818443
    Abstract: The present invention is a computer system adapted to play audio files. The computer system includes a central processing unit, a storage unit, a first operating system, an interfacing unit, and a second operating system. The first operating system can control at least the CPU. The interface unit can interface with an external digital media device that may store a plurality of compressed audio files. The second operating system is capable of controlling the computer system operating in an audio playback mode. The power of the computer system is turned on and the computer system plays the plurality of compressed audio files in the audio playback mode when the external digital media device is in communication with the interface unit.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: October 19, 2010
    Assignee: O2Micro International Ltd.
    Inventors: Sterling Du, James Lam, Eva Sheng
  • Patent number: 7809983
    Abstract: One or more switches are interposed between a controller portion and a storage device. When transmission of a command to a certain storage device fails, a command is transmitted starting from an upstream side to a downstream side of a path between the controller portion and the switch to which the certain storage device is connected, and when command transmission fails while transmitting a command from a kth switch (k is an integer of 0 or more) which is connected to a (k+1)th switch and is one level upstream of the (k+1)th switch or from any port of the controller portion, it is determined that a failure has occurred in a power source that supplies power to the (k+1)th switch.
    Type: Grant
    Filed: February 4, 2008
    Date of Patent: October 5, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Suzuki, Tsutomu Koga, Tetsuya Inoue, Tomokazu Yokoyama, Kenji Jin
  • Patent number: 7802138
    Abstract: The present invention provides a control method for an information processing system, which includes a plurality of processing apparatuses performing a mutually equivalent operation, comprising the step of isolating the processing apparatus for which a fluctuation of power source voltage is relatively large, from the information processing system, if an error is not detected in each of the processing apparatuses and respective items of output information from the plurality of processing apparatuses raise a nonidentity.
    Type: Grant
    Filed: September 28, 2005
    Date of Patent: September 21, 2010
    Assignee: Fujitsu Limited
    Inventor: Keiji Sato
  • Patent number: 7788531
    Abstract: This descriptive document is about a new backup device that takes advantage of the components of a PC's conventional power supply and it combines them with additional typical electronic components from an uninterruptible power supply (UPS). The result of such combination is a lower cost backup function that is applied directly to the PC and, therefore, eliminates the requirement of external devices—such as a UPS—to perform this backup function. In this document, the electronic components that combine with the PC's power supply in order to provide the backup functionality described above are referred to as integrated backup unit (URI).
    Type: Grant
    Filed: November 13, 2007
    Date of Patent: August 31, 2010
    Assignee: Cove Distribution, Inc.
    Inventor: Mary Louise Adams
  • Patent number: 7783924
    Abstract: Certain embodiments of the present invention provide for a system for communication between a controller and a power supply using a communication interface. In an embodiment, a communication system includes a power supply having one or more diagnostics. The communication system also includes a controller, configured for controlling the power supply and monitoring the one or more diagnostics of the power supply. In addition, the communication system includes a communication interface, configured to receive from the controller and send from the power supply one or more signals. The communication system also includes a load, configured to operate using the power provided by said power supply.
    Type: Grant
    Filed: August 26, 2005
    Date of Patent: August 24, 2010
    Assignee: General Electric Company
    Inventors: Sabih Qamar-Uz Zaman, Olgun Kukrer, Manfred David Boehm
  • Patent number: 7774671
    Abstract: According to embodiments of the present invention, an integrated circuit such as a processor includes a counter to count an actual number of unreliable storage locations in the processor cache, at least one register to store an acceptable number of unreliable storage locations for the cache, a detector to measure a thermal environment of the processor, and circuitry to raise an operating voltage of the processor if the actual number of unreliable storage locations exceeds the acceptable number of unreliable storage locations, and if the thermal environment is acceptable.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: August 10, 2010
    Assignee: Intel Corporation
    Inventor: Morgan J. Dempsey
  • Publication number: 20100192010
    Abstract: An electronic device includes a power supply circuit, a load circuit, a main device, a memory, and a holding circuit. The power supply circuit has a controlled output terminal that selectively supplies a second power supply voltage according to a power supply output control signal. The controlled output terminal supplies the second power supply voltage in response to the power supply output control signal being at a first level. The main device has a built-in power supply controlling microprocessor. The memory stores a program that is processed by the power supply controlling microprocessor. The holding circuit temporarily holds the power supply output control signal at the first level when the commercial power supply is connected to the power supply circuit such that the power supply circuit supplies the second power supply voltage from the controlled output terminal until the power supply controlling microprocessor loads the program from the memory and starts up.
    Type: Application
    Filed: January 27, 2010
    Publication date: July 29, 2010
    Applicant: Funai Electric Co., Ltd.
    Inventor: Akitsugu IKUWA
  • Publication number: 20100146333
    Abstract: A user device is provided. The device includes a main power supply, and an auxiliary power supply. The main power supply provides a main power. The auxiliary power supply cuts off the main power according to a power level of the main power supply and provides an auxiliary power upon Sudden Power-Off (SPO).
    Type: Application
    Filed: December 8, 2009
    Publication date: June 10, 2010
    Inventors: Hwan-jin Yong, Donghyun Song, Janghwan Kim, Young-Goo Ko, Hyuck-Sun Kwon, Taek-Sung Kim, Kwangho Kim, Byungjin Ahn, Dongjin Lee, Byungse So, Jonggyu Park, Kyoungsub Oh, Kwanjong Park, Jongsoo Seo, Taehwa Yoo, Mih-ho Kim
  • Patent number: 7734953
    Abstract: Methods, systems, apparatus, and computer-readable media for providing a redundant power solution for an expansion card installed within a host computer. The expansion card has a hardware device and a power control mechanism. The power control mechanism provides power to the hardware device from a conditional power source when available, and from computer system standby power when the conditional power source is unavailable. The power control mechanism may comprise a power sensing mechanism to determine when conditional power source output decreases below a threshold level and a switching mechanism to switch from the conditional power source to computer system standby power when this happens. The hardware device may enter a low power mode upon receiving computer system standby power.
    Type: Grant
    Filed: June 12, 2006
    Date of Patent: June 8, 2010
    Assignee: American Megatrends, Inc.
    Inventors: Clas Gerhard Sivertsen, Umasankar Mondal
  • Patent number: 7734955
    Abstract: A method and system for improving Field Replacement Unit (FRU) isolation in memory sub-systems by monitoring Voltage Regulator Module (VRM) induced memory errors. A comparator compares the output voltage coming from the VRM to memory. If the comparator detects a VRM output voltage transient that is outside a rated threshold, then a counter is increased by one. If the counter exceeds a count threshold, a VRM error is posted. If a memory failure occurs within a predetermined period of time, then the VRM error pinpoints the VRM output voltage transient as being the likely cause of the memory failure.
    Type: Grant
    Filed: October 7, 2008
    Date of Patent: June 8, 2010
    Assignee: International Business Machines Corporation
    Inventors: Charles R. Dart, Edmund Sutherland Gamble, Gary Anthony Jansma, Terence Rodrigues, Robert Joseph Ruckriegel, Bruce James Wilkie
  • Patent number: 7725750
    Abstract: A method of transitioning between an active mode and a power-down mode in a processor-based system includes saving a state of the active mode, detecting the occurrence of one or more interrupt events during a transition between the active mode and the power-down mode, and responding to the detected interrupt events.
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: May 25, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Mathur Ashish, Vikas Ahuja, Batmanabhan Purushothaman, Anupam Singal, Meenakshi Vasisht
  • Patent number: 7725769
    Abstract: A microcontroller receives a supply voltage (VCC) from one or more batteries. Rather than automatically resetting the microcontroller if VCC drops below a VBO voltage, a latent VBO reset circuit does not reset the processor if VCC drops below a second voltage (VBO) as long as VCC does not fall so low that a power on reset (POR) circuit of the latent VBO reset circuit is tripped. The processor continues to operate as long as it can below VBO, thereby maximizing battery usage. When VCC rises to a third voltage (for example, due to battery replacement), then the latent VBO reset circuit automatically resets the processor to remove potential ill-effects of having operated below VBO. User data stored in volatile memory is not lost during battery replacement. A special VBO bit in a processor-readable status register indicates that the microcontroller operated below VBO.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: May 25, 2010
    Assignee: ZiLOG, Inc.
    Inventor: David R. Staab
  • Patent number: 7724650
    Abstract: Wired data telecommunications networks can make advantageous use of a communications capability between and among more than two network devices. Such capabilities may be utilized in providing redundancy of data and/or inline power capabilities from a pair of network devices to a third network device receiving the redundant capability. Impedance modulated communications are provided in a wired data telecommunications network among at least a first, second and third network device coupled together via a Y device. The Y device couples the three network devices (higher order Y devices could couple more than three devices) allowing monitoring of communications and inline power provision so that one of the network devices may act in response to monitored conditions by communicating via impedance modulated communications with one or both of the other network devices.
    Type: Grant
    Filed: June 15, 2005
    Date of Patent: May 25, 2010
    Assignee: Cisco Technology, Inc.
    Inventor: Roger A. Karam