Of Power Supply Patents (Class 714/14)
  • Patent number: 8479038
    Abstract: A method and apparatus for achieving high availability for applications and optimizing power consumption within a datacenter is provided. In one embodiment, a method for providing high availability and optimizing power consumption within a datacenter comprises upon execution of an application at a target node amongst a plurality of nodes in a datacenter, selecting a failover target node amongst the plurality of nodes for the application, and reserving a failover capacity of at least one resource of the selected failover target node.
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: July 2, 2013
    Assignee: Symantec Corporation
    Inventor: Roshni Jaywantsingh Patil
  • Patent number: 8479043
    Abstract: A power over Ethernet (PoE) powered device with power fallback states. A powered device can be powered using a primary local power source and a secondary PoE power source. To enable consistent behavior by the powered device, a controlled power fallback state can be defined that would ensure limited functionality in the powered device upon a failure of the primary local power source. For example, the limited functionality could include a communication channel to the switch, diagnostic circuitry, etc.
    Type: Grant
    Filed: February 22, 2008
    Date of Patent: July 2, 2013
    Assignee: Broadcom Corporation
    Inventor: Wael William Diab
  • Publication number: 20130166947
    Abstract: The present disclosure discloses a power system with hot-swap with a buck converter. The power system comprises a front stage, a hot-swap stage and a load stage; wherein the hot-swap stage comprises: a buck converter having a switch operate at ON/OFF state to provide a desired output voltage to the load stage with low power loss and optimized thermal design.
    Type: Application
    Filed: December 22, 2011
    Publication date: June 27, 2013
    Inventors: Eric Yang, ZhengXing Li, Yuancheng Ren
  • Patent number: 8473784
    Abstract: A storage apparatus includes a backup processing unit that stores data stored in a first memory into a second memory as backup data upon occurrence of a power failure, a restore processing unit that upon recovery from the power failure restores the backup data backed up in the second memory to the first memory and erases the backup data, and an erasure processing termination unit that terminates the erasure processing upon a power failure occurring during erasure processing for erasing the backup data stored in the second memory, and a re-backup processing unit that re-backs up data in the first memory corresponding to the backup data erased from the second memory before the erasure processing is terminated by the erasure processing termination unit to a location in the second memory subsequent to a last location that contains the backup data which has not been erased.
    Type: Grant
    Filed: May 19, 2010
    Date of Patent: June 25, 2013
    Assignee: Fujitsu Limited
    Inventors: Yuji Hanaoka, Terumasa Haneda, Atsushi Uchida, Yoko Kawano, Emi Narita
  • Publication number: 20130151892
    Abstract: A data storing method for a solid state drive is used to preserve data integrity after a power failure. The solid state drive has a flash memory with plural blocks. Each block includes plural pages. One of the plural blocks is set as an old open block. The data storing method includes the following steps. Firstly, the solid state drive is powered on again. Then, the valid data in the old open block are stored into a new open block.
    Type: Application
    Filed: September 11, 2012
    Publication date: June 13, 2013
    Applicant: LITE-ON IT CORPORATION
    Inventors: Chih-Wei Huang, Gang-Ming Fan
  • Patent number: 8464132
    Abstract: A method for accessing a flash memory includes: writing a data stream into at least a page of at least one data block of the flash memory, where each page of the data block includes an identity code; reading at least one identity code of the page; and determining a specific page according to at least the identity code, where the specific page is a last page that the data stream is written to before the flash memory is disconnected from a power source.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: June 11, 2013
    Assignee: Silicon Motion Inc.
    Inventors: Po-Syuan Chen, Chi-Hsiang Hung
  • Publication number: 20130139000
    Abstract: Provided is a storage apparatus for providing a logical storage area as a data storage area to an external apparatus, comprising: a physical storage medium for creating the logical storage area; first and second storage control modules each of which is communicatively coupled to the physical storage medium to control data input/output processing between the external apparatus and the logical storage area; and first and second power supply modules each of which supplies power to the physical storage medium and the first and second storage control modules and includes a blower for generating a cooling airflow to cool down the physical storage medium and the first and second storage control modules, wherein the blower of the first power supply module generates a first cooling airflow which flows through the physical storage medium, the first storage control module, and the first power supply module, the blower of the second power supply module generates a second cooling airflow which flows through the physical s
    Type: Application
    Filed: November 24, 2011
    Publication date: May 30, 2013
    Applicant: HITACHI LTD.
    Inventors: Toshikatsu Nakamura, Mitsuhide Sato, Nobuhiro Yokoyama
  • Patent number: 8453012
    Abstract: A system and method for communicating information relating to powered device (PD) power interruption and associated power sourcing equipment (PSE) fallback power. A PD can be powered using a primary local power source and a secondary power over Ethernet (PoE) power source. The PD communication can provide information that relates to PSE power delivery to the PD that is contingent upon detection of a failure occurring at the powered device.
    Type: Grant
    Filed: February 25, 2008
    Date of Patent: May 28, 2013
    Assignee: Broadcom Corporation
    Inventor: Wael William Diab
  • Patent number: 8448023
    Abstract: A system for providing data integrity in an embedded device environment. One approach is operating an embedded control engine with non-battery backup power and providing data backup with inexpensive memory. Just data having changes may be provided to a volatile memory such as an SRAM module. After an accumulation of a certain amount of data, the data may be moved onto a relatively larger non-volatile memory, such as an NVRAM module or other type of flash memory. Non-battery backup power may maintain the SRAM module for a period after a power loss, so as to retain data. After restoration of power, data from NVRAM and SRAM modules may be read by the backup service to recreate the last known state of the control engine before the power loss.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: May 21, 2013
    Assignee: Honeywell International Inc.
    Inventors: Owen Michael James, Daniel Giorgis, John Sublett
  • Patent number: 8441661
    Abstract: An image processing apparatus includes a platform and plugins installed in the platform to cause devices to perform functions, wherein the platform includes a power control unit to control supply of power to the devices and a first power control interface to transmit to the plugins an advanced notice of shutdown, wherein each of the plugins includes a second power control interface to receive the advanced notice of shutdown and a power processing control unit to make a preparation for shutdown in response to the advanced notice of shutdown received through the second power control interface, and to send information about the preparation to the power control unit through the second power control interface, wherein the power control unit controls supply of power to at least one of the devices based on the information about the preparation received from at least one of the plugins.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: May 14, 2013
    Assignee: Ricoh Company, Ltd.
    Inventors: Rie Nakamura, Yoshifumi Kawai, Masateru Kumagai, Shinsuke Yanazume
  • Patent number: 8438348
    Abstract: In control of the disk array device (backup system), when a blackout occurs, the disk array device is first operated in a first method to backed up a main memory by using a power supply from a battery. During the first method, a blackout continuous time and the like are integrated, and at a timing in which the integrated value satisfies a condition, the first method is then shifted to the second method to evacuate data from the main memory onto a nonvolatile memory based on a power supply.
    Type: Grant
    Filed: June 4, 2008
    Date of Patent: May 7, 2013
    Assignee: Hitachi, Ltd.
    Inventor: Fumiaki Hosaka
  • Patent number: 8433941
    Abstract: A system and method for information preservation on a portable electronic device is disclosed. A signal indicating an energy capacity threshold remaining in the battery of a hand held device may be generated. Then, responsive to such a signal, information may be copied from a volatile memory into a non-volatile memory. The non-volatile memory may be configured to provide instructions for direct execution by a processor, or the non-volatile storage may be attached via an expansion interface. The non-volatile memory may be a removable card. The copy function is typically done in low power modes. Alternatively, the information is only copied provided sufficient battery capacity remains to perform the copy function.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: April 30, 2013
    Assignee: Hewlett-Packard Deveolpment Company, L.P.
    Inventor: Yoon Kean Wong
  • Publication number: 20130103979
    Abstract: A circuit for displaying failure information of a power supply unit supplying power to a central processing unit includes a controller including a random access memory (RAM) to store failure information of the power supply unit, a DC power circuit, a processing unit connected to the controller for reading the fault reasons stored in the RAM, and a display unit to display the fault reasons. When the power supply unit does not operate, the DC power circuit supplies power to the controller, such that fault reasons stored in the RAM will not be lost.
    Type: Application
    Filed: June 25, 2012
    Publication date: April 25, 2013
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.
    Inventors: LAN-YI FENG, YING-BIN FU
  • Publication number: 20130103980
    Abstract: A semiconductor integrated circuit provided with a processing unit that repeats a processing state and a standby state, comprises an obtaining unit configured to obtain a period of the standby state as a standby period; and a control unit configured to hold a plurality of candidate voltages in association with pieces of recovery information corresponding to recovery times required for the processing unit to return to a normal operation voltage from the candidate voltages in the standby state, and to control a standby voltage of the processing unit in the standby state in accordance with the candidate voltage associated with the piece of recovery information corresponding to a recovery time that is shorter than the standby period among the plurality of candidate voltages.
    Type: Application
    Filed: September 12, 2012
    Publication date: April 25, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Mitsuru Sasaki
  • Patent number: 8423824
    Abstract: Embodiments include a system, an apparatus, a device, and a method. An apparatus includes a synchronous circuit including a first subcircuit powered by a first power plane having a first power plane voltage and a second subcircuit powered by a second power plane having a second power plane voltage. The apparatus also includes an error detector operable to detect an incidence of a computational error occurring in the first subcircuit. The apparatus includes a controller operable to change the first power plane voltage based upon the detected incidence of a computational error. The apparatus also includes a power supply configured to electrically couple with a portable power source and operable to provide a selected one of at least two voltages to the first power plane in response to the controller.
    Type: Grant
    Filed: January 14, 2010
    Date of Patent: April 16, 2013
    Assignee: The Invention Science Fund I, LLC
    Inventor: William Henry Mangione-Smith
  • Patent number: 8407490
    Abstract: There is provided a power supply device including: a main power switch; an auxiliary power switch; a power supplying switch; a relay having a relay contact and an excitation coil that, in an excited state, closes the relay contact, and, when the excited state is cancelled, opens the relay contact; a control section effecting control such that, when the main power switch is in an on position and the auxiliary power switch is in an on/off position, the power supplying switch is turned on/off; and a driving section that drives the relay such that, when the main power switch is in an on position and the auxiliary power switch is in an on position, the excitation coil is excited and maintain the excited state, and, when the auxiliary power switch is in an off position, cancels the excited state of the excitation coil.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: March 26, 2013
    Assignee: Fuji Xerox Co., Ltd.
    Inventor: Mitsunobu Mamiya
  • Patent number: 8397012
    Abstract: A data storage subsystem includes a volatile memory in which stored data can be denoted as being data that should be preserved in the event of an interruption in the power supply to the volatile memory. The available capacity for such data storage is dynamically allocated between multiple firmware client components of the storage subsystem, such that each client component has its own (varying) allocation of the available capacity. A higher priority for the storage of such data is given to client components on which other client components depend, such as lower layers of the software stack, thereby allowing them to get a larger share of the available capacity for such data storage when needed and complete their input/output requests faster.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: March 12, 2013
    Assignee: International Business Machines Corporation
    Inventors: Colin Robert Jewell, Robert Bruce Nicholson, Francis Michael Huw
  • Patent number: 8392695
    Abstract: Microprocessor-based devices may experience crashes due to failures in software, hardware, or a combination thereof. Details about a crash may provide valuable information for determining cause of the crash. Devices may save crash information in volatile memory, place the volatile memory into a self-refresh mode, power cycle the remainder of the device, reboot, and retrieve the crash information. Other information to be persisted across a power cycle may also be saved to volatile memory in this fashion as well.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: March 5, 2013
    Inventors: Manish Lachwani, David Berbessou
  • Patent number: 8392756
    Abstract: A storage apparatus has a physical storage area used by an external apparatus, a drive interface unit, a power supply unit, and a storage controller executing data write processing from the external apparatus to the storage drive and data read processing from the storage drive through the drive interface unit, and a drive control interface unit. The power supply unit inputs power supply information to the drive interface unit. Any one of the processing units acquires the power supply information of the power supply unit through a data network path to the drive interface unit for the data write processing and the data read processing, and determines whether or not a failure occurs in the power supply unit supplying the operation power to the storage drive and the drive interface unit, on the basis of the acquired power supply information.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: March 5, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Yosuke Nakayama, Tetsuya Inoue, Masato Ogawa, Takakatu Mizumura
  • Patent number: 8386846
    Abstract: A network switch apparatus includes a housing, a first network port, a second network port, a first instrument port, an active component inside the housing, wherein the active component is configured to receive packets from the first network port, and pass at least some of the packets from the first network port to the first instrument port, a connector for supplying power from a power supply to the active component, and a backup power supply for supplying power to the active component when the active component does not receive power from the power supply.
    Type: Grant
    Filed: May 6, 2010
    Date of Patent: February 26, 2013
    Assignee: Gigamon LLC
    Inventor: Thomas Kwok Yin Cheung
  • Patent number: 8386809
    Abstract: A system and method for directing a user to configure a power device via an alphanumeric user interface is provided. The power device may include data storage storing a plurality of operational parameters. The method includes acts of prompting, during an initial power-up of the power device, a user to enter an indication of quality of power supplied to the power device, receiving the indication via the user interface, determining a first value for each of the plurality of operational parameters of the power device based at least in part on the indication and applying each first value of the plurality of operational parameters to the power device.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: February 26, 2013
    Assignee: Schneider Electric IT Corporation
    Inventors: James S. Spitaels, Kyle Brookshire, Vishwas Mohaniraj Deokar, Fred W. Rodenhiser, Himanshu Trivedi
  • Publication number: 20130047030
    Abstract: The supply of power to a storage apparatus can be made redundant by means of power inputs from two types of power supply, namely an AC power supply and a DC power supply. The storage apparatus comprises a power supply unit for supplying power to a plurality of storage devices, and a power supply controller for controlling a method of supplying power from the power supply unit, wherein the power supply unit makes redundant the power supplied from a first power supply device which supplies AC power and/or from a second power supply device which supplies DC power, and supplies this power to the plurality of storage devices, and wherein, in response to an operator configuration input, the power supply controller supplies power from the first power supply device to one storage device among the plurality of storage devices and supplies power from the second power supply device to another storage device.
    Type: Application
    Filed: August 18, 2011
    Publication date: February 21, 2013
    Inventors: Tomonori Soeda, Hiroshi Suzuki, Fumiaki Hosaka, Toshimitsu Shishido
  • Patent number: 8381007
    Abstract: A data storage system with power backup mechanism includes a storage server, N pieces of power supply modules, a plurality of programmable logic devices and a control module. The storage server consumes M units of power in operation, and supports a storage bridge bay standard. The power supply modules respectively generate power for the storage server and a set of power-related signals, wherein the maximum power output of each of the power supply modules is equal to M/N?1 units. The programmable logic devices convert the power-related signals from the power supply modules to two sets of power condition signals. The control module monitors a power condition according to the power condition signals, thereby determining a power health condition of the storage server.
    Type: Grant
    Filed: July 30, 2010
    Date of Patent: February 19, 2013
    Assignee: Inventec Corporation
    Inventors: Sio-Pang Chan, Tsung-Hsi Lee
  • Publication number: 20130042141
    Abstract: A data processing device is provided, which includes: a main battery that supplies main power to the data processing device; a backup battery that supplies backup power to the data processing device when the main battery does not supply the main power to the data processing device; a receiving module that receives a standby command or a recovery command; a standby module that enables the data processing device to operate in a standby mode when the receiving module receives the standby command, allowing replacement of the main battery; a recovery module that determines, when the data processing device is operating in the standby mode, whether the main power is enough to enable the data processing device to operate normally, and enables the data processing device to operate in an operation mode when the main power is determined to be enough to enable the data processing device to operate normally.
    Type: Application
    Filed: October 30, 2011
    Publication date: February 14, 2013
    Applicants: ASKEY COMPUTER CORPORATION, ASKEY TECHNOLOGY (JIANGSU) LTD.
    Inventors: Yu-Geng Lin, Ching-Feng Hsieh
  • Patent number: 8370683
    Abstract: Systems and methods are provided for reducing write splice failures. In one embodiment, a system for writing data to a media includes a write buffer for storing a data sector and a backup power device for providing power to the write buffer in the event of a power failure to hold the data sector in the write buffer. The next time the system is powered up after the power failure, the system reads the data sector from the write buffer and uses the read data sector to correct a write splice on the media that may have occurred due to the power failure.
    Type: Grant
    Filed: July 31, 2009
    Date of Patent: February 5, 2013
    Assignee: Western Digital Technologies, Inc.
    Inventors: Robert P. Ryan, Robert M. Fallone
  • Patent number: 8370652
    Abstract: In a data center which includes a plurality of servers, a discovery computer, a power measurement system (PMS), and a plurality of power-circuits which supply power to the servers, the discovery computer performs the following actions for each server. It transmits a first command to the server causing the server to start generating a power consumption signature if the server is able to do so. Upon receiving a SUCCESS response from the server, it instructs the PMS to start measuring the power consumption from each power-circuit. After a prescribed interval of time has elapsed, it collects the measurements from the PMS and analyzes the measurements to look for the presence of the signature. Upon detecting the signature in the measurement taken from a particular power-circuit, the discovery computer concludes that the server is connected to the particular power-circuit and creates a mapping there-between.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: February 5, 2013
    Assignee: Microsoft Corporation
    Inventors: Jie Liu, Garret Cole, Jeff O'Reilly
  • Publication number: 20130007515
    Abstract: A data center may use generators for backup power, where the backup generators are able to serve less than the maximal power load of the data center. The use of generators that can serve less than the maximal power load may be recognized by, and addressed by, the power policy for the data center. When utility power is lost, the power policy manager may detect that the data center is switching to generator power, and may have knowledge of the capacity of those generators. If the capacity is less than the maximal power load of the data center, the power policy manager may shed load by throttling equipment in the data center to lower power levels. The policy may specify which pieces of equipment are to be throttled. When utility power is restored, the throttling of the equipment may be removed by the power policy manager.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 3, 2013
    Applicant: MICROSOFT CORPORATION
    Inventors: Mark E. Shaw, Badriddine Khessib, Bryan Kelly
  • Patent number: 8347139
    Abstract: A power supply control device including: a control unit which controls power supplied from a first device to a disk array unit accessible from host devices through a network device; and a second device which supplies power to the disk array unit and the power supply control device when the power supply from the first device is disconnected, the control unit including: a collecting unit which collects power supply fault information regarding at least one of the host devices and the network device; a starting unit which starts power supply from the second device when power supplied from the first device is disconnected; and a transmitting unit which transmits a notification to the disk array unit in response to collection of power supply fault information after starting the power supply from the second device, the notification indicating that the power supplied from the first device is disconnected.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: January 1, 2013
    Assignee: NEC Corporation
    Inventor: Ryo Suzuki
  • Publication number: 20120324278
    Abstract: A method and apparatus that allow a user to easily operate a self-service device despite the presence of damage is provided. Anticipated damage includes extreme environmental conditions such as earthquakes, flooding, strong winds, tsunamis, etc. These conditions may cause a failure in a portion of the self-service device. Improved ruggedness and redundant components are coordinated by suitable software to provide service despite damage to the self-service device. Additionally, access to some user accounts despite the loss of connectivity to a server maintaining user accounts is provided.
    Type: Application
    Filed: June 16, 2011
    Publication date: December 20, 2012
    Applicant: Bank of America
    Inventor: Nathan Dent
  • Patent number: 8335940
    Abstract: A microcomputer system according to the present invention includes multiple backup power supplies that are used instead of the main power supply in response to a voltage drop of a main power supply. The microcomputer system further includes a backup power supply monitoring circuit that monitors charge amount of the multiple backup power supplies and determines whether the charge amount is lower than a predetermined charge amount, a backup power supply charging circuit that charges the backup power supply from the main power supply, where the backup power supply is determined by the backup power supply monitoring unit that the charge amount thereof is lower than the predetermined charge amount, and a power supply switching unit that switches to the backup power supply selected according to a predetermined rule if a voltage of the main power supply is reduced.
    Type: Grant
    Filed: May 12, 2010
    Date of Patent: December 18, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Tomoaki Umezu
  • Patent number: 8327162
    Abstract: Even if a network setting changes due to power interruption or the like, communication for controlling the operating status of load devices of an uninterruptible power supply is enabled to continue. A network communication system (1) for the uninterruptible power supply comprises UPS member controllers (12 and 13) and a UPS group controller (11) which are connected in a network (2) to control the operating status of the load devices (3) of the uninterruptible power supply (1). The UPS group controller (11) and the UPS member controllers (12 and 13) execute data communication according to a predetermined communication protocol (Internet Protocol or the like) through the network (2), and these controllers transmit/receive data in which specific identification information issued for each of the UPS member controllers (12 and 13) is added to control data as communication data in the data communication according to the predetermined communication protocol.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: December 4, 2012
    Assignee: TDK-Lambda Corporation
    Inventors: Fujitaka Togashi, Masato Suzuki, Masataka Ookawa
  • Patent number: 8327069
    Abstract: A storage system is provided with a plurality of physical storage devices and a storage control apparatus that is coupled to the plurality of physical storage devices. The storage control apparatus is provided with a first cache memory group provided with a first volatile memory and a first nonvolatile memory and a second cache memory group provided with a second volatile memory and a second nonvolatile memory. The storage control apparatus executes a double write for writing the write target data from the host device to both of the first volatile memory and the second volatile memory, and notifies the host device of the write completion in the case in which the double write is completed. The storage control apparatus backs up data from the first volatile memory to the first nonvolatile memory while an electrical power is supplied from the primary power source.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: December 4, 2012
    Assignee: Hitachi, Ltd.
    Inventor: Naoki Moritoki
  • Patent number: 8321698
    Abstract: A redundant power supply may obtain a rule for increasing mean time between failures (MTBF) for a first internal power supply and a second internal power supply connected to an electronic device, apply the rule to the first and second power supplies, activate the second internal power supply based on the rule to permit the second internal power supply to provide power to the electronic device, and deactivate the first internal power supply based on the rule.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: November 27, 2012
    Assignee: Juniper Networks, Inc.
    Inventors: Ankur Singla, Surendra Patel, Harshad Nakil
  • Publication number: 20120290874
    Abstract: A method of managing the workload in a computer system having one or more semi-redundant hardware components is provided. The method comprises detecting loss or degradation of the level of performance of one or more of the semi-redundant hardware components, identifying hardware components affected by the loss or degradation, migrating a critical job from an affected hardware component to an unaffected hardware component, and performing less-critical jobs on an affected hardware component. Loss or degradation of the semi-redundant component reduces the capacity of affected hardware components in the computer system without entirely disabling the computer system. Jobs identified as critical run on hardware components having the most capacity and reliability, while less-critical jobs use the remaining capacity of affected hardware components. Examples of semi-redundant hardware components include a memory module, CPU core, Ethernet port, power supply, fan, disk drive, and an input output port.
    Type: Application
    Filed: July 3, 2012
    Publication date: November 15, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Fred A. Bower, III, Scott A. Piper, Gregory B. Pruett
  • Patent number: 8312325
    Abstract: One or more switches are interposed between a controller portion and a storage device. When transmission of a command to a certain storage device fails, a command is transmitted starting from an upstream side to a downstream side of a path between the controller portion and the switch to which the certain storage device is connected, and when command transmission fails while transmitting a command from a kth switch (k is an integer of 0 or more) which is connected to a (k+1)th switch and is one level upstream of the (k+1)th switch or from any port of the controller portion, it is determined that a failure has occurred in a power source that supplies power to the (k+1)th switch.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: November 13, 2012
    Assignee: Hitachi Ltd.
    Inventors: Hiroshi Suzuki, Tsutomu Koga, Tetsuya Inoue, Tomokazu Yokoyama, Kenji Jin
  • Publication number: 20120284561
    Abstract: Power-backup capabilities are provided by implementing a variety of different methods, systems and devices. According to one such implementation, a solid-state memory device is implemented with a primary power source that provides primary power. A secondary power source provides secondary power. A power controller provides the primary power to an operating power circuit. The secondary power is provided by enabling a secondary switch located between the secondary power source and the operating power circuit. A solid-state memory uses power from the operating power circuit as a primary source of power when accessing stored data and retains data in the absence of power being provided by the operating power circuit. A memory controller facilitates access to the stored data. In response to problems with the primary power source, pending writes are completed to the solid-state memory circuit. A timing circuit substantially delays full enablement of the secondary switch.
    Type: Application
    Filed: July 18, 2012
    Publication date: November 8, 2012
    Inventor: Dean Clark Wilson
  • Patent number: 8306670
    Abstract: A system for protecting, controlling, and monitoring substation devices of a power system, includes a spare protection and control unit that, when there is a failure in a protection and control unit from among protection and control units that perform a protection and control operation for the substation devices, downloads unit information including software and a device setting value of failed protection and control unit from a database unit and functions as an alternative unit for the failed protection and control unit.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: November 6, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventor: Shigeto Oda
  • Publication number: 20120266017
    Abstract: A system and method for registration of a network access device including a processor configured to identify power loss at a network access device, initiate backup power at the network access device, identify when the backup power at the network access device decreases to or below a first predetermined level, and identify when backup power at the network access device is restored to or above a second predetermined level, and a transmitter configured to transmit, to a server, a registration extension message to reconfigure conditions for handling inbound communications and a registration extension cancellation message to restore original conditions for handling inbound communications.
    Type: Application
    Filed: June 20, 2012
    Publication date: October 18, 2012
    Inventors: Rosa M. Underwood, Armin Raoufinia
  • Patent number: 8286010
    Abstract: A system includes a high-current junction, a voltage sensor, and a controller. Power connectors of two components are electrically connected at the high-current junction, where a high current passes between the two components at the high-current junction. The voltage sensor detects a voltage at the high-current junction. The controller performs a predetermined action in response to the voltage sensor detecting the voltage at the high-current junction being greater than a predetermined threshold voltage. The system may be a data center rack. The high-current junction may be the junction at which an alternating current (AC) input receives AC power from AC mains. The high-current junction may alternatively be the junction at which a power supply receives the AC power from the AC input to generate direct current (DC) power to provide to data center rack components insertable within the data center rack.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: October 9, 2012
    Assignee: International Business Machines Corporation
    Inventors: Randhir S. Malik, Cecil C. Dishman, Thomas S. Mazzeo
  • Patent number: 8276005
    Abstract: Provided is a digital image transmission system in a high definition multimedia interface (HDMI) format or a digital visual interface (DVI) format. A transmission and reception reinforcement device of the digital image transmission system includes a transmitter, a receiver, and a power supply circuit. The power supply circuit includes a first power supply unit supplying power to the transmitter and a second power supply unit supplying power to the receiver. Power output terminals of the first and second power supply units are connected to each other. External-power supply voltages respectively input to the first and second power supply units are output to the power output terminals. When all of the external-power supply voltages input to the first and second power supply units are lower than a predetermined voltage, an internal-power supply voltage present in a communication line between the host device and the display device is output to the power output terminals.
    Type: Grant
    Filed: June 5, 2008
    Date of Patent: September 25, 2012
    Assignee: Opticis Co., Ltd.
    Inventors: Tae-Hoon Bae, Won-Seok Jung
  • Patent number: 8266112
    Abstract: Techniques for recovery of application level objects are disclosed. In one particular exemplary embodiment, the techniques may be realized as a method for restoration of one or more application level objects. The method may comprise obtaining application metadata of an application containing objects to be restored, storing one or more data files containing application data, utilizing the application metadata to provide a user interface for the restoration of one or more application objects, accepting input from a user via the user interface specifying one or more application objects to restore, and restoring the one or more specified application objects.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: September 11, 2012
    Assignee: Symantec Corporation
    Inventors: Louis J. Beatty, Steven R. DeVos
  • Patent number: 8261012
    Abstract: A non-volatile semiconductor memory is disclosed comprising a first memory device having a memory array including a plurality of memory segments, and a data register for storing write data prior to being written to one of the memory segments. A memory controller comprises a microprocessor for executing access commands received from a host. Interface circuitry generates control signals that enable the microprocessor to communicate with the first memory device. Power fail circuitry transmits a flush command to the first memory device through the interface circuitry in response to a power fail signal, wherein the first memory device responds to the flush command by transferring the write data stored in the data register to the memory segment.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: September 4, 2012
    Assignee: Western Digital Technologies, Inc.
    Inventor: Alan Chingtao Kan
  • Patent number: 8250406
    Abstract: A system is provided with the ability to intervene, when a suspend process is initiated in response to an AC failure condition to place the system in a suspended to memory state, to save a persistent copy of an operational state of the system, before allowing the suspend process to complete.
    Type: Grant
    Filed: August 19, 2003
    Date of Patent: August 21, 2012
    Assignee: Intel Corporation
    Inventor: Robert A. Dunstan
  • Patent number: 8234472
    Abstract: A storage system, a storage managing device, and a storage managing method are provided.
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: July 31, 2012
    Assignee: Fujitsu Limited
    Inventors: Hiroaki Ochi, Tomoaki Tsuruta, Naohiro Takeda, Tsukasa Makino, Marie Abe
  • Publication number: 20120192007
    Abstract: A server chassis includes an uninterruptible power supply, and a server including a controller. The uninterruptible power supply is configured to provide a reserve power when a primary power is lost, and to send a power loss signal when the primary power is lost. The controller is configured to receive a desired server uptime, to receive an indication that a power limit for the server is fixed or decreasing over the desired server, to receive the power loss signal from the uninterruptible power supply, to send a power capacity query to the uninterruptible power supply, to receive a reserve power capacity of the uninterruptible power supply in response to the power capacity query, to calculate the power limit for the server based on the reserve power capacity of the uninterruptible power supply and on the desired server uptime, and to enforce the power limit on the server.
    Type: Application
    Filed: January 25, 2011
    Publication date: July 26, 2012
    Applicant: DELL PRODUCTS, LP
    Inventors: Wayne R. Weilnau, JR., Elie J. Jreij
  • Patent number: 8230257
    Abstract: Power-backup capabilities are provided by implementing a variety of different methods, systems and devices. According to one such implementation, a solid-state memory device is implemented with a primary power source that provides primary power. A secondary power source provides secondary power. A power controller provides the primary power to an operating power circuit. The secondary power is provided by enabling a secondary switch located between the secondary power source and the operating power circuit. A solid-state memory uses power from the operating power circuit as a primary source of power when accessing stored data and retains data in the absence of power being provided by the operating power circuit. A memory controller facilitates access to the stored data. In response to problems with the primary power source, pending writes are completed to the solid-state memory circuit. A timing circuit substantially delays full enablement of the secondary switch.
    Type: Grant
    Filed: December 7, 2009
    Date of Patent: July 24, 2012
    Assignee: Seagate Technology LLC
    Inventor: Dean Clark Wilson
  • Patent number: 8214664
    Abstract: A power supplying control method of a computer system for use with a first power supply and a second power supply both providing a first specific voltage to a motherboard, including steps of: detecting whether the first power supply and the second power supply, outputting the first specific voltage, are at a stable state; outputting the first specific voltage to a first pin when the first power supply is at the stable state; outputting the first specific voltage to the first pin when the second power supply is at the stable state; and outputting the first specific voltage to the motherboard via the first pin.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: July 3, 2012
    Assignee: ASUSTeK Computer Inc.
    Inventors: Chih-Wei Lin, Chih-Wan Hsu, Nung-Te Huang
  • Patent number: 8214689
    Abstract: To shorten the time from power restoration to the resumption of business operation. During a power failure, a memory controller saves configuration information and directory information of a shared memory to a nonvolatile memory, and saves data of a cache memory to the nonvolatile memory. During power restoration from a power failure, the memory controller returns information of the nonvolatile memory to the shared memory so that it can be updated before the lapse of the initialization time, the micro processor executes online processing based on information of the shared memory, and the memory controller 70 controls the storage area of the cache memory so that it will become gradually writable according to the battery capacity of the battery if the battery capacity of the battery is still gradually increasing even after the lapse of the initialization time.
    Type: Grant
    Filed: February 19, 2010
    Date of Patent: July 3, 2012
    Assignee: Hitachi, Ltd.
    Inventor: Fumiaki Hosaka
  • Patent number: 8205109
    Abstract: The present invention includes a plurality of disk units for storing data from a host computer, a plurality of power supply apparatuses for supplying DC power to each of the disk units via main power supply wirings, and a redundant power supply apparatus for generating, with any one of the disk units among the plurality of disk units as a load, DC power to the load. As auxiliary power supply wirings for guiding the output of the redundant power supply apparatus to each of the disk units, a common power supply wiring that is common to each of the power supply apparatuses, a plurality of branch power supply wirings branching from the common power supply wiring and connected to each of the disk units, and a redundant power supply wiring for connecting the redundant power supply apparatus and the common power supply wiring are wired to a backboard.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: June 19, 2012
    Assignee: Hitachi, Ltd.
    Inventor: Masahiro Sone
  • Patent number: 8200929
    Abstract: A memory subsystem includes a volatile memory, a nonvolatile memory, and a controller including logic to interface the volatile memory to an external system. The volatile memory is addressable for reading and writing by the external system. The memory subsystem includes a power controller with logic to detect when power from the external system to at least one of the volatile and nonvolatile memories and to the controller fails. When external system power fails, backup power is provided to at least one of the volatile and nonvolatile memories and to the controller for long enough to enable the controller to back up data from the volatile memory to the nonvolatile memory.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: June 12, 2012
    Assignee: Agiga Tech Inc
    Inventor: Ronald H Sartore