Of Power Supply Patents (Class 714/14)
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Patent number: 8200990Abstract: An apparatus, system, and method are disclosed for providing regulated electric power. At least two power buses transfer regulated direct current (“DC”) power from at least four power supplies to an electric load. The power supplies receive electric power from one or more electric sources and convert the electric power to the regulated DC electric power. A switch is connected between each of the power buses and the electric load. Each switch connects and disconnects a power bus to the electric load and transfers the regulated DC electric power from the buses to the electric load. An output power bus connection is disposed on each of the power supplies. Each of the power buses is connected to at least two power supplies and each output power bus connection connects the corresponding power supply upon which the output power bus connection is disposed to exactly one power bus.Type: GrantFiled: December 22, 2007Date of Patent: June 12, 2012Assignee: International Business Machines CorporationInventors: Cecil C. Dishman, Jen-Ching Lin, Randhir S. Malik
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Publication number: 20120137172Abstract: A system and method are disclosed for balancing the requirements of high availability achieved by redundant active components and power saving achieved by less active components. The requirement for high availability can be expressed by the recovery time objective (RTO) which specifies the amount of time it takes to recover from a failure in the system. Based on the configured RTO, the system configures the most appropriate power mode.Type: ApplicationFiled: June 28, 2011Publication date: May 31, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Thomas GARDELEGEN, Nils HAUSTEIN, Peter KIMMEL
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Patent number: 8190575Abstract: A disk drive is disclosed comprising a disk, and a head actuated over the disk. Control circuitry within the disk drive is operable to write a plurality of code segments to a primary area of the disk, and write the code segments to a backup area of the disk. The control circuitry reads the code segments from the primary area of the disk and executes the code segments read from the primary area of the disk. After reading the code segments from the primary area of the disk and executing the code segments, the control circuitry verifies recoverability of the code segments from the backup area of the disk, and when the verification fails, copies the code segments from the primary area of the disk to the backup area of the disk.Type: GrantFiled: August 27, 2008Date of Patent: May 29, 2012Assignee: Western Digital Technologies, Inc.Inventors: Choo-Bhin Ong, An-Chieh Chang, Raffi Codilian
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Publication number: 20120124418Abstract: An apparatus includes a data manager and interface logic with a plurality of interface ports including at least one network interface port. The data manager and interface logic is operative to obtain digital and analog data, via the plurality of interface ports, from a plurality of digital and analog device types, where the data includes device operating parameters and alert condition notifications related to device faults or potential device failure. The data manager and interface logic is also operative to write and email a report conforming to a plurality of configurable report settings in response to occurrence of a device alert condition or a specified reporting interval, obtain updates to the device operating parameters from a remote device over the at least one network interface port, and provide the updates to corresponding devices over the plurality of interface ports.Type: ApplicationFiled: November 15, 2010Publication date: May 17, 2012Applicant: LifeSafety Power Inc.Inventors: Guang Liu, Joseph Malchus Holland, Larry Liwei Ye, John Francis Olliver
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Publication number: 20120102356Abstract: An information processing apparatus includes a controller, a plurality of electric power supply units and a backup electric power supply unit that supply electric power to the controller. The controller detects a malfunction occurring in the plurality of electric power supply units, stops electric power supply from the plurality of electric power supply units, starts electric power supply from the backup electric power supply unit when a malfunction is detected, identifies an electric power supply unit having a malfunction from the plurality of electric power supply units, disconnects the identified electric power supply unit, resumes electric power supply from an electric power supply unit determined to function normally and stops the electric power supply from the backup electric power supply unit when the electric power supply unit having the malfunction is disconnected.Type: ApplicationFiled: October 13, 2011Publication date: April 26, 2012Applicant: FUJITSU LIMITEDInventors: Ryo KUBOTA, Takanori ISHII, Kentarou YUASA
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Patent number: 8156490Abstract: A system includes a network, a number of server computing devices, and a management server computing device. Each server computing device has a virtual host computer program running thereon to support one or more virtual machine computer programs. Each virtual machine computer program is able to execute an instance of an operating system on which application computer programs are executable. The management server computing device monitors the server computing devices, and causes the virtual machine computer programs supported by the virtual host computer program of a first server computing device to dynamically migrate to the virtual host computer program of a second server computing device, upon one or more conditions being satisfied. The conditions may include the first server being predicted as failure prone, the first sever consuming power less than a threshold, and the first server having resource utilization less than a threshold.Type: GrantFiled: May 8, 2004Date of Patent: April 10, 2012Assignee: International Business Machines CorporationInventors: James J. Bozek, Robert E. Stephens, James L. Wooldridge
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Patent number: 8156372Abstract: A method, system and computer program product for operation of a cable modem in response to Alternating Current (AC) power outage is described herein. When a loss of AC power is detected, the cable modem is switched to battery backup mode of operation using a single upstream and a single downstream channel. This switch occurs prior to receiving instructions from a cable modem termination system to use a single upstream and a single downstream channel. The cable modem notifies the cable modem termination system of the switch to battery backup mode of operation.Type: GrantFiled: January 9, 2009Date of Patent: April 10, 2012Assignee: Broadcom CorporationInventors: Lisa Voigt Denney, Roger W. Fish, Margo Dolas
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Patent number: 8156376Abstract: A method, device and system for storing data in a cache in case of power failure are disclosed. The method includes: in case of power failure of a storage system, receiving configuration information from a central processing unit (CPU); establishing a mapping relationship between an address of data in the cache and an address in a storage device according to the configuration information; sending a signaling message that carries the mapping relationship to the cache, so that the cache migrates the data to the storage device according to the signaling message.Type: GrantFiled: October 28, 2009Date of Patent: April 10, 2012Assignee: Chengdu Huawei Symantec Technologies Co., Ltd.Inventor: Liyao Chen
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Publication number: 20120079321Abstract: The invention provides a power supply system for a data storage system, the power supply system comprising: a first power supply unit for supplying power to the storage system; a second power supply unit independent from the first power supply unit for supplying power to the storage system; an auxiliary power supply; a power redundancy controller, arranged to monitor the region of an efficiency curve within which the first and/or second power supplies are operating in and control the first and second power supplies accordingly such that the either or both of the first and second power supplies are providing power at any one time, wherein in the event of failure of a power supply unit when only one of the power supply units is operating, the power redundancy controller is arranged to provide power supply to the data storage system from the auxiliary power supply.Type: ApplicationFiled: September 29, 2010Publication date: March 29, 2012Applicant: Xyratex Technology LimitedInventor: Tim WILLIAMS
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Patent number: 8135967Abstract: A storage system includes one or more first power supplies which receive power from the first input and supplies power to each of multiple load groups through multiple first paths and multiple second power supplies which receive power from the second input and supplies power to each of the multiple load groups through multiple second paths. Each load group is comprised of at least one load, and each load is a storage device. Power is supplied from different second power supplies respectively to two or more load groups to which power is supplied from the first power supply through two or more first paths.Type: GrantFiled: February 27, 2009Date of Patent: March 13, 2012Assignee: Hitachi, Ltd.Inventor: Yosuke Tsuyuki
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Publication number: 20120054520Abstract: In order to avoid loss of data, computer systems are often connected to a UPS which provides power backup in case of an emergency shutdown resulting from a power failure. However, as UPS units are costly, they take up a lot of physical space and can provide power for a limited period of time, it would be advantageous to improve the efficiency of UPS devices and enable to utilize as much as possible of the UPS power in order to save data to a permanent storage before shutdown. There is provided a method and system for controlling the frequency of one or more processors in computer systems, responsive to an indication of a power failure, and thereby reduce its power consumption, so as to provide more power for writing write-pending data to a non-volatile data storage.Type: ApplicationFiled: August 31, 2010Publication date: March 1, 2012Applicant: INFINIDAT LTD.Inventor: Ido BEN-TSION
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Publication number: 20120030510Abstract: A hard disk drive that is coupled to a non-volatile memory. The non-volatile memory includes data that was designated to be stored in the hard disk drive in a previous time period. When a power loss event is detected the hard disk drive stores the track address of the last written track in non-volatile memory. When power is returned, the hard drive retrieves the last track address from the non-volatile memory. The data can then be rewritten onto the last track. Such an approach allows relatively large sectors of 4 Kbytes to be recaptured after a power loss event.Type: ApplicationFiled: July 27, 2010Publication date: February 2, 2012Applicant: Samsung Electronics Co., Ltd.Inventor: Ken Hong
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Patent number: 8108720Abstract: Methods, systems, and products are disclosed for predicting failures in power supplies. A count of exception messages is set to zero. When a exception message is received, the count of exception messages is incremented and compared to a threshold value. When the count of exception messages equals the threshold value, a cooling fan is determined to be failed, and a prediction is made that a power supply is proceeding towards failure.Type: GrantFiled: September 28, 2009Date of Patent: January 31, 2012Assignee: AT&T Intellectual Property I, L.P.Inventors: James Gordon Beattie, Jr., Paritosh Bajpay, Stephen J. Griesmer, Martin Tusl
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Patent number: 8108723Abstract: A triggered restart mechanism for failure recovery in power over Ethernet (PoE). Powered devices (PDs) that fail can be remotely recycled by a power sourcing equipment (PSE). After detection of a failure of a PD, such as by the failure to receive a status message, a PSE can generate a reset signal (e.g., power cycle, reset pulse, etc.) on the port. This reset signal can cause the PD to perform a full power cycle or quick restart.Type: GrantFiled: March 31, 2008Date of Patent: January 31, 2012Assignee: Broadcom CorporationInventor: Wael William Diab
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Patent number: 8103892Abstract: A power management apparatus includes a first electrical lead and a second electrical lead. The first electrical lead routes electrical current at a first electrical lead electrical potential level and the second electrical lead route electrical current at a second current port electrical potential level. The power management apparatus further includes a first electrical parameter sensor configured to measure a first electrical lead electrical parameter and a second electrical parameter sensor configured to measure a second electrical lead electrical parameter. The power management apparatus further comprises a buck boost converter electrically coupled to both the first electrical lead and the second electrical lead. The buck boost converter is configured to convert electrical current between the first electrical lead electric potential level and the second electrical lead electric potential level at a controlled potential conversion level.Type: GrantFiled: July 1, 2009Date of Patent: January 24, 2012Assignee: Adaptive Materials, Inc.Inventor: Jason Krajcovic
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Patent number: 8103907Abstract: Systems and methods that provide power redundancy to a computer system without increasing the number of independent power supplies used. A system having N computing modules may have power redundancy using N power supplies, where each of the N power supplies are able to supply more power than required by an associated computing module, and where all but one (N?1) of the power supplies collectively can immediately supply power to any one of the computing modules when the power supply associated with that computing module fails.Type: GrantFiled: October 29, 2009Date of Patent: January 24, 2012Assignee: International Business Machines CorporationInventors: Jan M. Janick, Randhir S. Malik, Gregory J. McKnight
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Patent number: 8090965Abstract: A memory controller, a method of testing memory power management modes in an integrated circuit and an integrated circuit. In one embodiment, the memory controller includes a power management mode test controller couplable to a test access port and at least one memory core and configured to respond to a signal provided via the test access port by providing an ordered signal-setting sequence to the at least one memory core to cause the at least one memory core to enter into and exit from at least one memory power management mode.Type: GrantFiled: April 17, 2008Date of Patent: January 3, 2012Assignee: LSI CorporationInventor: Sreejit Chakravarty
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Patent number: 8078908Abstract: An apparatus includes a cache memory for storing user data and control information of the apparatus, a nonvolatile memory and a processor for executing a process including when the power failure occurs, saving the user data and the control information stored in the cache memory into the nonvolatile memory, when the power failure recovers, restoring the data stored in the nonvolatile memory into the cache memory, and erasing the data stored in the nonvolatile memory after restoring the data into the cache memory and when another power failure occurs during erasing the data stored in the nonvolatile memory, erasing the control information stored in the nonvolatile memory if the control information is remained in the nonvolatile memory and saving, into the nonvolatile memory, the updated control information stored in the cache memory and the user data which has been erased from the nonvolatile memory.Type: GrantFiled: May 12, 2010Date of Patent: December 13, 2011Assignee: Fujitsu LimitedInventors: Mihoko Tojo, Hidefumi Kobayashi, Yusuke Oota, Satoshi Hayashi, Keiichi Umezawa
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Publication number: 20110302448Abstract: An image processing apparatus includes: a switch of a main power supply unit that is switched between ON and OFF in response to a user's operation so as to switch the power supply between a supply of power and an interruption of the supply; a first notification unit that sends an interrupt request notification for requesting to interrupt a process in a recoverable way to all of or a part of the applications being run if the switch of a main power supply unit is turned off; and a power supply control unit that interrupts the supply from the power supply when a time lapse, that is measured since a time when the notification unit has sent the interrupt request notification, exceeds a first predetermined time.Type: ApplicationFiled: May 24, 2011Publication date: December 8, 2011Inventors: Kiwamu Okabe, Hidekazu Segawa
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Publication number: 20110302432Abstract: Super capacitor supplemented server power is described. In embodiments, a power system manager is implemented to monitor the capability of one or more power supplies to provide power for a server system. The power system manager can determine that the capability of the power supplies to provide the power is deficient, and then engage one or more super capacitor power modules to provide supplemental power for the server system to mitigate the power deficiency.Type: ApplicationFiled: June 8, 2010Publication date: December 8, 2011Applicant: MICROSOFT CORPORATIONInventors: Shaun L. Harris, Scott Thomas Seaton, Allan J. Wenzel, Daniel G. Costello, Christian L. Belady
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Patent number: 8074034Abstract: A memory subsystem includes a volatile memory, a nonvolatile memory, and a controller including logic to interface the volatile memory to an external system. The volatile memory is addressable for reading and writing by the external system. The memory subsystem includes a power controller with logic to detect when power from the external system to at least one of the volatile and nonvolatile memories and to the controller fails. When external system power fails, backup power is provided to at least one of the volatile and nonvolatile memories and to the controller for long enough to enable the controller to back up data from the volatile memory to the nonvolatile memory.Type: GrantFiled: July 25, 2007Date of Patent: December 6, 2011Assignee: AgigA Tech Inc.Inventor: Ronald H Sartore
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Patent number: 8074098Abstract: An object of the present invention is to ensure, in an information processing system including a plurality of server apparatuses coupled to one another, reliability and availability thereof when failover is executed.Type: GrantFiled: February 24, 2009Date of Patent: December 6, 2011Assignee: Hitachi, Ltd.Inventors: Masayuki Fukuyama, Jun Nakayama, Kouji Masuda
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Patent number: 8074112Abstract: Systems, apparatuses, and methods for memory backup in a redundant array of independent disks (RAID) system are described. The methods include detecting a failure in a main power supply that supplies power to a volatile memory that is coupled to a RAID controller, switching to a temporary power supply to supply power to the volatile memory in response to detecting the main power supply failure, and transferring data from the volatile memory to a non-volatile memory coupled to the RAID controller subsequent to switching to the temporary power supply.Type: GrantFiled: December 5, 2008Date of Patent: December 6, 2011Assignee: Marvell International Ltd.Inventors: Lihan Chang, Chee Hoe Chu, Chi-Chih Lin, Wei Zhou
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Patent number: 8065560Abstract: A method and apparatus for achieving high availability for applications and optimizing power consumption within a datacenter is provided. In one embodiment, a method for providing high availability and optimizing power consumption within a datacenter comprises upon execution of an application at a target node amongst a plurality of nodes in a datacenter, selecting a failover target node amongst the plurality of nodes for the application, and reserving a failover capacity of at least one resource of the selected failover target node.Type: GrantFiled: March 3, 2009Date of Patent: November 22, 2011Assignee: Symantec CorporationInventor: Roshni Jaywantsingh Patil
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Patent number: 8060786Abstract: A method for recovering a basic input output system (BIOS) and a computer device thereof are disclosed. The computer device includes a motherboard, a power button, a BIOS storage unit, and an embedded controller. The BIOS storage unit is disposed on the motherboard, and it stores a first boot block code and a second boot block code. When the computer device is connected with a power supply to supply standby power to the motherboard, and the power button is not pressed, the embedded controller detects whether the first boot block code is damaged. If the first boot block code is damaged, the embedded controller recovers the first boot block code via the second boot block code.Type: GrantFiled: January 25, 2011Date of Patent: November 15, 2011Assignee: Asustek Computer Inc.Inventors: Yen-Ting Chou, Jin-En Liao
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Publication number: 20110276824Abstract: A network switch apparatus includes a housing, a first network port, a second network port, a first instrument port, an active component inside the housing, wherein the active component is configured to receive packets from the first network port, and pass at least some of the packets from the first network port to the first instrument port, a connector for supplying power from a power supply to the active component, and a backup power supply for supplying power to the active component when the active component does not receive power from the power supply.Type: ApplicationFiled: May 6, 2010Publication date: November 10, 2011Inventor: Thomas Kwok Yin CHEUNG
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Patent number: 8055928Abstract: Some embodiments of the present invention provide a system that controls a device that characterizes the health of a computer system power supply. During operation, a signature for the power supply is generated based on measurements of a set of performance parameters for the power supply. Then, the health of the power supply is characterized based on a comparison between the signature for the power supply and signatures for one or more other power supplies.Type: GrantFiled: August 28, 2008Date of Patent: November 8, 2011Assignee: Oracle America, Inc.Inventors: Anton A. Bougaev, Aleksey M. Urmanov, Kenny C. Gross
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Publication number: 20110271144Abstract: A system for providing data integrity in an embedded device environment. One approach is operating an embedded control engine with non-battery backup power and providing data backup with inexpensive memory. Just data having changes may be provided to a volatile memory such as an SRAM module. After an accumulation of a certain amount of data, the data may be moved onto a relatively larger non-volatile memory, such as an NVRAM module or other type of flash memory. Non-battery backup power may maintain the SRAM module for a period after a power loss, so as to retain data. After restoration of power, data from NVRAM and SRAM modules may be read by the backup service to recreate the last known state of the control engine before the power loss.Type: ApplicationFiled: April 30, 2010Publication date: November 3, 2011Applicant: HONEYWELL INTERNATIONAL INC.Inventors: Owen Michael James, Daniel Giorgis, John Sublett
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Publication number: 20110271143Abstract: Provided is a RAID controlled storage device of a PCI-Express (PCI-e) type, which provides data storage/reading services through a PCI-Express interface. The RAID controller typically includes a disk mount coupled to a set of PCI-Express SSD memory disk units, the set of PCI-Express SSD memory disk units comprising a set of volatile semiconductor memories; a disk monitoring unit coupled to the disk mount for monitoring the set of PCI-Express memory disk units; a disk plug and play controller coupled to the disk monitoring unit and the disk mount for controlling the disk mount; a high speed host interface coupled to the disk monitoring unit and the disk mount for providing high-speed host interface capabilities; a disk controller coupled to the high speed host interface and the disk monitoring unit; and a host interface coupled to the disk controller.Type: ApplicationFiled: April 30, 2010Publication date: November 3, 2011Inventor: Byungcheol Cho
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Patent number: 8051316Abstract: Systems and methods for power management in an information handling system are disclosed. A method may include determining a power requirement of resources configured to receive power from a plurality of power supply units including one or more online power supply units, one or more redundant power supply units, and one or more standby power supply units. The method may also include determining a power capacity of the one or more online power supply units. The method may additionally include determining if the power capacity of the one or more online power supply units exceeds the power requirement of the resources. The method may further include transitioning at least one of the power supply units based on such determining steps.Type: GrantFiled: June 9, 2008Date of Patent: November 1, 2011Assignee: Dell Products L.P.Inventors: Michael J. Roberts, Ashish Munjal
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Patent number: 8051327Abstract: Machines may be connected to power distribution units (PDU/STSs) in such a way that if one PDU/STS fails or is taken out of service, the machines' loads are shifted more-or-less evenly to the other PDU/STSs. Several PDU/STSs may be provided for a group of dual-corded machines. The two cords of each machine are connected to a pair of PDU/STSs. Different pairs of PDU/STSs may be used for different machines. In normal operation, each machine may draw part of its power through each of the two cords. If one PDU/STS to which a machine is connected fails or is taken out of service, the entire load on that machine may be shifted to its remaining cord. Since redistribution may be approximately even across PDU/STSs, tolerance for one PDU/STS failure can be implemented with relatively little over-sizing of the PDU/STSs.Type: GrantFiled: October 28, 2008Date of Patent: November 1, 2011Assignee: Microsoft CorporationInventor: Scott T. Seaton
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Publication number: 20110264952Abstract: An assembly includes a plurality of power supply units for producing an output-side operating voltage from at least one input-side supply voltage and at least one power-consuming component which is electrically coupled to the plurality of power supply units. The assembly has a controller arranged to monitor the function of the plurality of power supply units and to switch the power-consuming from a normal operating mode into a restricted operating mode, whose power consumption is lower than that of the first operating mode, when at least one power supply unit fails or to activate a previously deactivated power supply unit.Type: ApplicationFiled: November 30, 2009Publication date: October 27, 2011Applicant: FUJITSU TECHNOLOGY SOLUTIONS INTELLECTUAL PROPERTY GMBHInventors: Hans-Jürgen Heinrichs, Manfred Götz
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Patent number: 8046572Abstract: A booting system, a boot program, and a method therefor are provided. A boot source device and a boot target device are connected to each other via a transfer interface. The transfer interface is an interface where booting is supported by a BIOS of the boot target device. The boot source device transfers a first object corresponding to booting data which allows the boot target device to establish and use a connection including an interface other than the transfer interface, which is not supported by the BIOS, via the transfer interface. After the boot target device is enabled to use the interface other than the transfer interface, the boot source device transfers a second object corresponding to booting data for booting up an OS of the boot target device or the like via the transfer interface and transfer interfaces and to the boot target device to boot the boot target device.Type: GrantFiled: April 17, 2008Date of Patent: October 25, 2011Assignee: Hewlett-Packard Development Company, L.P.Inventors: Takeaki Ota, Takashi Sakamoto
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Patent number: 8046546Abstract: A memory subsystem may include logic to make available to the device into which it is installed at least one portion of the volatile memory that will be backed up to the nonvolatile memory in the event of device power failure. The logic may make available to the device at least one portion of the volatile memory that will not be backed up to the nonvolatile memory in the event of device power failure, and make available to the device at least one portion of the nonvolatile memory that is not reserved for backups from the volatile memory.Type: GrantFiled: July 25, 2007Date of Patent: October 25, 2011Assignee: AGIGA TechInventor: Ronald H Sartore
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Patent number: 8037362Abstract: One or more switches are interposed between a controller portion and a storage device. When transmission of a command to a certain storage device fails, a command is transmitted starting from an upstream side to a downstream side of a path between the controller portion and the switch to which the certain storage device is connected, and when command transmission fails while transmitting a command from a kth switch (k is an integer of 0 or more) which is connected to a (k+1)th switch and is one level upstream of the (k+1)th switch or from any port of the controller portion, it is determined that a failure has occurred in a power source that supplies power to the (k+1)th switch.Type: GrantFiled: August 26, 2010Date of Patent: October 11, 2011Assignee: Hitachi, Ltd.Inventors: Hiroshi Suzuki, Tsutomu Koga, Tetsuya Inoue, Tomokazu Yokoyama, Kenji Jin
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Patent number: 8032777Abstract: A control apparatus for accessing a memory card includes a bus, a detecting circuit, and an adjusting circuit. The bus is regarded as a signal transmission line between the control apparatus and the memory card. The bus has a power signal transmission line for providing the memory card with a power signal. The detecting circuit detects an operating status of the control apparatus and generates an indication signal when the operating status exceeds a predetermined operating range. The adjusting circuit is coupled to the bus and detecting circuit, and is utilized for adjusting a current passing through the power signal transmission line according to the indication signal without closing the power signal transmission line thereby making the operating status operated within the predetermined operating range.Type: GrantFiled: December 13, 2007Date of Patent: October 4, 2011Assignee: Realtek Semiconductor Corp.Inventors: An-Ming Lee, Zhen-Guo Sun, Ying-Hui Zhu, Chih-Ching Chien
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Publication number: 20110239043Abstract: A method for providing reduced power consumption in a computer memory system is provided. The method includes transferring, by a memory controller coupled to a volatile memory, a non-volatile memory, and a buffer, first data from the volatile memory to the buffer. The buffer stores less data than the volatile memory and the non-volatile memory. The method also includes placing the volatile memory into self-refresh mode after transferring the first data to the buffer. The method further includes conveying the first data from the buffer to the non-volatile memory, where the amount of first data exceeds a predetermined threshold. While conveying the first data, the memory controller takes the volatile memory out of self-refresh mode when the amount of first data in the buffer reaches the predetermined threshold. The volatile memory is ready to transfer second data to the buffer when the memory controller is finished transferring the first data.Type: ApplicationFiled: January 24, 2011Publication date: September 29, 2011Applicant: DOT HILL SYSTEMS CORPORATIONInventors: Rex Weldon Vedder, Bradford Edwin Golson, Michael Joseph Peters
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Patent number: 8024606Abstract: Power restoration to blade servers including maintaining a list of blade server identifications and a value of power saving for each capped blade server; identifying losing power to the capped blade servers; restoring power to the previously capped blade servers in order of the values of power savings.Type: GrantFiled: August 21, 2009Date of Patent: September 20, 2011Assignee: International Business Machines CorporationInventors: Joseph E. Bolan, Vijay Kumar
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Publication number: 20110225452Abstract: Exemplary embodiments adapted to distribute power from four input lines to a plurality of power supply units (PSUs) configured in an N+1 architecture are provided. In one such embodiment, a plurality of rectifier devices have first and second ends, each of the plurality of rectifier devices connected at the first end to one of the four input lines, and adapted to be bypassed by a first relay in a first operating mode and provide rectified input current in a second operating mode. A plurality of second relays is connected between each of the second ends of the plurality of rectifier devices. The plurality of second relays are adapted to be closed in the second operating mode to sum the rectified input current from each of the plurality of rectifier devices in a single node connecting each of the plurality of PSUs.Type: ApplicationFiled: March 10, 2010Publication date: September 15, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jiwu DUAN, Steven M. GROFF, Trung LE
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Patent number: 8018349Abstract: Power control circuitry (i) applies an inline power signal from a power source to first and second terminals when a control signal delivered to the power control circuitry has an inline-power-ON value and (ii) shuts off the inline power signal from the power source to the first and second terminals when the control signal delivered to the power control circuitry has an inline-power-OFF value. Detection of an inline power shutoff failure includes obtaining a measurement signal from sensing circuitry while the control signal delivered to the power control circuitry has the inline-power-OFF value, and generating a result signal based on the measurement signal. The result signal indicates whether the power control circuitry is applying the inline power signal from the power source to the first and second terminals while the control signal delivered to the power control circuitry has the inline-power-OFF value due to an inline power shutoff failure.Type: GrantFiled: April 29, 2009Date of Patent: September 13, 2011Assignee: Cisco Technology, Inc.Inventors: James Getker, Philip Van Atta
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Patent number: 8020019Abstract: In a data processing system having elements grouped into a plurality of power domains, each one of which has at least one processing element and at least two power supplies, power domains are interconnnected by sensing and switching circuitry which senses the conditions of power supply and demand in and among the domains and switches from one domain to power supplies in another domain in the event of failure in the first domain.Type: GrantFiled: May 9, 2008Date of Patent: September 13, 2011Assignee: International Business Machines CorporationInventor: Raymond Mathew Clemo
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Publication number: 20110219262Abstract: A control apparatus controls a first and a second power supply units having a redundant configuration and converters connected to respective outputs of the power supply units. The power supply units generate a plurality of voltages and supply a storage device with the generated voltages through the respective converters. The control apparatus includes a determination unit for determining whether an abnormality occurs in a first voltage that the first power supply unit generates, upon the second power supply unit failing, and an instruction unit for instructing the converter connected to the first power supply unit to generate the first voltage on the basis of a second voltage that the first power supply unit generates, upon the abnormality occurring in the first voltage of the first power supply unit.Type: ApplicationFiled: November 17, 2010Publication date: September 8, 2011Applicant: FUJITSU LIMITEDInventors: Mitsuru MAEJIMA, Yasuyuki Nagata
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Patent number: 8015434Abstract: There is provided a management apparatus of a storage apparatus. The management apparatus includes an acquisition determination section that determines whether predetermined identification information can be acquired or not from a mounting apparatus that mounts at least one storage apparatus and has at least one predetermined identification information assigned thereto, and a failure determination section that determines, based on a determination result of the acquisition determination section, an access failure to the storage apparatus mounted in the mounting apparatus has been caused due to a failure of the storage apparatus itself or an interruption of a power supply to the mounting apparatus.Type: GrantFiled: January 23, 2009Date of Patent: September 6, 2011Assignee: Fujitsu LimitedInventors: Tsukasa Makino, Tomoaki Tsuruta, Hiroaki Ochi, Marie Abe, Masanori Ito, Koji Ohtsuki, Atsushi Ishii
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Patent number: 8010823Abstract: An architecture for a power supply with an integrated UPS control system to which generic batteries may be connected. Such an architecture greatly reduces the overall cost, complexity, size and inefficiency of providing uninterruptible power to a device such as a computer system.Type: GrantFiled: December 21, 2007Date of Patent: August 30, 2011Assignee: GlobalFoundries Inc.Inventor: Daryl G. Sartain
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Publication number: 20110208998Abstract: To shorten the time from power restoration to the resumption of business operation. During a power failure, a memory controller saves configuration information and directory information of a shared memory to a nonvolatile memory, and saves data of a cache memory to the nonvolatile memory. During power restoration from a power failure, the memory controller returns information of the nonvolatile memory to the shared memory so that it can be updated before the lapse of the initialization time, the micro processor executes online processing based on information of the shared memory, and the memory controller 70 controls the storage area of the cache memory so that it will become gradually writable according to the battery capacity of the battery if the battery capacity of the battery is still gradually increasing even after the lapse of the initialization time.Type: ApplicationFiled: February 19, 2010Publication date: August 25, 2011Applicant: HITACHI, LTD.Inventor: Fumiaki Hosaka
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Patent number: 8006132Abstract: The present invention includes a plurality of disk units for storing data from a host computer, a plurality of power supply apparatuses for supplying DC power to each of the disk units via main power supply wirings, and a redundant power supply apparatus for generating, with any one of the disk units among the plurality of disk units as a load, DC power to the load. As auxiliary power supply wirings for guiding the output of the redundant power supply apparatus to each of the disk units, a common power supply wiring that is common to each of the power supply apparatuses, a plurality of branch power supply wirings branching from the common power supply wiring and connected to each of the disk units, and a redundant power supply wiring for connecting the redundant power supply apparatus and the common power supply wiring are wired to a backboard.Type: GrantFiled: January 29, 2008Date of Patent: August 23, 2011Assignee: Hitachi, Ltd.Inventor: Masahiro Sone
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Patent number: 8005118Abstract: A method and apparatus for implementing a secure clock having no internal power source are disclosed. The apparatus accesses a host device having an internal power source and transmits and receives data. The apparatus includes a clock control unit, a counter, and a time information unit. The clock control unit performs control such that the time information of the host device is acquired and a counter value corresponding to the acquired time information is set, when the clock control unit is connected to the host device and is supplied with power from the host device. The counter changes the set counter value in steps of a predetermined value at regular time intervals while the power is supplied. The time information unit updates current time information to correspond to the changed counter value while the power is supplied.Type: GrantFiled: December 6, 2006Date of Patent: August 23, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-gyoo Sim, Yun-sang Oh, Kyung-im Jung, Suk-bong Lee
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Patent number: 8001419Abstract: An industrial automation controller module includes a main module and an energy storage module (ESM) releasably connected to the main module. The ESM includes a back-up electrical power source such as a battery or a capacitor that is electrically connected to processor circuitry of the main module when the ESM is physically connected to the main module. In case of interruption of operating power to the processor circuitry of the main module, the back-up power source of the ESM supplies back-up power to the main module to allow for completion of an emergency save operation to save data to non-volatile memory in the main module. If the ESM includes a capacitor back-up power source, it is charged by the main module and the capacitor charge is dissipated if the ESM is separated from the main module.Type: GrantFiled: September 30, 2008Date of Patent: August 16, 2011Assignee: Rockwell Automation Technologies, Inc.Inventors: Daniel E. Killian, Douglas R. Bodmann, Dale R. Terdan, Ronald E. Schultz, James J. Kay
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Patent number: 7962787Abstract: A method, and a system of using the method, of preserving memory of a processor powered by an external source. The method includes determining a drop in a first power to be supplied to the processor, generating a reset signal when the drop falls below a threshold, supplying a second power from a power store to the processor based on the reset signal, and holding the reset signal until the first power rises above the threshold.Type: GrantFiled: January 29, 2008Date of Patent: June 14, 2011Assignee: Robert Bosch GmbHInventors: Paul M. Camilleri, Jerry A. Gohl
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Patent number: 7962776Abstract: A method to detect component removal while operating in a battery backup mode, comprising providing power from a battery backup unit (BBU) to a control card memory device, and measuring the current drawn by the control card memory device. If the current drawn by the control card memory device is less than or equals a pre-determined disconnect current, the method determines if a BBU release pin has been asserted. If the BBU release pin has been asserted, the method encodes in an event log a battery backup removal event. If the BBU release pin has not been asserted, the method encodes in the event log a control card removal event.Type: GrantFiled: October 14, 2007Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: Steven Mark Groff, Larry Juarez, Joseph Dean Ohrazda, Kenny Nian Gan Qiu