Of Power Supply Patents (Class 714/14)
-
Patent number: 7181517Abstract: The modular master control unit of the telecommunications power system communicates via a data bus with the associated modular rectifier units, distribution unit(s) and battery connection unit(s) to collect operating state information from the neuron processors of those units and store that information in a database. The master control unit also controls the operation of the associated modular units by supplying operating state information, based on values stored in the database. The user interface manager module provides local user interface control over the system by allowing the user through a local display screen and touch pad to read from and write to the database. By downloading an applet to a remote computer running a web browser, the user interface manager allows users at remote locations to perform the same control and monitor functions as a user at the local site. The applet runs within the standard browser and communicates with the user interface manager using TCP/IP protocol.Type: GrantFiled: June 2, 2000Date of Patent: February 20, 2007Assignee: Astec International LimitedInventors: Marc Iavergne, Louis Duguay, Christian de Varennes
-
Patent number: 7178061Abstract: A transactional file system developed to function with flash memory is described. The file system performs power-failure detection and ensures data integrity in the event of a power failure. In one described implementation, a power failure event can be detected by a file system, components of the file system, or individual modules in the form or computer-executable instructions and/or logic. Meta-information is stored at a location on a flash medium indicated by a write pointer if a computer device shuts-down according to a normal shutdown mode. During initialization of the computer, a check is performed whether the meta-information is present in the location on the flash medium indicated by the write pointer. If the meta-information is present, then a conclusion is made that the computer shutdown according to the normal shutdown mode.Type: GrantFiled: November 21, 2002Date of Patent: February 13, 2007Assignee: Microsoft CorporationInventors: Jered Donald Aasheim, Yongqi Yang, John Kalkman
-
Patent number: 7162625Abstract: The present invention discloses an information handling system that reduces POST time in a boot operation. The information handling system includes a processor, a memory and a BIOS unit. The BIOS also includes memory test pointer and a test block size indicator. During the POST routine, the BIOS tests at least one test block during at least one idle period.Type: GrantFiled: March 10, 2003Date of Patent: January 9, 2007Assignee: Dell Products L.P.Inventors: Jonathan T. Stern, Marc D. Alexander
-
Patent number: 7152175Abstract: Disclosed is a system having a power input line. A power supply facility provides the system with a combined set of signals including a power signal and a status signal over the power input line. Additionally, disclosed is a system having at least two power input lines. Uninterruptible power supply facilities provide the system with combined sets of signals including a power signal and a status signal over the power input lines. Each combined set of signals includes a unique UPS identifier, which can be used to determine whether power sources for power input lines are unique.Type: GrantFiled: March 6, 2003Date of Patent: December 19, 2006Assignee: Sun Microsystems, Inc.Inventors: Peter W. Madany, Hideya Kawahara
-
Patent number: 7142404Abstract: A domain power notification system detects when a power domain experiences a power condition, such as lost power and low-voltage power, and communicates that information to the domains that communicate with the problem domain. As a result, the effected domains stop communicating with the problem domain without passing erroneous information.Type: GrantFiled: June 9, 2004Date of Patent: November 28, 2006Assignee: Advanced Micro Devices, Inc.Inventors: Simon Bikulcius, Mark A. Landguth
-
Patent number: 7131012Abstract: Techniques for identifying UPS-sub-system interconnections using manual data, UPS identification signals, and variations in UPS voltage variations that produce error signals. Once interconnections have been identified an operating system can check the UPS/sub-system topology to isolate potential errors and/or to enable controlled shut-down of sub-systems in case of potential power failure.Type: GrantFiled: October 16, 2003Date of Patent: October 31, 2006Assignee: International Business Machines CorporationInventors: Patrick K. Egan, Todd J. Rosedahl
-
Patent number: 7129822Abstract: An apparatus is provided that includes an uninterruptible power supply (UPS) configured to be connected to a power distribution network. A communications circuit is also provided. The communications circuit is operatively associated with the UPS and operative to generate a power line carrier status signal on the power distribution network. The power line carrier status signal is indicative of a status of power delivered to the power distribution network by the UPS. Related methods of operating such apparatus are also provided.Type: GrantFiled: March 2, 2004Date of Patent: October 31, 2006Assignee: Powerware CorporationInventors: Darrick Finan, Jim Thompson, Greg Mears
-
Patent number: 7126371Abstract: When a reset signal /RESET is “L”, a flip-flop circuit holds “1”; on the other hand, a flip-flop circuit holds “0”. When the reset signal /RESET becomes “H”, the flip-flop circuits captures data in synchronous with a clock signal. When a power supply voltage returns to the initial value after an instantaneous blackout occurs, the data of the flip-flop circuits have the same value. An output signal of an exclusive-OR gate circuit becomes “L”, the output is held in a flip-flop circuit. As a result, an instantaneous blackout detection signal becomes “H”.Type: GrantFiled: December 20, 2002Date of Patent: October 24, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Hiroo Nakano, Shinichi Hasebe
-
Patent number: 7124321Abstract: A computer system is provided having at least one processing resource, at least one power resource and at least one redundant power resource. The at least one processing resource is operable to exploit a greater level of power than is provided by the at least one power resource. The at least one processing resource is configured to exploit power provided by both the at least one power resource and the at least one redundant power resource, at a time when both the at least one power resource and the at least one redundant power resource are both operable to provide power.Type: GrantFiled: February 10, 2003Date of Patent: October 17, 2006Assignee: Sun Microsystems, Inc.Inventors: Paul J Garnett, Andrew S Burnham
-
Patent number: 7124244Abstract: A storage system having disk drives, a first and a second cache memory for temporarily storing data sent from a host system so as to be written in the disk drives and a duplicate of the data, a first FIFO buffer for temporality storing the duplicate data in order to transfer the duplicate data from the first cache memory to the second cache memory, and a second FIFO buffer for temporality storing the duplicate data in order to transfer the duplicate data from the second cache memory to the first cache memory. In the case where the data sent from the host system so as to be written in the disk drives are temporarily stored in the first cache memory and the duplicate of the data is stored in the second cache memory, completions of the data writing are reported to the host system at the time point when the data and the duplicate data are stored in the fist cache memory and the second cache memory.Type: GrantFiled: September 11, 2003Date of Patent: October 17, 2006Assignee: Hitachi, Ltd.Inventor: Kentaro Shimada
-
Patent number: 7093164Abstract: An information processing apparatus includes a high-speed processor, and the high-speed processor processes a game program restored in a memory cartridge. A power control routine is then executed, and capacitors (C4, C5) included in a charge pump circuit is repeatedly charged and discharged. If an error occurs in the high-speed processor and then the power control routine is not properly executed, a difference in electric potential (VC) between one end of a resistor (R10) and a reference electric potential surface or point increases. When the difference in electric potential exceeds a threshold value, a supply of stabilized voltage is stopped by a power on/off control circuit, and an entire system including the high-speed processor is then turned off.Type: GrantFiled: October 17, 2001Date of Patent: August 15, 2006Assignee: SSD Company LimitedInventor: Shuhei Kato
-
Patent number: 7081827Abstract: A POE (power over Ethernet)-prioritized active splitter is disclosed for a prioritized network having different priorities such as a network security system that uses an intelligent POE power supply with a prioritized back-up response, allowing a lower cost UPS (uninterruptible power supply) system to be used, and also providing a longer back-up time period by the UPS system for more critical components of the security system. A simple embodiment operates with only two priority levels, a high priority level for more critical components of the, such as the cable modem, the system router, fire alarm devices, local warning devices and the alarm communicator, while less critical components are supplied with electrical power at the low priority level. In the event of a power outage or disconnection, the critical high priority components remain connected to the Ethernet network to be supplied with electrical power by the UPS system and also to communicate over the twisted wire pairs of the Ethernet network.Type: GrantFiled: April 5, 2004Date of Patent: July 25, 2006Assignee: Honeywell International, Inc.Inventor: Kenneth L. Addy
-
Patent number: 7082524Abstract: A host is coupled to a cluster interconnection fabric which includes a fabric-attached I/O controller. The host includes a processor, a memory coupled to the processor and an operating system. The operating system includes a kernel and a fabric bus driver to provide an I/O bus abstraction to the kernel for the cluster interconnection fabric. The fabric bus driver presents the cluster interconnection fabric to the kernel as a local I/O bus, and presents the fabric-attached I/O controller to the kernel as a local I/O controller attached to a local I/O bus.Type: GrantFiled: May 29, 2003Date of Patent: July 25, 2006Assignee: Intel CorporationInventor: Rajesh R. Shah
-
Patent number: 7076599Abstract: A transactional file system developed to function with flash memory is described. The file system provides for efficient storage of file system meta-information, performs robust transaction logging, and performs other related features. In one described implementation, metadata is stored in-line with data. In another embodiment, a transaction log is maintained by storing transaction information associated with requests to perform file transactions. The transaction information is stored at arbitrary physical sector addresses on the flash medium. In still another embodiment, a transaction log is stored in a physical sector of a flash medium. The transaction log contains transaction information associated with performing a file request. Metadata is written into a spare area of the physical sector indicating that the physical sector contains transaction information.Type: GrantFiled: May 25, 2005Date of Patent: July 11, 2006Assignee: Microsoft CorporationInventors: Jered Aasheim, Yongqi Yang, John Kalkman
-
Patent number: 7072054Abstract: An apparatus and method for erasing incomplete and/or pending jobs from a marking device's non-volatile memory after a power loss. A threshold power loss duration can be selected, as can type of job(s) to be erased and whether users should be notified of erasure.Type: GrantFiled: December 16, 2002Date of Patent: July 4, 2006Assignee: Xerox CorporationInventor: Keith G. Bunker
-
Patent number: 7051233Abstract: A disk array device having two or more disk units, each disk unit including at least one disk drive, at least either of said disk units having parity bits carrying data recovery information, comprises at least one backup battery provided for each of said disk unit.Type: GrantFiled: April 29, 2003Date of Patent: May 23, 2006Assignee: Hitachi, Ltd.Inventors: Mitsuo Fukumori, Hiroshi Suzuki, Hiromi Matsushige, Masato Ogawa, Tomokazu Yokoyama
-
Patent number: 7038984Abstract: HDD boxes 831 to 83n are each incorporated with a secondary battery box 87, a non-isolated DC/DC converter 89, and an HDD 91. Logical circuit boards 851 to 85n are each incorporated with the secondary battery box 87, fast-transient-response-type non-isolated DC/DC converters 931 to 933, and a plurality of loads 951 to 953. Every secondary battery box 87 is provided with a charge/discharge circuit 97, and a plurality of in-line secondary batteries 99. In the HDD box, the output voltage from the secondary battery box 87 goes to an HDD 91 via the DC/DC converter 89. In the logical circuit board, the output voltage from the secondary battery box 87 goes to the corresponding loads 951 to 953 via the DC/DC converters 931 to 933. With such a structure, in a disk array apparatus, realized are higher energy efficiency and less space occupation through reducing power loss and optimizing power capacity setting for a backup power.Type: GrantFiled: April 8, 2004Date of Patent: May 2, 2006Assignee: Hitachi, Ltd.Inventor: Katsunori Hayashi
-
Patent number: 7032130Abstract: In a system for performing maintenance/management on a subject machine with a maintenance/management control equipment via a network, a connecting section of the machine for the network is implemented in a duplex configuration including a main maintenance/management processing unit and an auxiliary maintenance/management processing unit equipped with respective power supply units independently from each other. When maintenance/management processing is changed over to the auxiliary maintenance/management processing unit from the main unit upon occurrence of fault in the latter, the auxiliary maintenance/management processing unit takes over the network address of the main maintenance/management processing unit for continuing the maintenance/management processing without coming under notice of the maintenance/management control equipment.Type: GrantFiled: February 15, 2002Date of Patent: April 18, 2006Assignee: Hitachi, Ltd.Inventors: Masanobu Yamamoto, Tomomi Ogawa
-
External storage device capable of selectively storing data in a semiconductor memory or a hard disk
Patent number: 7010719Abstract: An external storage device 110 includes a semiconductor memory 200, a hard disk 210 having an access speed lower than that of the semiconductor memory 200, a judgment part 275 for determining whether or not data can be stored in the semiconductor memory 200, and an access processing part 277 for compressing and storing data into the semiconductor memory 200 after it is determined that the data can be stored in the semiconductor memory 200, and for storing the write data into the hard disk 210 when it is determined that the data cannot be stored in the semiconductor memory 200. The storage capacity of the external storage device 110 is larger than the storage capacity of the semiconductor memory 200.Type: GrantFiled: November 5, 2002Date of Patent: March 7, 2006Assignee: International Business Machines CorporationInventors: Tanaka Nobuyoshi, Akihiro Ogura, Atsuya Takeuchi -
Patent number: 7003620Abstract: An appliance that includes a host device and a memory unit with a primary memory, and a method of operating the appliance. According to one aspect of the appliance, the primary memory is nonvolatile and the memory unit also includes a volatile memory a power sensor and a controller. When the power sensor detects interruption of power to the memory unit, the controller copies data selectively from the volatile memory to the primary memory. Power for this copying is provided by a secondary power source such as a battery or a capacitor. According to another aspect of the appliance, the appliance includes primary and secondary power sources, and the memory unit also includes a charge pump whose functions include both boosting power from the primary source for the primary memory and charging the secondary source.Type: GrantFiled: November 26, 2002Date of Patent: February 21, 2006Assignee: M-Systems Flash Disk Pioneers Ltd.Inventors: Meir Avraham, Menahem Lasser
-
Patent number: 7000159Abstract: A system and method for reducing the amount of time for a boot operation is provided that includes a test management module that divides the memory into multiple test blocks and then selects a limited number of test blocks to test during a boot operation, thereby decreasing the overall amount of memory test time.Type: GrantFiled: March 10, 2003Date of Patent: February 14, 2006Assignee: Dell Products L.P.Inventors: Jonathan T. Stern, Marc D. Alexander
-
Patent number: 7000147Abstract: A rapid self-error-check circuit of a computer power supply is disclosed, wherein a computer power supply is installed with a self-detecting device; an LED displaying light and detecting button are exposed on the casing of the power supply; thereby, the normality of the power supply can be detected by pressing a detecting button and then the result is displayed through the colors of the LED displaying light.Type: GrantFiled: February 6, 2002Date of Patent: February 14, 2006Assignee: Tekchain Development, Inc.Inventor: Chen-Hsiung Hsu
-
Patent number: 6993680Abstract: An object of the invention is to make it possible to secure data retained by a cache memory with high reliability without increasing the size or cost of a storage device. When a host-handling processor and a disk processor have recognized occurrence of a power failure, operation of a storage device is continued for about one minute on DC power that is supplied from a battery module. After a lapse of one minute from the occurrence of the power failure, the host-handling processor interrupts the connection between the storage device and a host. Then, the host-handling processor turns off a SW of a host I/F and the disk processor writes, to an HDD, data that have been written to a cache memory. After completion of this processing, the disk processor turns off a SW of the disk I/F and a SW of the HDD. Then, the disk processor causes the battery module to supply DC power only to the cache memory.Type: GrantFiled: February 2, 2004Date of Patent: January 31, 2006Assignee: Hitachi, Ltd.Inventor: Mitsuo Fukumori
-
Patent number: 6973025Abstract: A device for selecting a normal circuit in a communication system includes at least one pair of general function circuit modules, one pair of control function circuit modules, one pair of power supply modules, and a separate processor for controlling the device for selecting a normal circuit. Of the one pair of the control function circuit modules, the attempt for interchanging states of the control function circuit module in an active state and the control function circuit module in a standby state is made possible from the control function circuit module in the active state without fail. For stabilization of an output, the control function circuit module in the active state is switched to the standby state after the control function circuit module in the standby state is switched to the active state by the selecting circuit.Type: GrantFiled: May 3, 2001Date of Patent: December 6, 2005Assignee: LG Electronics Inc.Inventor: Ki Woong Koo
-
Patent number: 6973589Abstract: An intelligent electronic device (IED) is connected to interact with a power system to provide protection, control, and/or monitoring capabilities for the power system. The device includes a power system interface circuit for communicating with the power system and a processor coupled to the power system interface circuit. The device further includes memory storing software instructions performed by the processor for receiving electronic mail from a remote system through a communication link and for automatically transmitting electronic mail to the remote system through the communication link. The electronic mail may include information relating to operation of the power system or to operation of the intelligent electronic device.Type: GrantFiled: April 17, 2001Date of Patent: December 6, 2005Assignee: Cooper Industries, Inc.Inventors: Peter Michael Wright, Henry W. Painchaud, David Weinbach
-
Patent number: 6963998Abstract: Electronic apparatus, such as a personal computer, is described comprising main operative functionality and a power provisioning system for powering the apparatus from an external power source, the power provisioning system comprising:—a main power supply output for energizing the main operative functionality of the apparatus when said power provisioning system is connected to said external power source, and a standby power source for energizing a subset of the components of the apparatus when said main power supply output is not energized, the apparatus further comprising a self contained subsystem including a memory for storing at least one parameter reflecting an internal state of the apparatus, said self contained subsystem being powered by said standby power source and including an encoder for encoding the parameters in an output signal and a transducer for generating a wireless transmission from the output signal, which transmission can be detected in the vicinity of the apparatus, so as to enable the pType: GrantFiled: September 10, 2003Date of Patent: November 8, 2005Assignee: Hewlett-Packard Development Company, L.P.Inventor: Eric Owhadi
-
Patent number: 6947982Abstract: A remote session server, or bank of remote session servers, is provided to a bank of web servers. Each web server maintains a cache that contains all of the session information for all sessions being serviced by that server. The web server utilizes its local cache to perform all session services. The remote session server maintains a copy of all session information from all caches, and is updated whenever changes are made on each web server. If a web server should go down, an ongoing session can be transferred to a different web server. In such event, the new web server is able to obtain the previous status of the session from the remote web server and continues serving the session in a transparent manner.Type: GrantFiled: October 11, 2000Date of Patent: September 20, 2005Assignee: i2 Technologies US, Inc.Inventors: Conor McGann, Bruce Macartney-Filgate
-
Patent number: 6938175Abstract: A computer system has a normal mode for performing its work in a normal and regular manner and a standby mode which progresses to a power saving mode after storing information about the state of the work in process in a memory.Type: GrantFiled: May 21, 2001Date of Patent: August 30, 2005Assignee: Samsung Electronics Co., Ltd.Inventor: Yong-Hoon Lee
-
Patent number: 6938184Abstract: A file server for serving data of a client from a network. The server includes disk means for storing the data. The server includes means for receiving the data from the network and sending an acknowledgment that the data has been stored to the client through the network but before the data has been stored in the disk means, the receiving means in communication with the disk means. The server includes a memory for storing the data until the data is stored in the disk means, the receiving means is in communication with the memory. The server includes a first power source for provide electricity to the disk means, the memory and the receiving means, the first power source in electrical communication with the disk means, the memory and the receiving means. The server includes a second power source that provides electricity to the memory when the first power source fails, the second power source in communication with the memory. A method for serving data of a client from a network.Type: GrantFiled: October 17, 2002Date of Patent: August 30, 2005Assignee: Spinnaker Networks, Inc.Inventor: George Totolos, Jr.
-
Patent number: 6931522Abstract: A method and system for booting a computer system to a known state at system start-up or in the event of an error or failure while the system is running or operating. The method and system of the invention automatically executes all the necessary procedures to boot the computer system to a known state, without any human intervention. The invention uses information about the state of the computer system during previous boot attempts to determine the logical steps performed to ensure that the system boots to a known state.Type: GrantFiled: November 15, 2000Date of Patent: August 16, 2005Assignee: Microsoft CorporationInventors: Kartik N. Raghavan, Ryan W. J. Waite, Thomas G. Phillips, Paul C. Sutton
-
Patent number: 6928567Abstract: Battery information is transmitted from a recording and playback apparatus to a host computer. In the host computer, based on the time for which operation can be continued, corresponding to the current operating status and the remaining battery level, which is stored in battery information, a warning is output, the data of a cache memory is written, data writing prohibition is set, and a forced closing process is performed. With this construction, in a system formed of a recording and playback apparatus, such as a CD-R/RW drive unit and a personal computer, a proper system operation corresponding to the remaining battery level of the recording and playback apparatus is obtained, and the data recorded in the recording medium is prevented from being destroyed as a result of operation stopping due to, for example, the remaining battery level becoming zero.Type: GrantFiled: April 27, 2001Date of Patent: August 9, 2005Assignee: Sony CorporationInventor: Hidekazu Nakai
-
Patent number: 6925581Abstract: A method for monitoring control units in a network is described, each control unit including a security function for detecting errors, a monitoring routine being assigned to each error and a plurality of monitoring routines being available, a shutdown matrix which is subdivided according to errors being assigned to the security function, at least one of the monitoring routines being selected from the plurality of monitoring routines according to the errors present in the shutdown matrix, depending on at least one first condition, the shutdown matrix containing various shutdown strategies, and on detection of at least one error by the monitoring routine, one of the shutdown strategies is carried out in the network, depending on at least the first condition and/or at least one second condition, at least one control unit in the network being shut down.Type: GrantFiled: December 20, 2001Date of Patent: August 2, 2005Assignee: Robert Bosch GmbHInventor: Mathias Hommel
-
Patent number: 6904541Abstract: An electronic system has critical circuitry, non-critical circuitry having a first section and a second section, and a power sub-system. The power sub-system has a first power assembly, a second power assembly, and a set of connections. The set of connections is configured to connect the first and second power assemblies to the critical circuitry and the non-critical circuitry such that, when the first and second power assemblies operate to power the critical and non-critical circuitry through the set of connections, (i) a failure of only the second power assembly results in the first power assembly continuing to power the critical circuitry and the first section of the non-critical circuitry, and (ii) a failure of only the first power assembly results in the second power assembly continuing to power the critical circuitry and the second section of the non-critical circuitry.Type: GrantFiled: August 10, 2001Date of Patent: June 7, 2005Assignee: EMC CorporationInventors: Robert MacArthur, Brian Gallagher, Lawrence Pignolet
-
Patent number: 6865690Abstract: A power module for a CNI avionics system includes a rechargeable back-up battery (17) and a battery charger (9) in a back-up battery channel, a power conversion unit (11, 25, 27 and 29) in a power conditioning channel, and a semiconductor switch (23) for selectively coupling either the output of the power conditioning channel unit or the back-up battery channel through to the module output (24) and the electronics of external LRM's of the cryptographic section of the CNI avionics system, and a microcontroller (14) for controlling voltages and spurious signal emanations. Sensors (51, 52, 54 & 55) provide information to the microcontroller. The microcontroller senses the state of prime power, current draw on the cryptographic devices and adjusts power output between the battery and power supply in real time.Type: GrantFiled: June 21, 2001Date of Patent: March 8, 2005Assignee: Northrop Grumman CorporationInventor: Michael J. Kocin
-
Patent number: 6832324Abstract: A power supply unit controller for a rack enclosure in which a plurality of devices communicate via a backplane is disclosed. The controller reads signal(s) indicative of output supply level(s) being provided to the backplane by a power supply unit associated the the power supply unit controller and stores value(s) associated with the signal(s). The controller further stores a scaling value associated with a respective signal and dependent on the power supply unit, and a power supply unit serial number. The controller is responsive to a request from an SES processor to return a state of the associated power supply unit to the SES processor, the state including a combination of: a summary of the current status of the power supply unit, the value (s), the scaling value(s), and the power supply unit serial number, according to the SES processor request.Type: GrantFiled: May 16, 2001Date of Patent: December 14, 2004Assignee: Richmount Computers LimitedInventors: Barrie Jeremiah Mullins, Reuben Michael Martinez
-
Patent number: 6829193Abstract: A power supply control circuit for use in a semiconductor storage device is provided. The power supply control circuit comprises a first power supply circuit connected to all subarrays of the semiconductor storage device, for supplying power to all the subarrays, an operation mode determination circuit for determining an operation mode in which the semiconductor storage device is placed and for generating a first block selection signal based on address information applied thereto according to the determined operation mode, a row control circuit disposed for each of all the subarrays, for generating a second block selection signal based on the first block selection signal according to the determined operation mode, and a second power supply circuit disposed for each of all the subarrays, for supplying power to a corresponding one of all the subarrays according to the second block selection signal from a corresponding row control circuit.Type: GrantFiled: June 5, 2002Date of Patent: December 7, 2004Assignees: Renesas Technology Corp., Mitsubishi Electric Engineering Company LimitedInventor: Yasuhiro Ishizuka
-
Patent number: 6829724Abstract: A method for battery condition testing. In one embodiment, the method is comprised of interrupting AC power service to a data storage system. The interruption causes an exhaustible power source to provide operating power to the data storage system. The exhaustible power source is coupled to said data storage system. The exhaustible power source is adapted to provide operating power to the data storage system when the AC power service to the data storage system is interrupted. The method is further comprised of discharging the exhaustible power source by operating the data storage system with the exhaustible power source for a specified period of time less than full discharge but sufficient to fully flush the cache. The exhaustible power source passes the condition testing provided the exhaustible power source provides operating power to the data storage system for the specified period of time.Type: GrantFiled: September 18, 2002Date of Patent: December 7, 2004Assignee: Sun Microsystems, Inc.Inventors: Mark Farabaugh, Michael D. Derbish
-
Patent number: 6826433Abstract: An apparatus for and a method of operating an automation system. A processing unit subjects useful information which is received via a telegram to a user designated logic operation and drives an output channel in accordance with a result of the logic operation. The processing unit monitors a time sequence of process data transmitted with the useful information and drives the output channel only when the time sequence lies within predetermined tolerances. A monitoring unit monitors the processing unit and shifts the output channel to a safe condition as soon as a malfunction of the processing unit is detected. The output channel may include a readback channel which reads back a signal applied to the output channel whereby the monitoring unit compares the applied signal and the readback signal and shifts the output channel to a safe state if the applied signal and the readback signal differ.Type: GrantFiled: November 7, 2000Date of Patent: November 30, 2004Assignee: Siemens AktiengesellschaftInventors: Herbert Barthel, Johannes Birzer, Heiner Fuchs, Hartmut von Krosigk, Hartmut Schuetz, Andreas Schenk, Armin Trauth, Karl Weber, Joerg-Peter Zaech
-
Patent number: 6823475Abstract: Processor modules (2) are supported side-by-side with one another to slide in and out of a cabinet (1) on tracks (6, 7), each module (2) including a PC-CPU motherboard (11) and a hard-disk unit (16) mounted on a metal plate (3). Power is supplied to all the modules (2) in parallel from two power-supply units (18) mounted in the back of the cabinet (1), each comprising a pair of power-supply modules (19). The pairs of power-supply modules (19) supply power in parallel with one another to the processor modules (2). Diode circuitry (20) is included in each power-supply module (19) to isolate that power-supply module (19) from its paired power-supply module (19) in the event that a fault occurs by which the output voltage of the respective power-supply module (19) fall below that of the power-supply module (19) with which it is paired.Type: GrantFiled: November 14, 2000Date of Patent: November 23, 2004Inventor: Robin Harker
-
Patent number: 6816981Abstract: A disk array device maintains data reliability with few performance degradation problems. In a RAID 4 or RAID 5 disk array device, redundant data created during disk degeneration with a device control module is transferred to a memory of a subsystem control module. The memory is backed up with a battery. The redundant data is held in memory until a writing operation to disk drives is completed. Then, when recovering after a momentary power supply interruption, the write data and parity data stored in the memory are written out without writing data from the disk drive. When recovering after a momentary power supply interruption and the disks are normal, the redundant same-group data is read from disk drives other than those on which the data that is to be written and the parity are stored and based on those and the write data, new redundant data is created and written to the object disk.Type: GrantFiled: February 15, 2001Date of Patent: November 9, 2004Assignee: Fujitsu LimitedInventors: Hirofumi Morita, Takashi Ishida
-
Patent number: 6799224Abstract: The information server system incorporates a high speed, microcomputer based server running industry standard operating system software enhanced to include functionality directed to operation of a new disk array controller, which controls the physically independent or integral disk storage device array, and communications interface. The disk array controller subsystem controls and communicates with the disk storage device array with a Fiber Channel protocol. The disk storage device array incorporates a plurality of disk storage devices with a corresponding number of bypass interface cards configured to facilitate the on-line addition, removal and replacement of disk storage devices.Type: GrantFiled: August 30, 2000Date of Patent: September 28, 2004Assignee: Quad ResearchInventor: Richard Dellacona
-
Patent number: 6795885Abstract: Apparatus for connecting a plurality of electronic devices with corresponding backplanes to improve reliability of accessing the devices are described. In one embodiment, the apparatus includes first and second backplanes having connectors for at least one device. A device having a plurality of data paths has a first data path coupled to a data path connector of the first backplane. A second data path of the device is coupled to a data path connector of the second backplane. Alternatively, a Y-adapter is used to connect a single data path device to data path connectors of distinct backplanes. In various embodiments, the backplanes lie in a common plane. Alternatively, the backplanes lie in distinct parallel planes.Type: GrantFiled: June 21, 2001Date of Patent: September 21, 2004Assignee: Hewlett-Packard Development Company, L.P.Inventors: James J. deBlanc, David M. Dickey, James L. White
-
Publication number: 20040158771Abstract: A computer system is provided having at least one processing resource, at least one power resource and at least one redundant power resource. The at least one processing resource is operable to exploit a greater level of power than is provided by the at least one power resource. The at least one processing resource is configured to exploit power provided by both the at least one power resource and the at least one redundant power resource, at a time when both the at least one power resource and the at least one redundant power resource are both operable to provide power.Type: ApplicationFiled: February 10, 2003Publication date: August 12, 2004Inventors: Paul J. Garnett, Andrew S. Burnham
-
Publication number: 20040158772Abstract: A systematic approach is presented for the development and implementation of cost-effective transmission asset maintenance strategies. The overall concept and methodology are based on transmission reliability and risk management and address the value of preventive maintenance activities. This may help electric network utilities conduct maintenance policy assessment, region-wide criticality analysis, and optimal maintenance resource allocation and task scheduling.Type: ApplicationFiled: December 23, 2003Publication date: August 12, 2004Applicant: ABB,Inc.Inventors: Jiuping Pan, Reynaldo Nuqui, Le Tang
-
Publication number: 20040153760Abstract: The described program controlled unit has first supply voltage connections for applying a first supply voltage to the program controlled unit and second supply voltage connections for applying a second supply voltage to the program controlled unit. The full OCDS module or a part of the OCDS module is supplied with power by the second supply voltage. The remaining components of the program controlled unit are supplied with power by the first supply voltage. This means that the entire OCDS module or part of the OCDS module can actually be supplied with power, before the time at which the remaining parts of the program controlled unit are supplied with power. A debugger supplies the OCDS module with control information that prescribes a particular state of the OCDS module.Type: ApplicationFiled: September 25, 2003Publication date: August 5, 2004Inventor: Albrecht Mayer
-
Publication number: 20040153758Abstract: A protective relay system for a power system having protective relays at specific locations in the system. Each location has specific setting information for the relay for operation of the relay at that location. Each relay in the protective relay system includes in memory all of the setting information for all of the locations in the power system. Connection of the relay to a key identifier member at a desired location, in one embodiment, provides an identification of that location to the relay. The identification may also be provided by a system computer to which the relay is connected at the desired location. The relay uses the information to obtain the correct setting information for the desired location from its memory for proper protection operation at the desired location, eliminating programming of replacement relays.Type: ApplicationFiled: August 5, 2002Publication date: August 5, 2004Inventor: David E. Whitehead
-
Publication number: 20040153759Abstract: An operation detecting part detects operation of a power switch, and a backup device performs a backup operation enabling a predetermined amount of power supply even after the power switch has cut off the power supply. Upon detection of power cut off by the operation detecting part, while the backup device performs the backup operation, the control part saves predetermined data stored in a volatile storage device in an apparatus externally via a network, or into a non-volatile storage device.Type: ApplicationFiled: April 9, 2003Publication date: August 5, 2004Inventor: Akihiko Motegi
-
Patent number: 6754835Abstract: A method and system for providing computer system for use in a network having a plurality of computer systems linked in a chain is disclosed. The method and system include providing a power supply, at least one input and at least one output for the computer system. The at least one input is for receiving power from a first portion of the plurality of computer systems and for providing power from the power supply to the first portion of the plurality of computer systems. The at least one output is for providing power from the power supply to a second portion of the plurality of computer systems and for receiving power from the second portion of the plurality of computer systems. In one aspect, the first portion of the plurality computer systems includes an upstream computer system and the second portion of the plurality computer systems includes a downstream computer system.Type: GrantFiled: December 15, 2000Date of Patent: June 22, 2004Assignee: International Business Machines CorporationInventors: Justin Potok Bandholz, Matthew S. Michaels
-
Publication number: 20040103343Abstract: A method and related computer for processing suspend to RAM (STR) during power failure. The computer operates with power supplied by an external power source, and the computer includes a battery. When the computer stops receiving power from the external power source and stops operating, the battery will supply the power required for STR, such that when the computer again receives power from the external source, the computer will restore operation rapidly from STR.Type: ApplicationFiled: March 20, 2003Publication date: May 27, 2004Inventors: Wei-Jer Wu, Shih-Chin Lai, Jiann-Jou Chen
-
Patent number: 6735718Abstract: A network switch and method of switching are provided, in which first and second signal converters convert electrical signals to optical signals and vice versa. The network switch monitors alarm contacts and power drawn by the first and second signal converters, and switches from one to the other in the case of an alarm condition or power loss. In order to force a corresponding switch at the remote end, power is removed from one of the signal converters in order to force an alarm in the corresponding signal converter at the remote end.Type: GrantFiled: December 21, 2001Date of Patent: May 11, 2004Assignee: Hubbell IncorporatedInventor: Gary M. Miller