Derived From Analysis (e.g., Of A Specification Or By Stimulation) Patents (Class 714/33)
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Publication number: 20120284567Abstract: A method includes receiving a first processing request for an application program under test. The method includes generating a second processing request for a model of the application program, wherein the second processing request is equivalent to said first processing request. The method includes communicating said first and second requests to said application program under test and said model of the application program respectively. The method includes receiving a first response data set from the application program under test and a second response data set from the model of the application program. The method includes comparing said first and second response data sets and generating a success indication if said comparing said first and second response data sets does not identify a difference. The method includes generating an error indication if said comparing said first and second response data sets identifies a difference between the first and second data sets.Type: ApplicationFiled: July 20, 2012Publication date: November 8, 2012Applicant: International Business Machines CorporationInventors: Thomas J.G. Bailey, John W. Duffell, Mark S. Taylor
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Patent number: 8306802Abstract: A method for digital circuit design. The first step of the process is the step of providing a circuit design in the form of a hardware definition language. Then, the process produces a binary simulation of the design by setting out for each unit of time during execution of the hardware design the a control state and a program state of the design and assigns a symbol to each signal of the design. The process proceeds by executing a symbolic simulation of the design, concluding with identifying and capturing the combinational logic expression of the simulation output and the next state functions of the simulation.Type: GrantFiled: November 2, 2006Date of Patent: November 6, 2012Assignee: Synopsys, Inc.Inventors: Yunshan Zhu, James Herbert Kukula, Robert F. Damiano, Joseph T. Buck
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Patent number: 8285509Abstract: A method of testing an electronic device is disclosed. The electronic device includes an embedded controller. The method includes storing a type information of the embedded controller and transmitting the type information to an application module through a data module. The application module analyzes the type information to obtain a command. The application module sends the command to the embedded controller. The embedded controller returns a testing result to the application module. The application module generates a testing report after the application module compares the testing result with a predetermined result.Type: GrantFiled: March 2, 2010Date of Patent: October 9, 2012Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.Inventor: Qing-Hua Liu
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Publication number: 20120254665Abstract: A system and method for generating functional tests to verify code migrated from a first host to a second host. In one embodiment, source code is analyzed in order to generate functional tests that can be used for testing the re-hosted application. In particular, user-input scenarios are extracted from the source code and system output responses are determined based on the user-input scenarios. Functional tests can then be generated using the extracted user-input scenarios and output responses to ensure that the re-hosted application responds in a like manner.Type: ApplicationFiled: May 19, 2011Publication date: October 4, 2012Applicant: Infosys Technologies Ltd.Inventors: Anjaneyulu Pasala, Sharal Nisha D'Souza, Amar Lakshmi Gejje
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Patent number: 8279072Abstract: A method for determining a maintenance interval for a consumable part and/or for equipment containing a consumable part obtains a plurality of measurements of temperature of the consumable part, receives each of the measurements at a totalizing unit, correlates each of the measurements to one of a plurality of temperature subranges, accumulates for each of the subranges an amount of time the measurements of temperature were correlated to each of the subranges, determines a total time by aggregating the accumulated time for each subrange with a weighting function, and generates a signal to prompt a maintenance event when the total time equals or passes a runtime setpoint. In supplement to or in alternative to the above, the method also correlates a subrange of two sequential measurements, indexes a breakpoint register if the correlated subranges are different, and generates a signal to prompt a maintenance event when a value of the breakpoint register equals or passes a breakpoint setpoint.Type: GrantFiled: March 16, 2009Date of Patent: October 2, 2012Assignee: MRL Industries Inc.Inventors: Kevin B. Peck, Bjorn W. Larsson
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Patent number: 8276020Abstract: Systems and methods for automated determination of error handling. Data is received including one or more procedural operations to be tested. A first test is run on the data to capture one or more first tracebacks, where each traceback is associated with a procedural operation. A determination is made as to whether each captured first traceback is unique, where unique tracebacks are added to a unique traceback list. An error condition is simulated on each unique traceback on the unique traceback list by running a second test. The second test is run once for each unique traceback. One or more second tracebacks are captured during each run of the second test. When a unique traceback being tested matches a captured second traceback, an error code is returned and the second test may be run to completion. Errors encountered during each iteration of the second test running to completion are identified.Type: GrantFiled: July 13, 2010Date of Patent: September 25, 2012Assignee: SAS Institute Inc.Inventor: Claire Cates
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Patent number: 8271838Abstract: A method for detecting security intrusions and soft faults in a software system includes receiving a multi-dimensional performance signature built from operating system metrics sampled by a software system monitoring infrastructure, associating a plurality of buckets with each component of the performance signature, comparing a component of the sampled performance signature to an expected value for the performance signature component, where a bucket for the performance signature component is incremented if the sampled performance signature component exceeds the corresponding expected value, and the bucket for the performance signature component is decremented if the sampled performance signature component is less than the corresponding expected value, executing a security alert notification when the bucket for the performance signature component exceeds a first threshold, and executing a soft-fault notification when the bucket for the performance signature component exceeds a second threshold, where the firstType: GrantFiled: May 12, 2010Date of Patent: September 18, 2012Assignee: Siemens CorporationInventors: Alberto Avritzer, Rajanikanth Tanikella
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Patent number: 8271835Abstract: The present invention discloses an apparatus and a method for diagnosing abnormal conditions, that quantitatively considers acquisition difficulties between abnormal symptoms provided on a computer screen and quantifies acquisition difficulties of the abnormal symptoms through distinctiveness of measuring devices to exactly diagnose the abnormal conditions even under an improved control environment, making it possible for a user to rapidly and easily diagnose the abnormal conditions that may be generated from a complicated device. With the present invention, the abnormal conditions are diagnosed using the sequential diagnosis technique and the Boolean logic between the abnormal symptoms, making it possible to effectively diagnose the abnormal conditions even under masking effects that may be generated between the abnormal symptoms.Type: GrantFiled: December 24, 2008Date of Patent: September 18, 2012Assignee: Korea Atomic Energy Research InstituteInventors: Joon-Eon Yang, Won-Dea Jung, Jae-Whan Kim, Jin-Kyun Park
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Patent number: 8261122Abstract: In some embodiments, a method is provided and a computer accessible medium comprising instructions which, when executed, implement the method is also provided. A recovery time for recovery of at least one asset is estimated responsive to at least one metric represented in metric data. The metric data is accumulated prior to the estimation. In various embodiments, data protection operations may include one or more of asset copy operations, recovery operations, etc. The estimated recovery time may be reported to a user. In other embodiments, metric data may be used to validate recoverability. In still other embodiments, recovery metrics may be calculated and displayed to the user along with corresponding recovery targets and objectives.Type: GrantFiled: June 30, 2004Date of Patent: September 4, 2012Assignee: Symantec Operating CorporationInventors: Steven Kappel, Shelley A. Schmokel, Guido Westenberg, Branka Rakic, Peter A. Barber, Julianne M. Urban, Nancy L. Bayer, Linda Cerni
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Patent number: 8250408Abstract: A method of automated diagnosis of a distributed system having a plurality of computing systems hosting replicated applications thereon is provided. The method includes deriving at least one diagnosis model correlating first metrics relating to a first application instance on a first one of the plurality of computing systems to a state of a system health indicator of the first application instance; determining whether the at least one diagnosis model is sufficiently accurate based on a probability of a predicted system health state of the first application instance given the first metrics and an actual system health state of the first application instance; and upon the determining that the at least one diagnosis model is sufficiently accurate, transferring the at least one diagnosis model to a second one of the plurality of computing systems for diagnosis of a second application instance on the second computing system that is a replicate of the first application instance.Type: GrantFiled: April 2, 2007Date of Patent: August 21, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventors: Ira Cohen, Chengdu Huang
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Patent number: 8245080Abstract: A software testing system includes a test interface and a verification interface. The test interface receives a first processing request for the application program under test. The test interface generates a second processing request equivalent to the first processing request, and communicates the first and second processing requests to the application program under test and a model of the application program, respectively. A verification interface compares a first and a second response data set received, respectively, from the application program under test and the model. The verification interface generates an error indication if a difference is determined from the comparison of the first and second response data sets. If a difference is not determined from the comparison, then the verification interface generates a success indication. The verification interface communicates either the success or error indication to the test interface.Type: GrantFiled: December 8, 2009Date of Patent: August 14, 2012Assignee: International Business Machines CorporationInventors: Thomas J. G. Bailey, John W. Duffell, Mark S. Taylor
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Patent number: 8234517Abstract: Various techniques are described for improving the performance of a shared-nothing database system in which at least two of the nodes that are running the shared-nothing database system have shared access to a disk. Specifically, techniques are provided for recovering the data owned by a failed node using multiple recovery nodes operating in parallel. The data owned by a failed node is reassigned to recovery nodes that have access to the shared disk on which the data resides. The recovery logs of the failed node are read by the recovery nodes, or by a coordinator process that distributes the recovery tasks to the recovery nodes.Type: GrantFiled: April 23, 2004Date of Patent: July 31, 2012Assignee: Oracle International CorporationInventors: Roger J. Bamford, Sashikanth Chandrasekaran, Angelo Pruscino
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Patent number: 8234618Abstract: A test system collects passing event data and failing event data, and merges the collected data into passing subsequences and failing subsequences, respectively. The test system identifies an overlap area between the passing subsequence and the failing subsequence in regards to time slices and tracepoint slices, and creates passing transactions and failing transactions using the event data corresponding to the overlap area. Next, the test system detects a timing discrepancy between the first passing transaction relative to the second passing transaction compared with the first failing transaction relative to the second failing transaction. The test system then reports the detected timing discrepancy, which allows a test engineer to perturb the test program in order to more frequently catch intermittent failures caused by asynchronous timing conditions.Type: GrantFiled: November 3, 2009Date of Patent: July 31, 2012Assignee: Freescale Semiconductor, Inc.Inventors: Mrinal Bose, Jayanta Bhadra, Hillel Miller, Edward L. Swarthout, Ekaterina A. Trofimova
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Patent number: 8230396Abstract: A method is disclosed to debug a computer program. The method provides a computer program comprising source code, and a listing of that source code. The method further provides a computing device comprising a data storage medium, and stores the computer program in that data storage medium. The method then runs the computer program, and subsequently detects an error condition. The method creates and saves to the data storage medium a dump file comprising (N) save areas. Using information abstracted from the dump file and the source code listing, the method reproduces the source code execution at the time the error condition was detected.Type: GrantFiled: January 6, 2006Date of Patent: July 24, 2012Assignee: International Business Machines CorporationInventors: David Charles Reed, Max Douglas Smith
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Patent number: 8230263Abstract: A method comprising the steps of (A) generating a code, (B) applying one or more constraint constructs to the code, (C) generating a coverage code and a second code in response to applying the constraint constructs to the code, (D) generating a third code in response to the code, and (E) generating one or more assembly language tests in response to the second code.Type: GrantFiled: September 18, 2008Date of Patent: July 24, 2012Assignee: LSI CorporationInventors: Debaditya Mukherjee, Anil Raj Gopalakrishnan
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Patent number: 8219854Abstract: The present invention extends to methods, systems, and computer program products for validation configuration of distributed applications. Embodiments of the invention provide a system framework for identifying root causes of configuration errors and best-practice incompliance of distributed applications. The system framework provides both platform provider and customer a powerful and consistent method to create, extend, and utilize a tool that simplifies the configuration troubleshooting experience. Using the system framework, a user is able to access more information about applications and to troubleshoot multiple applications at the same time without having to load or activate any of the applications. In addition, users are able to add custom rules to identify commonly occurring configuration problems.Type: GrantFiled: March 24, 2010Date of Patent: July 10, 2012Assignee: Microsoft CorporationInventors: Sata Busayarat, Vladimir Pogrebinsky
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Patent number: 8214690Abstract: A method is described and represented for testing a control apparatus with a test device, where the control apparatus has at least one state variable and at least one actual functionality that contains a time dependency, and the control apparatus and the test device are connected to each other via a signal interface. The problem of the present invention is to prevent—at least partially—the disadvantages known from the state of the art, and, particularly, to provide a method for testing a control apparatus, which allows as simple and flexible an acquisition of the target functionality of a control apparatus is possible, and which takes into account the time dependency of the target functionality as comprehensively as possible during the test case generation.Type: GrantFiled: February 11, 2010Date of Patent: July 3, 2012Assignee: dSPACE digital signal processing and control engineering GmbHInventors: Klaus Lamberg, Christine Thiessen, Matthias Schnelte
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Patent number: 8205173Abstract: A method includes providing a plurality of failure dies, and performing a chip probing on the plurality of failure dies to generate a data log comprising electrical characteristics of the plurality of failure dies. An automatic net tracing is performed to trace failure candidate nodes in the failure dies. A failure layer analysis is performed on results obtained from the automatic net tracing. Physical failure analysis (PFA) samples are selected from the plurality of failure dies using results obtained in the step of performing the failure layer analysis.Type: GrantFiled: June 17, 2010Date of Patent: June 19, 2012Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sunny Wu, Yen-Di Tsen, Monghsung Chuang, Fu-Min Huang, Jo Fei Wang, Jong-I Mou
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Patent number: 8183881Abstract: Method and apparatus for using configuration memory for buffer memory is described. Drivers associated with a portion of the configuration memory are rendered incapable of creating a contentious state irrespective of information stored the portion of configuration memory. Configuration data is received in a non-configuration data format and buffered in the portion of the configuration memory.Type: GrantFiled: March 29, 2004Date of Patent: May 22, 2012Assignee: Xilinx, Inc.Inventors: Benjamin J. Stassart, Stephen M. Trimberger
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Publication number: 20120117427Abstract: Verification of a system-under-test (SUT) supporting the functionality of operating a self modifying code is disclosed. A generator may generate a self modifying code. In response to identification that a simulator is about to simulate code generated by the self modifying code, the simulator may simulate the execution in a “rollover mode”. The code may include instruction codes having variable byte size, branching instructions, loops or the like. The simulator may further simulate execution of an invalid instruction. The simulator may perform rollback the simulation of the rollover mode in certain cases and avoid entering the rollover mode. The simulator may perform rollback in response to identifying a termination condition, as to insure avoiding endless loops. The simulator may perform rollback in response to reading an initialized value that is indefinite.Type: ApplicationFiled: November 9, 2010Publication date: May 10, 2012Inventors: Eli Almog, Oz Dov Hershkovitz, Christopher Krygowski
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Patent number: 8174996Abstract: A method may include receiving a first set of parameters associated with a test environment, the test environment including a test system for testing a network, receiving a test objective, conducting a first test case based on the received first set of parameters and the test objective, automatically determining, by the test system, whether the test objective has been satisfied based on a first test result associated with the first test case, and automatically adapting, by the test system, a second test case based on the first test result when it is determined that the test objective has not been satisfied.Type: GrantFiled: June 24, 2008Date of Patent: May 8, 2012Assignee: Verizon Patent and Licensing Inc.Inventor: Hassan M. Omar
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Patent number: 8166433Abstract: A floating net inspection method includes: providing a netlist which describes a circuit structure of an application circuit, the application circuit including a plurality of transistors; coupling a power supply port and a signal input port of the application circuit to voltage sources, respectively; generating test voltages respectively through the voltage sources, such that the test voltages are applied to the transistors, the test voltages being larger than a reference voltage; and determining whether a connecting node of one of the transistors is floating on the basis of whether a voltage of the connecting node is larger than the reference voltage.Type: GrantFiled: June 29, 2009Date of Patent: April 24, 2012Assignee: Realtek Semiconductor Corp.Inventor: Yu-Lan Lo
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Publication number: 20120089873Abstract: Systems and method provide a coverage-guided systematic testing framework by dynamically learning HaPSet ordering constraints over shared object accesses; and applying the learned HaPSet ordering constraints to select high-risk interleavings for future test execution.Type: ApplicationFiled: April 7, 2011Publication date: April 12, 2012Applicant: NEC Laboratories America, Inc.Inventors: Chao Wang, Aarti Gupta
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Publication number: 20120089872Abstract: A method and system for subnet defect diagnostics through fault compositing is disclosed. Each fault contained in callout data comprises explain failure data and conflict counts. A first fault on a fan-out sink of a fan-out net that explains a first failure is selected from the callout data. A second fault on a different sink of the same fan-out net that explains a second failure that the first fault does not explain is selected. The first fault and the second fault are composited to yield a composite fault. The composite fault unions the failures explained by the first fault with the failures explained by the second fault. A composite conflict count is generated by combining the conflict count of the first fault and the conflict count of the second fault, and a score is assigned to the composite fault. A best candidate composite fault is determined based on the score.Type: ApplicationFiled: October 12, 2010Publication date: April 12, 2012Inventors: Thomas Webster Bartenstein, Joseph Michael Swenton
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Patent number: 8156379Abstract: A method of assessing a computer program under actual working conditions according to one embodiment comprises executing the computer program multiple times under actual working conditions, in response to each unhandled exception encountered during execution of the computer program, creating a corresponding stack frame signature to characterize the state of the program, and comparing the stack frame signatures to determine which unhandled exceptions are likely to have resulted from similar features.Type: GrantFiled: November 20, 2007Date of Patent: April 10, 2012Assignee: Techtracker, Inc.Inventors: Scott Clementson Elliott, Kenneth A. Gengler
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Publication number: 20120084605Abstract: Systems, methods, and machine readable and executable instructions are provided for replaying captured network traffic. A method for replaying captured network traffic can include replaying multiple captured network traffic files simultaneously on the same network device, the captured network traffic files including original network traffic captured from N original connections between C original clients and S original servers. During replaying, rewriting IF addresses and/or port number information of data packets comprising the original network traffic to reflect test network traffic from M test connections between X test clients and Y test servers, where at least X is different than C or Y is different than S. The method further includes modifying checksums, during replaying, to correct values corresponding to the rewritten IF addresses and port number information. N, C, S, M, X, and Y are positive integers.Type: ApplicationFiled: October 4, 2010Publication date: April 5, 2012Inventors: Hanan Shilon, Michael Gopshtein, Nir Shilon
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Patent number: 8149016Abstract: An interface circuit electronically connects a processor and a card reader. The interface circuit includes a clock circuit, a reset circuit, and an I/O circuit. The clock circuit may transmit a clock signal transmitted from the processor to the card reader, and includes a first bipolar junction transistor (BJT). The reset circuit may transmit a reset signal transmitted from the processor to the card reader, and includes a second BJT. The I/O circuit may transmit data transmitted from the processor to the card reader, and includes a third BJT and a fourth BJT.Type: GrantFiled: December 7, 2010Date of Patent: April 3, 2012Assignee: Hon Hai Precision Industry Co., Ltd.Inventor: Huang-Yu Chiang
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Patent number: 8151142Abstract: Apparatus and methods for intercepting and analyzing threads are disclosed. In one embodiment, a thread data recorder is configured to instrument one or more existing functions by modifying computer executable instructions in the functions to intercept threads calling the functions. In one possible implementation, the number of existing functions instrumented can be reduced by instrumenting choke point functions. The instrumented functions can also capture data associated with the threads as the threads execute at the function. This data can be saved to memory and compressed into logs. In one aspect, the data can be saved and/or compressed at a time when processor resources are being used at or below a predetermined level. The captured data can be used to analyze a functioning of a computer system in which the threads were produced.Type: GrantFiled: October 31, 2007Date of Patent: April 3, 2012Assignee: Microsoft CorporationInventors: Chad Verbowski, Brad Daniels, John Dunagan, Shan Lu, Roussi Roussev, Juhan Lee, Arunvijay Kumar
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Patent number: 8146086Abstract: A method for gathering operational metrics can include the step of identifying a host within a grid environment, wherein the host can be a software object. A ghost agent can be associated with the host. The ghost agent can replicate actions of the host. Operational metrics for at least a portion of the replicated actions can be determined. The operational metrics can be recorded. The host can move within the grid environment. The ghost agent can responsively move in accordance with movement of the host.Type: GrantFiled: December 31, 2008Date of Patent: March 27, 2012Assignee: International Business Machines CorporationInventors: Thomas E. Creamer, Bill H. Hilf, Neil Katz, Victor S. Moore
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Patent number: 8140904Abstract: A first test script that includes at least one first step for executing a test of a test portal is provided in a computing device. An indication that an event has occurred in response to the test is received in the computing device. A second test script that includes at least one second step for executing the test is generated in the computing device, the at least one second step being at least in part a response to the event.Type: GrantFiled: November 2, 2009Date of Patent: March 20, 2012Assignee: Verizon Patent and Licensing Inc.Inventor: Manohar Kesireddy
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Patent number: 8135990Abstract: Network survivability is quantified in such a way that failure cases can be compared and ranked against each other in terms of the severity of their impact on the various performance measures associated with the network. The degradation in network performance caused by each failure is quantified based on user-defined sets of thresholds of degradation severity for each performance measure. Each failure is simulated using a model of the network, and a degradation vector is determined for each simulated failure. A comparison function is defined to map the degradation vectors into an ordered set, and this ordered set is used to create an ordered list of network failures, in order of the network degradation caused by each failure.Type: GrantFiled: August 6, 2007Date of Patent: March 13, 2012Assignee: OPNET Technologies, Inc.Inventors: Vanko Vankov, Vinod Jeyachandran, Pradeep K. Singh, Alain J. Cohen, Shobana Narayanaswamy
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Patent number: 8132054Abstract: The present invention relates to page automation testing method and apparatus. According to one aspect of the invention, there is provided a method for automatically testing a page, comprising: determining based on a predetermined policy a setting value of wait time regarding whether the page is opened successfully; and conducting the page testing based on the setting value of wait time as determined.Type: GrantFiled: May 15, 2009Date of Patent: March 6, 2012Assignee: International Business Machines CorporationInventors: Xiao Jing Fu, Xue Chao Li, Shou Hui Wang
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Patent number: 8132053Abstract: The present disclosure generally relates to the testing of a system that includes software or hardware components. In some embodiments, a testing framework generates a set of test cases for a system under test using a grammar. Each test case may perform an action, such as provide an input to the system under test, and result in an output from the system under test. The inputs and outputs are then compared to the expected results to determine whether the system under test is performing correctly. Prior to generating the set of test cases from the grammar, the testing framework processes the grammar to identify attributes of the test cases to be derived from the grammar and facilitates the modification of the grammar.Type: GrantFiled: February 27, 2009Date of Patent: March 6, 2012Inventors: Nathan John Walter Kube, Daniel Hoffman, Kevin Yoo
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Patent number: 8117499Abstract: A test template comprising a repetitive block instruction is translated to a stimuli to be used by a target computerized system or a simulator of such a system. The translation comprises reusing translated portion of the repetitive block instruction in order to reduce translation time and to hasten testing phase of the target computerized system. Reuse may be affected by subcomponents of the target computerized system, a predetermined minimal or maximal number of instructions to reuse, and a heuristic determination to increase possibility of discovering a bug using the stimuli.Type: GrantFiled: June 16, 2009Date of Patent: February 14, 2012Assignee: International Business Machines CorporationInventors: Shady Copty, Alex Goryachev
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Patent number: 8086902Abstract: A method, system and program application is provided for automatically testing the operation of a media player with media files (e.g., video files) that are embodied in various formats. In one illustrative example visually encoded metrics are embedded in a media file that is to serve as a test file. These metrics can be detected and decoded when the test file is rendered by the media player. A testing program automatically executes various playback commands to simulate the way a user would operate the media player when viewing a media file. The testing program captures the media player's display buffer after the execution of each command. The display buffer includes the frame or frames that are played by the media player as a result of the commands. The metric or metrics embedded in the captured frames are detected and decoded and compared to a database that includes the metric or metrics that would be expected if the media player is correctly playing the test file.Type: GrantFiled: April 16, 2007Date of Patent: December 27, 2011Assignee: Microsoft CorporationInventors: Vladislav Rashevsky, Cagri Aslan, Daniel Caruso
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Publication number: 20110314335Abstract: A failure reproducing apparatus according to the present invention includes a log analyzing unit that determines processes that have caused a failure when the failure has occurred in a server system, a target-value calculating unit that calculates a target value on the basis of execution time of each process, and a time-lag calculating unit that calculates a time lag. An execution control unit adjusts timing of outputting an execution command of each process to the server system on the basis of the target value and the time lag and executes a reproduction test.Type: ApplicationFiled: August 23, 2011Publication date: December 22, 2011Applicant: FUJITSU LIMITEDInventor: Yoshiteru Tanaka
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Patent number: 8078916Abstract: An arbiter facility is provided that operates to control the flow of processes that form a test script. The control of the processes that are performed are based on explicit rules or conditions. The rules implemented by the arbiter facility result in different processes within the test script being performed based on data processed by the arbiter facility. Moreover, the arbiter facility implement rules which explicitly express, within the test case, the value of individual operations. In the exemplary embodiment, the value of one or more individual operations are explicitly expressed by the rules that are imposed on the results returned to the arbiter facility by the various verification points within the test script. Accordingly and advantageously, analysis on the value of a verification point may be performed prior to implementing or executing a test script. This analysis may then be reflected in the rule implemented in the arbiter facility.Type: GrantFiled: April 8, 2008Date of Patent: December 13, 2011Assignee: International Business Machines CorporationInventors: Harm Sluiman, Marcelo Paternostro
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Patent number: 8073668Abstract: A test system tests a full system integrated circuit (IC) model that includes a device under test (DUT) IC model and a support IC model. A test manager information handling system (IHS) maps the full system IC model on a hardware accelerator simulator via an interface bus. The hardware accelerator simulator thus emulates the full system IC model. Of all possible fault injection points in the model, the test manager IHS selects a subset of those injection points for fault injection via a statistical sampling method in one embodiment. In response to commands from the test manager IHS, the simulator serially injects faults into the selected fault injection points. The test manager IHS stores results for respective fault injections at the selected injection points. If a machine checkstop or silent data corruption error occurs as a result of an injected fault, the DUT IC model may return to a stored checkpoint and resume operation from the stored checkpoint.Type: GrantFiled: January 30, 2008Date of Patent: December 6, 2011Assignee: International Business Machines CorporationInventors: Jeffrey William Kellington, Prabhakar Nandavar Kudva, Naoko Pia Sanda, John Andrew Schumann
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Patent number: 8069375Abstract: The present invention relates to a method, device, and system for managing verification of configurable hardware and software. The solution according to the present invention solves this by applying a matrix-like method of handling test and verification parameter combinations and interacting with a user using a browser like interface for simple and fast selection of coverage.Type: GrantFiled: December 8, 2008Date of Patent: November 29, 2011Assignee: Kreativtek Software Lund ABInventors: Daniel Hansson, Mikael Caleres
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Patent number: 8046639Abstract: A system and method for accurately modeling a fault log is provided for validating one or more elements of fault detection and logging logic for a real-time fault log of a digital system such as, for instance, a computer processor. The method includes injecting one or more known faults into a data path and/or a control path of the computer processor and spawning an individual tracking thread for each of the injected faults. The tracking threads may be synchronized at a predefined synchronization point that is selected as a function of a collective logging delay representing the time required for each of the injected faults to reach a real-time logging point within the computer processor. Once synchronized, the tracking threads may be input into a fault logging specification for fault behavior and/or system impact modeling and fault prioritization for use in generating a fault log model for comparison to the real-time fault log maintained within the computer processor.Type: GrantFiled: July 29, 2010Date of Patent: October 25, 2011Assignee: Oracle International CorporationInventors: Grace Y. Nordin, Rakesh Mehta, Kenneth K. Chan
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Patent number: 8046746Abstract: Symbolic execution identifies possible execution paths of a computer program or method, each having certain constraints over the input values. The symbolic execution also records updates of memory locations, e.g. updates of the fields of symbolic objects in the heap of an object oriented program, involving a description of the previous heap, the updated symbolic object, a field identification, and a newly assigned symbolic value. The symbolic execution can also record calls to summarized methods, involving a description of previous calls, an identification of the summarized methods, and its symbolic arguments. The behavior of summarized methods can be expressed by axioms. Axioms describe the relationship between summarized methods under certain conditions. Axioms can be generated from parameterized unit tests. A parameterized unit test is a method with parameters which executes a sequence of calls to methods of an implementation under test; it asserts constraints over the inputs and outputs of the calls.Type: GrantFiled: August 4, 2005Date of Patent: October 25, 2011Assignee: Microsoft CorporationInventors: Nikolai Tillmann, Wolfgang Grieskamp, Wolfram Schulte
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Publication number: 20110258599Abstract: A method for testing a software program creates test data by simulating data exchange messages between a server and a client and stores test data in Comma Separated Value (CSV) files. Data repository files stored in the CSV format can be edited by common tools, like a spreadsheet program, and can be maintained easily. The test automation method provides a data capturer tool so that the data repository could be created based on any existing test environment. The test automation method converts data repository files and simulates messages in order to load data to a mobile infrastructure system and set up data fixtures. The test automation method could be integrated in a build process so that data repository and test cases are validated against any program changes periodically.Type: ApplicationFiled: February 28, 2011Publication date: October 20, 2011Inventor: Chunyue Li
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Patent number: 8037357Abstract: A software testing system for generating a test job control language (JCL) file is provided. The system includes a processor, a memory device for storing a source JCL file containing jobs and an instruction file containing instructions for modifying the source JCL file according to a test environment. A JCL generation module executed by the processor determines all procedures that are referenced by the jobs in the source JCL file, opens each unique procedure of the determined procedures once and modifies the jobs in the source JCL file based on the instruction file and the opened procedures to generate the test JCL file. By opening each procedure only once which may be called multiple times in the jobs, the JCL generation module substantially increases the speed of generating the test JCL file.Type: GrantFiled: March 24, 2009Date of Patent: October 11, 2011Assignee: Visa U.S.A. Inc.Inventor: Jesus Orlando Gonzales, II
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Patent number: 8024610Abstract: A method and system for diagnosing any combination of persistent and intermittent faults. The behavior of a system under test is obtained by measuring or probing the system at a particular location(s). The predicted behavior of a modeled system corresponding to the system under test is investigated by drawing inferences based on at least conditional probabilities, prior observations and component models. The predictions are compared to their corresponding points in the system under test. A determination is made if a conflict exists between the measured behavior and the predicted behavior, and the conditional probabilities are adjusted to more and more accurately reflect the action fault(s) in the system under test. The conflicts or deviations between the obtained predicted behavior and the actual behavior are used to isolate the components of the system causing the faults.Type: GrantFiled: November 15, 2007Date of Patent: September 20, 2011Assignee: Palo Alto Research Center IncorporatedInventor: Johan de Kleer
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Publication number: 20110209004Abstract: Test template may comprise a source code template instruction associated with source code commands. The source code template instruction is utilized in generation of a test. The generation of instructions associated with the source code template instruction takes into account utilization of shared resources by both the source code commands and by generated instructions that are generated by other template instructions.Type: ApplicationFiled: February 22, 2010Publication date: August 25, 2011Applicant: International Business Machines CorporationInventors: Alex Goryachev, Ronny Morad, Wisam Kadry, Sergey Shusterman
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Publication number: 20110209218Abstract: A method and system for detecting whether a computer program, sent to a first computer having an operating environment including a plurality of files, includes malware is provided. A second computer obtains a plurality of environment details of the operating environment of the first computer. The second computer simulates in the second computer the presence of the plurality of files in the operating environment by exhibiting the plurality of environment details without installing the plurality of files in the second computer. The second computer executes the computer program in the second computer with the simulation and determines whether the computer program attempts to access or utilize the plurality of files in a manner indicative of malware. If not, the second computer records and generates a notification that the computer program is not malware.Type: ApplicationFiled: February 19, 2010Publication date: August 25, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Scott M. McRAE
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Patent number: 8006120Abstract: The subject invention relates to systems and methods for automatic recovery from errors in a computing environment. A system is provided to facilitate failure recovery in the computing system. The system includes at least one driver component that enumerates at least one layer of a driver stack. A module associated with the driver component requests re-enumeration of the driver stack upon detection of an error in the computing system. When an error is detected by a driver or operating system component, a protocol can be established whereby a new copy of the driver's stack or system resources is re-enumerated in parallel to existing resources that may be in an unknown or error state. The new copy of the stack may allow the driver to become operational in lieu of the previous stack which can be reclaimed for other system uses over time.Type: GrantFiled: April 25, 2008Date of Patent: August 23, 2011Assignee: Microsoft CorporationInventors: Jacob Oshins, Doron J. Holan
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Patent number: 8006136Abstract: The present disclosure relates to automated testing of hardware and software systems. In some embodiments, a testing framework that generates a set of test cases for a system under test using a grammar is disclosed. The grammar may include terminal and nonterminal symbols with tags that describe a test sequence. The testing framework can use the grammar to generate a set of test cases. The testing framework can then receive feedback about the execution of the set of test cases from the system under test. In response to the feedback, the testing framework can generate a new set of grammars by automatically modifying or inserting tags in the original grammar. The new set of grammars can then be used to generate further test cases that intelligently explore the system under test for correctness, conformance, performance, security, or reliability.Type: GrantFiled: October 7, 2008Date of Patent: August 23, 2011Assignee: Wurldtech Security TechnologiesInventors: Nathan John Walter Kube, Daniel Malcolm Hoffman
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Patent number: 7996819Abstract: A method for eliminating ambiguity and incorrectness of the specification determined in a requirement defining phase in developing an information system, and systematically verifying whether an automatically executed test scenario agrees with the original requirements in a functional testing phase, includes extracting an input variable, an output variable, and the respective types of the variables from a specification file in screens; extracting screen-transition information from a composite functional specification containing specifications in screens; and executing the following processes from the top for each screen that appears in screen transition. For the input variable, the apparatus generates a test script indicative of an action (clicking or a character set) corresponding to an object associated with the input variable. For the output variable, the apparatus generates a test script for comparing text information displayed on a screen with an expected value determined from the output variable.Type: GrantFiled: October 7, 2009Date of Patent: August 9, 2011Assignee: International Business Machines CorporationInventor: Akira Okada
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Patent number: 7984333Abstract: A method, and system employing the method, initiates proactive maintenance of computer systems and/or devices in a computer network. The method determines the subsystems of the computers and network devices and analyzes their configuration data including their respective subsystems. The method generates maintenance characteristics for the devices, and determines a maintenance event for devices using the maintenance characteristics and the configuration data of the devices. The method initiates a maintenance solution of a device determined to have a problematic configuration.Type: GrantFiled: October 31, 2008Date of Patent: July 19, 2011Assignee: International Business Machines CorporationInventors: Yaoping Ruan, Debanjan Saha, Sambit Sahu, Anees A. Shaikh