Test Sequence At Power-up Or Initialization Patents (Class 714/36)
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Patent number: 12153097Abstract: A power failure monitoring device includes an electronic device and a console; the electronic device includes a main board; the console is coupled to the main board and adapted to obtain power failure information in the electronic device, and then analyze a power supply condition of the electronic device according to the obtained power failure information.Type: GrantFiled: July 28, 2023Date of Patent: November 26, 2024Assignee: Fulian Precision Electronics (Tianjin) Co., LTD.Inventor: Duo Qiu
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Patent number: 12105613Abstract: A host performs benchmark I/O operations for a storage system by an application on the host formulating a performance test command, providing the performance test command to a channel subsystem layer of the host that actuates communication hardware that provides signals to the storage system, and performing a plurality of benchmark I/O operations at the channel subsystem layer in response to a single performance test command by actuating the communication hardware that provides signals to the storage system. The single performance test command may result in actuating the communication hardware to read and write data at a plurality of addresses of the storage system. The channel subsystem layer may perform the plurality of benchmark I/O operations without receiving any additional data or commands from any applications on the host. A dispatch program that runs on the channel subsystem layer may receive operational data and may actuate the communication hardware.Type: GrantFiled: April 19, 2021Date of Patent: October 1, 2024Assignee: EMC IP Holding Company LLCInventors: Douglas E. LeCrone, Jeffrey L Jones
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Patent number: 12086019Abstract: A method includes: receiving a message, via a communication link, including sensor data in a data stream from a sensor device and first reference data based on a deterministic function and a seed value; extracting the first reference data from the message; generating second reference data based on the deterministic function and the seed value; calculating a first quantity of bit errors in the first reference data based on the second reference data; calculating a bit error rate of the communication link based on the first quantity of bit errors; in response to the bit error rate exceeding a bit error rate threshold for the data stream, generating a second message representing a fault; and transmitting the second message to a second device.Type: GrantFiled: September 13, 2023Date of Patent: September 10, 2024Assignee: Fort Robotics, Inc.Inventor: Nathan Bivans
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Patent number: 12072768Abstract: Provided are a flashing apparatus, a booting and recovery apparatus, and an electronic device, relating to the technical field of electronics. The flashing apparatus is applied to the electronic device. The electronic device includes a booting trigger module, a recovery trigger module, a booting control module and a recovery control module.Type: GrantFiled: February 19, 2021Date of Patent: August 27, 2024Assignee: WINGTECH TECHNOLOGY (SHENZHEN) CO., LTD.Inventor: Jian Cao
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Patent number: 12069184Abstract: The example embodiments relate to improvements in managing boot code images. In an embodiment, a device is disclosed comprising a memory device, the memory device including a storage array, the storage array comprising a first partition and a second partition, wherein the first partition comprises a writeable partition and the second partition comprises a write-protected partition; and a processor configured to: load a golden boot image from the second partition, display a boot prompt after loading the golden boot image, receive an update boot image, the update boot image including a signature, read a public key from the second partition, validate the signature using the public key, and replace a current boot image stored in the first partition with the update boot image.Type: GrantFiled: December 17, 2021Date of Patent: August 20, 2024Assignee: Micron Technology, Inc.Inventor: Zhan Liu
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Patent number: 12061912Abstract: An information handling system may include a processor and a basic input/output system communicatively coupled to the processor and comprising a program of executable instructions configured to determine a context associated with a current boot session of the information handling system and based on user boot history stored during one or more previous boot sessions of the information handling system and the context, load one or more network drivers necessary to boot the information handling system in accordance with the context.Type: GrantFiled: February 1, 2022Date of Patent: August 13, 2024Assignee: Dell Products L.P.Inventors: Karunakar Poosapalli, Shekar Babu Suryanarayana
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Patent number: 12056005Abstract: In a kiosk or informational display, an apparatus for detecting and remediating problems, failures, and anomalies includes a data collection agent configured to collect original data over time associated with components, operation, and configuration of the managed computer system, a monitoring and learning module configured to process the original data and generate a historic record that includes time-based data, such as one or more time-based lists, an alert detection system that includes a sensor having associated therewith one of the time-based lists. The sensor is activated when sensor condition(s) are met, which includes evaluating the sensor condition(s) using at least the time-based list and a current-time value of the components, operation, and configuration of the managed computer system. The apparatus includes a remediation action module configured to effect at least one of a plurality of predetermined actions when the sensor is activated.Type: GrantFiled: January 31, 2023Date of Patent: August 6, 2024Assignee: Lakeside Software, LLCInventors: Robert William Koehler, Nicholas Schumacher, Francis Buggia
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Patent number: 12045148Abstract: A verification system of a basic input output system and a verification method thereof are provided. The verification system includes a server, a microcontroller, and a verification device. The server includes a platform controller hub and the basic input output system. The server outputs a log file of the basic input output system by a system management bus controller in the platform controller hub. The microcontroller is coupled to the server. The microcontroller receives the log file and converts the log file into a readable character. The verification device is coupled to the microcontroller. The verification device receives and displays the readable character.Type: GrantFiled: October 13, 2022Date of Patent: July 23, 2024Assignee: COMPAL ELECTRONICS, INC.Inventors: Cheng-Hung Lin, Chang-Yu Tu, Wen-Shyan Lai
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Patent number: 12039291Abstract: An abnormality detection circuit and method of detecting an abnormality in a CPU is disclosed that may include counting a count value from an initial value to a timeout value; storing a seed value readable from the CPU; generating a key value for verification by performing a specified arithmetic processing on the seed value; waiting for a key value to be written by the CPU; comparing the key value written by the CPU with the key value for verification; and when the count value is equal to the timeout value without the counter being reset, in response to the key value and the key value for verification matching, resetting the counter and storing the seed value to be determined at the time of resetting the counter in the seed value storage section.Type: GrantFiled: July 8, 2022Date of Patent: July 16, 2024Assignee: SANKEN ELECTRIC CO., LTD.Inventor: Naohiko Shimoyama
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Patent number: 12007857Abstract: Disclosed herein are system, method, and computer program product embodiments for non-blocking backup for tertiary initialization in a log replay only node. An embodiment operates by performing a standard log replay on a secondary server and briefly suspending the standard log replay in response to tertiary initialization. Further, the secondary server may determine backup block information and perform a page-aligned backup process from the secondary server to a tertiary server. Additionally, the secondary server may determine log replay block information, and perform a modified log replay concurrently with the backup process based on the backup block information.Type: GrantFiled: January 14, 2022Date of Patent: June 11, 2024Assignee: SAP SEInventors: Simhachala Sasikanth Gottapu, Yahong Wang, Nandan Marathe, Anant Agarwal
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Patent number: 11989300Abstract: An information handling system may include memory circuitry comprising a BIOS and a database including a first set of one or more cryptographic keys usable to authenticate code executable by the BIOS; and a physical storage medium other than the memory circuitry, wherein the physical storage medium includes a custom database including a second set of one or more cryptographic keys usable to authenticate code executable by the BIOS. The information handling system is configured to load a BIOS extension into the BIOS by: determining that the first set of one or more cryptographic keys does not include any key usable to authenticate the BIOS extension; determining that the second set of one or more cryptographic keys includes a particular key usable to authenticate the BIOS extension; authenticating the BIOS extension via the particular key; and in response to the authenticating, loading and executing the BIOS extension.Type: GrantFiled: July 19, 2021Date of Patent: May 21, 2024Assignee: Dell Products L.P.Inventors: Ibrahim Sayyed, Richard M. Tonry
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Patent number: 11966749Abstract: A processor includes at least one socket and at least one memory. Each socket includes a first die and a second die. The first die receives a boot-enable signal and an internal boot-enable signal to execute a boot procedure, and outputs a boot-completion signal after completing the boot procedure. The second die receives the internal boot-enable signal and the boot-completion signal from the first die to execute the boot procedure. The second die is electrically connected to the first die through a communication bus. The memory is electrically connected to the second die. When the first die executes the boot procedure, the first die accesses the memory through the communication bus and the second die.Type: GrantFiled: May 5, 2022Date of Patent: April 23, 2024Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.Inventors: Wenting Wu, Xiaoliang Ji, Xiuli Guo, Yanliang Liu, Qunchao Feng
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Patent number: 11934680Abstract: Embodiments of the systems and methods disclosed herein includes a NAND flash memory having a boot volume. The boot volume can include a primary boot partition, a secondary boot partition, and a rootdisk partition. The primary boot partition can be configured to receive a kernel component of a file. The secondary boot partition can be configured to receive a copy of the kernel component of the file. The rootdisk partition can be configured to receive a root filesystem of the file.Type: GrantFiled: January 28, 2021Date of Patent: March 19, 2024Assignee: ARRIS Enterprises LLCInventors: Walter H. Anderes, Richard P. Rementilla, David L. Berger
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Patent number: 11928639Abstract: Embodiments provide methods for validating secure delivery of an IHS (Information Handling System) by confirming that the packages by which the IHS was delivered include only the packages used to ship the IHS from a factory or other trusted entity. During factory provisioning of the IHS, a shipping certificate is uploaded to the IHS, where the certificate includes shipping identifiers that are each associated with a package used to ship the IHS. Upon receiving packages by which the IHS has been shipped, shipping identifiers, such as bar codes and RFID codes, are collected from the received packages. The shipping identifiers collected from the received packages are compared against the shipping identifiers from the shipping certificate in order to validate the plurality of received packages as the same packages that were used to ship the IHS.Type: GrantFiled: December 30, 2020Date of Patent: March 12, 2024Inventors: Jason Matthew Young, Marshal F. Savage, Mukund P. Khatri
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Patent number: 11928218Abstract: Systems and methods for providing a Basic Input/Output System (BIOS) enforced blocklisting of harmful applications are described. In one embodiment, an Information Handling System (IHS) may include a processor and a BIOS coupled to the processor, the BIOS having program instructions that, upon execution, cause the IHS to download an Unsafe Application List (UAL) from an online source, and during a bootstrap process of the IHS, compare a plurality of Applications (Apps) installed on the IHS against a list of harmful applications included in a UAL. When a harmful application is found by the comparison, the instructions enforce one or more policies to restrict the harmful application from being executed on the IHS.Type: GrantFiled: April 21, 2022Date of Patent: March 12, 2024Assignee: Dell Products, L.P.Inventors: Balasingh Ponraj Samuel, Richard M. Tonry, Jacob Vincent Mink
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Patent number: 11907073Abstract: A method and an apparatus for data interaction between a BIOS and a BMC of a server, a device and a readable storage medium. According to the state of an IPMI link between a BIOS and a BMC, it is determined whether to perform data interaction. At the same time, whether the BMC cannot be activated due to abnormalities are determined by confirming whether the number of times of restarting the server reaches preset threshold at the BDS stage of the BIOS. When the number of times of restarting the server reaches the preset threshold and the BMC is still not activated, the BMC is determined to be abnormal. When the number of times of restarting the server has not yet reached preset threshold, the BIOS performs the action of restarting system, wherein preset threshold is confirmed by a variable self-defined inside the BIOS and may be set freely.Type: GrantFiled: September 28, 2021Date of Patent: February 20, 2024Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.Inventors: Xiuqiang Sun, Jiaming Huang, Xuntang Li, Yingliang Qiao, Huatang Ban, Daotong Li, Shanbin Al, Fanyi Yao
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Patent number: 11907599Abstract: An information processing method applied to an electronic device includes monitoring whether the target application is abnormal in response to a target application being started when the electronic device is in a target display mode, and in response to the target application being abnormal, switching a window of the target application from a first window display mode to a second window display mode such that the target application adapts to a target display mode. In the target display mode, the window of the target application is in the first window display mode indicated by the target display mode.Type: GrantFiled: December 15, 2021Date of Patent: February 20, 2024Assignee: LENOVO (BEIJING) LIMITEDInventors: Tao Cheng, Xiaoyan Shi, Tianshu Ren
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Patent number: 11861340Abstract: Systems and methods for file system management are provided. According to one embodiment, a non-transitory computer-readable medium comprises instructions that when executed by the processing resource cause the processing resource to implement, in a storage node, a multi-tiered file system comprising a read-only layer that contains a base configuration for the storage node and a read-write layer that contains modifications to the base configuration; and combine the read-only layer and the read-write layer into an overlay file system to be presented to an operating system.Type: GrantFiled: April 29, 2021Date of Patent: January 2, 2024Assignee: NetApp, Inc.Inventors: Keith Kauffman, Marshall McMullen, Eric Peters
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Patent number: 11853770Abstract: Embodiments are provided for imaging an operating system (OS) by creating a new OS image from an installer OS image copy maintained in durable storage. During the OS imaging, only a subset of OS files from the installer image are fully copied into the new OS image. Placeholder files are created for other files not included in the initial subset of OS files which were determined to be critical for booting of the OS and/or a minimum set of OS functionality. The placeholder files are distinguished from sparse files and are inaccurately presented by the file system as being full copies of the underlying installer OS image. The data for the placeholder files is only copied when requested, on demand, and/or when there is available/unused processing bandwidth that is subsequently identified after rebooting the computing system with the new OS image.Type: GrantFiled: February 2, 2021Date of Patent: December 26, 2023Assignee: Microsoft Technology Licensing, LLCInventor: Randall Richards Cook
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Patent number: 11836048Abstract: According to an aspects of the present disclosure, an information processing apparatus includes a storage unit configured to store at least one program and at least one processor that reads the at least one program from the storage unit and verifies validity of the read at least one program, wherein the processor executes the at least one program based on a determination that the at least one program is valid, the processor verifies validity of a backup corresponding to the at least one program based on a determination that the at least one program is invalid, and the processor overwrites the at least one program that is stored in the storage unit with the backup corresponding to the at least one program based on a determination that the at least one program is invalid and the backup corresponding to the at least one program is valid.Type: GrantFiled: February 11, 2022Date of Patent: December 5, 2023Assignee: Canon Kabushiki KaishaInventor: Takahiro Yamashita
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Patent number: 11829493Abstract: A device access control system includes a computing system having a device access controller subsystem coupled to devices and a central processing subsystem. A device access control manager subsystem is coupled to the device access controller subsystem and operates, during initialization operations for the computing system, to identify application(s) that are configured to be provided by the central processing subsystem, and identify a first subset of the devices that satisfy application provisioning requirements for the application(s).Type: GrantFiled: April 2, 2021Date of Patent: November 28, 2023Assignee: Dell Products L.P.Inventors: Walter A O'Brien, III, Mukund P. Khatri, Jimmy D. Pike, Mark Steven Sanders, Elie Jreij, Gaurav Chawla, William Price Dawkins
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Patent number: 11829466Abstract: A device access control system includes a first computing system that is coupled to a second computing system via a network, and that includes a device access controller subsystem coupled to devices, a central processing subsystem, and a device access control manager subsystem. The device access control manager subsystem identifies first application(s) configured for provisioning by the central processing subsystem and second application(s) configured for provisioning by the second computing system, configures the device access controller subsystem to provide the central processing subsystem access to a first subset of the devices to allow the central processing subsystem to provide the first application(s), and configures the device access controller subsystem to provide the second computing system access via the device access control manager subsystem to a second subset of the devices to allow the second computing device to provide the second application(s) using the second subset of the devices.Type: GrantFiled: December 9, 2022Date of Patent: November 28, 2023Assignee: Dell Products L.P.Inventors: Walter A. O'Brien, III, Mukund P. Khatri, Mark Steven Sanders, William Price Dawkins, Elie Jreij, Robert W. Hormuth, Jimmy D. Pike, Gaurav Chawla
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Patent number: 11822407Abstract: Systems and methods for use of magnets to retain and eject computing device expansion modules are disclosed. According to an aspect, a system includes a computing device that defines a slot for receipt of an expansion module for operable positioning of the expansion module with respect to the computing device. The expansion module comprises a first magnet attached thereto. Further, the system includes an electromagnet attached to the slot of the computing device. The system also includes a controller configured to apply an electrical output to the electromagnet such that the electromagnet generates a magnetic field for repelling the first magnet such the expansion module is urged in a direction for ejection from the slot.Type: GrantFiled: March 30, 2022Date of Patent: November 21, 2023Assignee: Lenovo Global Technology (United States) Inc.Inventor: Grason Humphrey
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Patent number: 11803307Abstract: A memory system includes a delay time determining unit and a recovering unit. The delay time determining unit determines an amount of a delay time for delaying a recovery operation upon an occurrence of an abnormal power event in the memory system. The recovering unit is in communication with the delay time determining unit to receive information related to the delay time and performs the recovery operation after lapse of an amount of time equal to the delay time.Type: GrantFiled: November 5, 2021Date of Patent: October 31, 2023Assignee: SK HYNIX INC.Inventor: Byung Min Ha
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Patent number: 11803488Abstract: The high-speed transmission system includes a transmitting device, a receiving device, and the signal redriver. The signal redriver includes a terminal resistor. A high-speed receiving end and a high-speed transmitting end of the signal redriver are respectively coupled to a high-speed transmitting end of the transmitting device and a high-speed receiving end of the receiving device. The signal redriver is coupled to a control signal transceiving end of the transmitting device and a control signal transceiving end of the receiving device. The signal redriver monitors a control signal transmitted between the transmitting device and the receiving device and determines whether to enter a SLEEP mode based on the control signal. The terminal resistor of the signal redriver in the SLEEP mode is continuously coupled to the high-speed receiving end of the signal redriver.Type: GrantFiled: April 25, 2022Date of Patent: October 31, 2023Assignee: GENESYS LOGIC, INC.Inventor: Nai-Jen Chang
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Patent number: 11789801Abstract: Systems and methods are described for improved error logging during system boot and shutdown. A hardware initialization firmware on a computing device can include a logging module. When errors occur during early system booting or late system shutdown, the firmware can create error logs. The logging module can receive the error logs and prioritize them according to a set of rules. The logging module can select error logs of the highest priority up to a predetermined maximum amount. The logging module can modify the error logs using a shorthand form and write them to nonvolatile random-access memory. The firmware can initialize runtime services and launch an operating system. A system logger on the operating system can retrieve the error logs, save them to a file, and erase them from the memory.Type: GrantFiled: April 8, 2022Date of Patent: October 17, 2023Assignee: VMware, IncInventors: Ashish Kaila, Tobias Stumpf, Mukund Gunti
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Patent number: 11748006Abstract: An illustrative method includes determining whether a virtual storage volume is successfully mounted to a mount path associated with a compute node, the mount path being marked as read-only, marking, if the determining includes determining that the virtual storage volume is successfully mounted to the mount path, the mount path as writable, and maintaining, if the determining includes determining that the virtual storage volume is unsuccessfully mounted to the mount path, the mount path as read-only.Type: GrantFiled: April 6, 2021Date of Patent: September 5, 2023Assignee: Pure Storage, Inc.Inventors: Dinesh Israni, Harsh Desai, Goutham Rao, Vinod Jayaraman
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Patent number: 11694722Abstract: The present disclosure generally relates to using a data timestamp and/or a read counter to prevent data from being re-read and signal that the data has been accessed. The write assist element in the write head can be utilized to degrade the data or an allocated marker after the data has been read. The degradation functions as a read counter to indicate how many times the data has been read. Additionally and/or alternatively, a timestamp can be utilized. The timestamp is updated each time that the data has been accessed. In so doing, it is possible to determine whether data in a data storage device has been accessed.Type: GrantFiled: February 15, 2022Date of Patent: July 4, 2023Assignee: Western Digital Technologies, Inc.Inventors: Shaomin Xiong, Erhard Schreck, Robert Smith, Sukumar Rajauria
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Patent number: 11645156Abstract: Approaches for updating an error policy based on boot-time error information and run-time error information, are described. The error policy maps an error type with a prescribed action. In an example, the error policy is updateable based run-time error information corresponding to a computing device. The updated error policy may then be used for addressing boot-time errors of computing devices.Type: GrantFiled: January 28, 2022Date of Patent: May 9, 2023Assignee: Hewlett Packard Enterprise Development LPInventor: Debdipta Ghosh
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Patent number: 11630591Abstract: Methods and systems for managing data for startup purposes in a distributed system are disclosed. The distributed system may include any number of clients operably connected to a storage system via a connection fabric. By virtue of the connection topology, any of the clients may interact with the storage system to gain access to storage resources of the storage system. When a client is provided access to storage resources by the storage system, other clients may not be able to access the storage resources of the storage system.Type: GrantFiled: October 6, 2021Date of Patent: April 18, 2023Assignee: Dell Products L.P.Inventors: Swamy Kadaba Chaluvaiah, Murali Manohar Shanmugam
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Patent number: 11604755Abstract: Presented herein are improvement to computer system architecture. In one embodiment, a method includes reconfiguring system interconnect links disposed between a first central processing unit socket and a second central processing unit socket, disposed together on a single motherboard, as peripheral bus links; and transmitting electrical signals, via the peripheral bus links, and via a printed circuit board that bridges the second central processing unit socket, to at least one input/output functional block that is disposed on the single motherboard and that is selectively connectable to the second central processing unit socket.Type: GrantFiled: March 9, 2021Date of Patent: March 14, 2023Assignee: CISCO TECHNOLOGY, INC.Inventors: Jayaprakash Balachandran, Bidyut Kanti Sen, Kenny Lieu, Dattatri N. Mattur
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Patent number: 11599410Abstract: In a kiosk or informational display, an apparatus for detecting and remediating problems, failures, and anomalies includes a data collection agent configured to collect original data over time associated with components, operation, and configuration of the managed computer system, a monitoring and learning module configured to process the original data and generate a historic record that includes time-based data, such as one or more time-based lists, an alert detection system that includes a sensor having associated therewith one of the time-based lists. The sensor is activated when sensor condition(s) are met, which includes evaluating the sensor condition(s) using at least the time-based list and a current-time value of the components, operation, and configuration of the managed computer system. The apparatus includes a remediation action module configured to effect at least one of a plurality of predetermined actions when the sensor is activated.Type: GrantFiled: August 5, 2021Date of Patent: March 7, 2023Assignee: Lakeside Software, LLCInventors: Robert William Koehler, Nicholas Schumacher, Francis Buggia
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Patent number: 11593123Abstract: Methods and apparatus for boot time reduction in a processor and programmable logic device environment are disclosed. An example apparatus includes a multicore processor including a first core and a second core. A bootstrap processor is to initialize the first core into a standby mode and initialize the second core into a non-standby mode. A programmable logic device is to be programmed with instructions to be executed by the programmable logic device by the second core via a first connection initialized by the second core. The bootstrap processor is to, upon completion of the programming of the programmable logic device, initialize a data connection between the programmable logic device and the second core.Type: GrantFiled: June 30, 2021Date of Patent: February 28, 2023Assignee: INTEL CORPORATIONInventors: Yah Wen Ho, Vincent Zimmer, Tung Lun Loo
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Patent number: 11543872Abstract: The described technology provides a method for dynamically adjusting operating voltage of a device, including receiving device characteristics data related to a device, performing a margining test for the device to generate a performance curve characterizing variation of the device's current performance speeds at various operating voltages from expected performance speeds at the various operating voltages, determining an operating voltage for the device based on the device characteristics data and the performance curve, and adjusting the operating of the device based on the determined operating voltage.Type: GrantFiled: July 2, 2019Date of Patent: January 3, 2023Assignee: Microsoft Technology Licensing, LLCInventors: Chirag Shah, Gregory A. Nielsen, Seppo Juhani Jarvensivu
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Patent number: 11474898Abstract: A computer implemented method for recovering erased entries within a system of arrays includes identifying a system consisting of a plurality of arrays, wherein each array consists of m rows and n columns of entries, each entry is divided into p symbols consisting of a plurality of bits, protecting the m rows and n columns of entries in the system with an erasure-correcting code allowing the recovery of a number of erased entries in such rows and columns, detecting an erasure corresponding to an entry in the identified system, and, responsive to detecting an erasure, determining the value of the erased entry according to the p symbols of one or more non-erased entries.Type: GrantFiled: December 9, 2020Date of Patent: October 18, 2022Assignee: International Business Machines CorporationInventors: Mario Blaum, Steven Robert Hetzler
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Patent number: 11455261Abstract: An embodiment of a semiconductor package apparatus may include technology to identify a partial set of populated memory channels from a full set of populated memory channels of a multi-channel memory system, and complete a first boot of an operating system with only the identified partial set of memory channels of the multi-channel memory system. Other embodiments are disclosed and claimed.Type: GrantFiled: September 29, 2017Date of Patent: September 27, 2022Assignee: Intel CorporationInventors: Kevin Yufu Li, Donggui Yin, Zijian You, Shihui Li, Dujian Wu
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Patent number: 11379216Abstract: The present invention relates to a software update agent device and a patching method through the same, and provides a software update agent for patching software program and its related data on a client device such as an autonomous vehicle, a smartphone, and the like, thereby patching the software program used in the client device and its related data easily and quickly, based on the differential data between old and new versions of software data provided from remote software update management server.Type: GrantFiled: March 13, 2020Date of Patent: July 5, 2022Inventors: Dong Soo Kang, Dong Hwan Lee, Tae Ho Lee, Seung Wook Baek
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Patent number: 11367499Abstract: A computing system is disclosed. The computing system includes a computation unit, one or more processors, a volatile memory, and a non-volatile memory communicatively coupled to the one or more processors and having instructions stored thereon, which when executed by the one or more processors, causing the one or more processor to instantiate a container and perform at least one of a volatile memory checking procedure or a non-volatile memory checking procedure. The volatile memory checking procedure includes checking the first physical address space for errors, loading a container into volatile memory containing the first physical address space if an error is determined, rechecking the first physical address space for error, loading the container to a second physical address space and updating a memory management unit if an error in the first physical address space is determined.Type: GrantFiled: August 28, 2020Date of Patent: June 21, 2022Assignee: Rockwell Collins, Inc.Inventors: John V. Thommana, Chris K. Ridgway, Joseph Kaemmer
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Patent number: 11360696Abstract: This application describes a system startup method and apparatus. The method may include establishing a mapping relationship between address space of a first storage device and address space of a second storage device. The method may also include receiving a read/write request sent to the first storage device. Furthermore, the method may include when the read/write request is a write request for the first storage device, writing data to a second address in the second storage device based on a first address in the first storage device in the write request and the mapping relationship. Or, when the read/write request is a read request for the first storage device, determining whether data has been written to a fourth address corresponding to a third address in the read request. The method may further include reading data from the fourth address when the data has been written to the fourth address, or reading data from the third address when no data has been written to the fourth address.Type: GrantFiled: September 30, 2020Date of Patent: June 14, 2022Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Leizhen Zang, Chaozhu Tong, Jun Xue
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Patent number: 11334419Abstract: A disclosed fault analysis solution and method includes provisioning an NVMe boot directory of an information handling system with a notification module configured to perform certain operations in a pre-OS context, The operations may include detecting a pre-OS error event, determining a faulty component associated with the error event, identifying one or more executable scripts and tools associated with the faulty component, invoking a support app to download the one or more executable scripts and tools, and executing the one or more executable scripts and tools to generate a fault analysis report. The executable scripts may perform script operations including retrieving event data including one or more logs and system parameters associated with either the error event or the faulty component and storing the event data in an error log file. The executable tools may perform remedial measures associated with the error event or the faulty component.Type: GrantFiled: April 29, 2021Date of Patent: May 17, 2022Assignee: Dell Products L.P.Inventors: Shekar Babu Suryanarayana, Srikanth Krishnamurthy, Sumanth Vidyadhara
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Patent number: 11243587Abstract: A data processing device according to one or more embodiment is disclosed. The data processing device may include a first power-on reset circuit that generates a first power-on reset signal depending on power source voltage, and a processor that activates based on a first power-on reset signal generated by the first power-on reset circuit and that runs software. The processor determines if the normal first power-on reset signal is used to cause the processor to activate and run the software.Type: GrantFiled: June 26, 2019Date of Patent: February 8, 2022Assignee: SANKEN ELECTRIC CO., LTD.Inventor: Takanaga Yamazaki
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Patent number: 11119903Abstract: Disclosed herein are methods, systems, and software to enhance the testing of race conditions in programs. In one example, a method of testing race conditions in a target program with one or more concurrent processes includes generating a scheduling program based on race conditions identified in the target program, wherein the scheduling program includes order of operation rules for the one or more concurrent processes. The method further provides initiating execution of the scheduling program, and executing the target program based on the order of operation rules for the one or more concurrent processes.Type: GrantFiled: May 1, 2015Date of Patent: September 14, 2021Assignee: Fastly, Inc.Inventor: Devon O'Dell
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Patent number: 11075534Abstract: A interface circuit includes: a power supply circuit, configured to output a DC voltage; a voltage conversion circuit, configured to convert the DC voltage to a target voltage, wherein the voltage conversion circuit is a step-down conversion circuit; a first Type-C port and a second Type-C port, configured to be connected to the respective loads; a switch circuit, connected to the power supply circuit, the voltage conversion circuit, the first Type-C port and the second Type-C port respectively; and a USB controller, configured to communicate with the first Type-C port and the second Type-C port respectively, and regulate the DC voltage and the target voltage according to supply voltages of the loads connected to the first Type-C port and the second Type-C port, and control the switch circuit to apply the DC voltage or the target voltage to a Type-C port connected to a corresponding load.Type: GrantFiled: December 5, 2019Date of Patent: July 27, 2021Assignee: HYNETEK SEMICONDUCTOR CO., LTD.Inventor: Yingyang Ou
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Patent number: 11010223Abstract: A method and system can implement error and event log correlation in an apparatus and include extracting one or more log information associated with a storage location and creating a flexible structure of the one or more log information. The one or more log information is translated to a database store based on a user input. A match level is determined between an event and error data through the one or more log information extracted. When the match level exceeds a predetermined value, a relationship between the event and error data is created through an algorithm and a shareable entry is created for the relationship in a format usable by another apparatus.Type: GrantFiled: November 27, 2017Date of Patent: May 18, 2021Assignee: Infosys LimitedInventors: Sudipto Shankar Dasgupta, Mayoor Rao, Ganapathy Subramanian
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Patent number: 10983709Abstract: Methods, non-transitory computer readable media, and computing devices that execute a storage operation, without journaling the storage operation in a log, and withhold from a file system a list of freed inodes including an indication of an inode freed as a result of the execution of the storage operation. A consistency point operation is then initiated that retrieves storage operations logged as journal entries in the log and commits a result of each of the storage operations to data storage devices. A list of available inodes is updated based on the list of freed inodes, when the consistency point operation is determined to be complete. This technology reduces the number of storage operations that are required to be journaled to maintain consistency of a file system, thereby reducing the runtime resources required to facilitate the journaling and replay resource required to replay the storage operations following a recovery.Type: GrantFiled: January 30, 2020Date of Patent: April 20, 2021Assignee: NETAPP, INC.Inventors: Ram Kesavan, Ananthan Subramanian, Hiroshi Ishii, Abdul Basit, Joseph Brown, Rohit Singh
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Patent number: 10896093Abstract: A method and system for improving system maintenance is provided. The method includes detecting software applications, associated processes, and associated services being currently executed via a server system. A script describing the software applications, associated processes, and associated services is generated and a server system reboot process is detected. After the reboot process has executed, it is detected that the server system is currently operational and the script is executed. Each software application is associated with processes and services and it is detected if each software application is fully operational. In response, an operation process associated with the server system is executed.Type: GrantFiled: January 15, 2019Date of Patent: January 19, 2021Assignee: International Business Machines CorporationInventors: Cesar Augusto Rodriguez Bravo, Kevin Jimenez Mendez, Erik Rueger
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Patent number: 10802076Abstract: An oscillator includes a resonator, a circuit device that is electrically coupled to the resonator and generates a clock signal, and an output terminal that is electrically coupled to the circuit device and outputs the clock signal. The circuit device includes an abnormality detection circuit, and when an abnormal state is detected by the abnormality detection circuit, the circuit device changes a signal characteristic of the clock signal.Type: GrantFiled: July 9, 2019Date of Patent: October 13, 2020Assignee: Seiko Epson CorporationInventor: Jun Uehara
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Patent number: 10783088Abstract: Methods, systems, and computer devices are included for data backup. An example method includes receiving an activation signal from a hardware input of a data storage device that is operating in a read-only mode. In response to receiving the activation signal, a backup application is provided from the data storage device to a computing device that is communicatively coupled to the data storage device. An authenticated session is established between the data storage device and the backup application that is executed on the computing device. Backup data from the computing device is received via the authenticated session. The authenticated session causes the data storage device to operate in at least a write mode with respect to the received backup data during the authenticated session. The received backup data is written to the data storage device. If the authenticated session is terminated, the data storage device returns to a read-only mode.Type: GrantFiled: December 21, 2017Date of Patent: September 22, 2020Assignee: RED HAT, INC.Inventor: Stan Silvert
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Patent number: 10614232Abstract: A system and method improves digital security in a computer by adding an electronic circuit. The electronic circuit stores sensitive data in an un-erasable state such that the sensitive data may not be altered. The electronic circuit limits transfer of the sensitive data only once after each power-up or after each reset of the computer. The electronic circuit prevents access to the sensitive data by an authorized program. The electronic circuit utilizes its own storage medium and a random access memory, the latter of which can receive and store the sensitive data from the non-transitory computer storage medium. The method includes hosting on the computer a software driver and a copy-of-copy of first security key obtained from the sensitive data stored on the electronic circuit. The software driver is operable to install a software module on the computer using the copy-of-copy of first security key to encrypt each installed file.Type: GrantFiled: September 10, 2018Date of Patent: April 7, 2020Inventor: John Almeida
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Patent number: 10552057Abstract: A method, non-transitory computer readable medium and storage server computing device that determines when a generated storage operation corresponds with one of a set of predefined storage operations. The storage operation is executed and a result of the execution of the storage operation is withheld from a file system, when the determining indicates that the storage operation corresponds with one of the set of predefined storage operations. A determination is made when a consistency point operation has completed. The result of the execution of the storage operation is presented to the file system, when the determining indicates that a consistency point operation has completed. This technology reduces the number of storage operations that are required to be journaled to maintain consistency of a file system, thereby reducing the runtime resources required to facilitate the journaling and replay resource required to replay the storage operations in a journal following a recovery.Type: GrantFiled: May 27, 2016Date of Patent: February 4, 2020Assignee: NetApp, Inc.Inventors: Ram Kesavan, Ananthan Subramanian, Hiroshi Ishii, Abdul Basit, Joseph Brown, Jr., Rohit Singh