Abstract: A system and method for storing data including receiving a request to write data and in response to the request selecting a set of free physical locations in persistent storage. The system and method further include determining an aggregate failure rate of the set of free physical locations, making a first determination that the aggregate failure rate is less than a failure rate threshold for the persistent storage and based on the first determination calculating a parity value using at least a portion of the data, and writing the data and the parity value to the set of free physical locations.

Abstract: A first code is generated from data by using a second error correction encoding method, and a second code is generated from the first code and a first random number by using a first error correction encoding method. First masked data is generated by masking registration target data by using the second code, and the first masked data is registered in a database. A third code is generated from a second random number by using the first error correction encoding method. Second masked data is generated by masking matching target data by using the third code. Synthesized data is generated by synthesizing the second masked data and the first masked data registered in the database, and the synthesized data is decoded in accordance with the first error correction encoding method and the second error correction encoding method.

Abstract: An apparatus is provided. The apparatus comprises a first syndrome computation circuit configured to receive a codeword having a plurality of rows and a plurality of columns and further configured to compute a first syndrome for at least a portion of a first component codeword of the codeword. The apparatus further comprises a second syndrome computation circuit configured to receive the codeword and to compute a second syndrome for at least a portion of a second component codeword of the codeword. The apparatus further comprises a bit correction circuit configured to correct one or more erroneous bits in the codeword based, at least in part, on at least one of the first and second syndrome, wherein the first and second component codewords span two or more rows and two or more columns of the codeword.

Abstract: A method for accessing a flash memory module is provided. The flash memory module is a 3D flash memory module including a plurality of flash memory chips, each flash memory chip includes a plurality of blocks, each block includes a plurality of pages, and the method includes: configuring the flash memory chips to set at least a first super block and at least a second super block of the flash memory chips; and allocating the second super block to store a plurality of temporary parities generated when data is written into the first super block.

Abstract: A memory system includes a memory module that supports error detection and correction (EDC) in a manner that relieves a memory controller or processor of some or all of the computational burden associated with EDC. Individual EDC components perform EDC functions on subsets of the data, and share data between themselves using relatively short, fast interconnections.

Abstract: A memory controller 2 of a memory system 1 according to an embodiment is provided with an encoding device 10 and a memory interface 5. The encoding device 10 is provided with an encoder 15 which generates a plurality of first parities by encoding a plurality of user data by using a common code, an interleaver 111 which sequentially interleaves the plurality of user data, and an XOR accumulator 112 which sequentially executes component-wise modulo-2 operation on the interleaved plurality of user data. The encoder 15 generates second parity by encoding a result finally obtained by executing the component-wise modulo-2 operation on a plurality of user data. The memory interface 5 writes a code word sequence including the plurality of user data, the first parities and the second parity in a non-volatile memory 9.

Abstract: A digital television (DTV) transmitter and a method of coding data in the DTV transmitter method are disclosed. A pre-processor pre-processes the enhanced data by coding the enhanced data for forward error correction (FEC) and expanding the FEC-coded enhanced data. A data formatter generates one or more groups of enhanced data packets, each enhanced data packet including the pre-processed enhanced data. And, a packet multiplexer generates at least one burst of enhanced data by multiplexing the one or more groups of enhanced data packets. Herein, each burst of enhanced data includes at least one group of enhanced data packets. The DTV transmitter may further include a scheduler which generates first and second control signals to control operations of the data formatter and the packet multiplexer, respectively.

Abstract: Communication endpoints and related methods for forward error correction (FEC) are disclosed. A communication endpoint includes control circuitry including a packetizer configured to segment near-end data into groups of near-end data packets, and a forward error correction (FEC) packet generator configured to generate at least two near-end FEC packets for each group of near-end data packets. A method includes generating the FEC packets, and transmitting the data packets and the FEC packets to a far-end communication endpoint. A communication endpoint includes control circuitry including a forward error correction repairer configured to use far-end FEC packets to repair groups of far-end data packets. A method includes receiving a group of far-end data packets and corresponding far-end FEC packets, and repairing far-end data packets with the corresponding far-end FEC packets.

Abstract: A wireless communication technique in which information that has been encoded and interleaved (the sequence of bits has been rearranged) on the transmission side is subjected to iterative decoding processing by using a demodulator, a deinterleaver, a decoder, and an interleaver on the receiving side.

Abstract: Provided is a method for receiving data in a receiver that performs decoding using a non-binary Low Density Parity Check (LDPC) code. The method includes generating a message vector for each symbol by demodulating received data; determining data characteristics and channel characteristics of the received data; determining the number of vector elements to be used for decoding among vector elements of the message vector using at least one of the data characteristics and the channel characteristics; and selecting vector elements according to the determined number of vector elements, and decoding the received data using the selected vector elements.

Abstract: An optical transmission technique includes receiving data for transmission over the optical communication network, applying a three-dimensional (3D) error correction code to the data using three component codes, resulting in error correction coded signal, modulating the error correction coded signal using a quadrature amplitude modulation (QAM) scheme and processing and transmitting the modulated signal over the optical communication medium.

Abstract: A memory unit stores first and second code values calculated by encoding a first sequence, contained in a first word, and a remaining second sequence of a target sequence, and the number of bytes from a word start to a target sequence start. A code value calculating unit calculates a code value for each byte, based on signal sequence. A first sequence detecting unit detects the first sequence, by comparing the first code value with a difference between the code values at the last byte of a word and at the byte corresponding to the number of bytes. An expected value calculating unit calculates an expected code value at the target sequence end, based on the code value at detection of the first sequence and the second code value. A determination unit signals that the target sequence is detected, when the code value equals the expected value.

Abstract: A cross-layer encoder for providing UEP encoding of video data configured to provide UEP encoding of video data at an application layer of a transmission channel by receiving video packets having first and second priority levels, applying first and second coding schemes to video packets having first and second priority levels, respectively, and transmitting video frames having first and second priority levels. The cross-layer encoder can be configured to provide UEP encoding of video data at a physical layer of the transmission channel by receiving encoded video frames having first and second priority levels, applying third and fourth coding schemes to video frames having first and second priority levels, respectively, and transmitting cross-layer encoded video frames having first and second priority levels. The first through fourth coding schemes can generate different percentages of the total coding overhead based on first and second priority levels, respectively.

Abstract: Technologies for providing efficient error correction with half product codes include an apparatus having a memory to store data and a controller to manage read and write operations of the memory. The controller is to obtain, in response to a write request, data to write to the memory. The controller is further to encode the data with a half product code to define a matrix that includes at least one matrix element based on a soft decision error correction encoder algorithm and at least one other matrix element based on a hard decision error correction encoder algorithm. Additionally, the controller is to write the half product code to the memory.

Abstract: The invention pertains to non-volatile memory devices, and more particularly to advantageously encoding data in non-volatile devices in a flexible manner by both NVM manufacturers and NVM users. Multiple methods of preferred state encoding (PSE) and/or error correction code (ECC) encoding may be used in different pages or blocks in the same NVM device for different purposes which may be dependent on the nature of the data to be stored.

Abstract: An improved system is disclosed for ensuring the integrity of data stored on a dispersed data storage network. Checksums are used to ensure integrity of both data segments and data slices. Checksums appended to data slices are checked by receiving slice servers to ensure that no errors occurred during transmission. Slice servers also periodically recalculate checksums for stored data slices to ensure that data slices have not been corrupted during storage. Checksums appended to data segments are checked when data segments are read from the storage network.

Abstract: A data encoding method includes storing K input data symbols; assigning the symbols to respective symbol locations in a notional square array, having n rows and n columns of locations, to define a plurality of k-symbol words in respective rows; encoding the words by encoding rows and columns of the array dependent on a product code having identical row and column codes, each being a reversible error-correction code of dimension k and length n=2n?, thereby to define a codeword, having n2 code symbols corresponding to respective locations of the array, of a quarter product code defined by CQ={X?XT?(X?XT)F: X?C} where X is an n by n-symbol matrix defining a codeword of the product code, XT is the transpose matrix of X, and (X?XT)F is a reflection of matrix (X?XT) in the anti-diagonal thereof.

Abstract: A data encoding method includes storing K input data symbols; assigning the symbols to respective symbol locations in a notional square array, having n rows and n columns of locations, to define a plurality of k-symbol words in respective rows; encoding the words by encoding rows and columns of the array dependent on a product code having identical row and column codes, each being a reversible error-correction code of dimension k and length n=2n?, thereby to define a codeword, having n2 code symbols corresponding to respective locations of the array, of a quarter product code defined by CQ={X?XT?(X?XT)F: X?C} where X is an n by n-symbol matrix defining a codeword of the product code, XT is the transpose matrix of X, and (X?XT)F is a reflection of matrix (X?XT) in the anti-diagonal thereof.

Abstract: A controller includes an interface and a processor. The interface is configured to communicate with a memory including multiple memory cells organized in at least two sections each including multiple sets of word lines (WLs), wherein in a first failure mode multiple WLs fail in a single section, and in a second failure mode a WL fails in multiple sections. The processor is configured to assign multiple cell-groups of the memory cells to a parity-group, such that (i) no two cell-groups in the parity-group belong to a same WL, and (ii) no two cell-groups in the parity-group belong to adjacent WLs in a same section, and, upon detecting a failure to access a cell-group in the parity-group, due to either the first or second failure modes but not both failure modes occurring simultaneously, to recover the data stored in the cell-group using one or more remaining cell-groups in the parity-group.

Abstract: A storage device includes a memory that includes storage circuitry and a memory including multiple memory cells. The storage circuitry is configured to store in a group of the memory cells data that was encoded using an error correcting code (ECC) consisting of multiple component codes, to define multiple threshold settings, each specifying positions of one or more reading-thresholds, to read the data from the memory cells in the group using the threshold settings and decode the read data using the component codes, to calculate for the component codes respective component-code scores that are indicative of levels of confidence in the decoded data of the component-codes, to select, based on the component-code scores, a threshold setting that is expected to result in a best readout performance among the multiple threshold settings, and to read data from the memory using the selected threshold setting.

Abstract: An iterative decoding device applied for a SISO (soft input soft output) system is disclosed, which comprises an operational control unit, a first decoder, and a second decoder. The operational control unit is operative to receive an encoded signal and divide the encoded signal into at least one frame. The first decoder is operative to receive each of the at least one frame and derive a renewed intrinsic information by a first iteration operation. The second decoder is operative to derive soft-information by a second iteration operation based on the renewed intrinsic information, and then transmit the soft-information back to the first decoder for the iteration operation of the next renewed intrinsic information. The operational control unit makes the at least one frame to be calculated respectively by the first decoder and the second decoder, thereby improving the efficiency and error ratio of a receiver.

Abstract: A method and apparatus for time-based fast positive acknowledgement (ACK)/negative acknowledgement (NACK) reporting (FANR) operation with enhanced general packet radio service 2 uplink (HUGE) are disclosed. A wireless transmit/receive unit (WTRU) configures downlink FANR operation and EGPRS-2 mode uplink transmission not to be in conflict. A modulation and coding scheme (MCS) for the EGPRS-2 mode may be limited to an MCS containing at most two RLC data blocks. Alternatively, three or more piggybacked ACK/NACK (PAN) bits may be used for a time-based FANR operation if an EGPRS-2 mode is configured. Alternatively, at least one PAN bit may indicate an ACK/NACK for a group of RLC data blocks. The number of PAN bits for a time-based FANR operation may be configured by the network. The downlink FANR operation may be dynamically switched between time-based and SSN-based.

Abstract: A forward error correction and differentially encoded signal obtained via a communication channel is supplied to a soft-input soft-output (SISO) differential decoder that is bi-directionally coupled to a SISO forward error correction decoder. Over a first portion of a plurality of decoding iterations of the differentially encoded signal, the SISO differential decoder and the SISO forward error correction decoder are operated in a turbo decoding mode in which decoded messages generated by the SISO differential decoder are supplied to the SISO forward error correction decoder and forward error correction messages are supplied to the differential decoder. Over a second portion of the plurality of decoding iterations of the differentially encoded signal, the SISO forward error correction decoder is operated in a non-turbo decoding mode without any messages passing to and from the SISO differential decoder. Decoder output is obtained from the SISO forward error correction decoder.

Abstract: A decoding method, a memory storage device and a memory control circuit unit are provided. The method includes: programming first data into a first physical unit of a rewritable non-volatile memory module; reading the first physical unit to obtain second data; obtaining a first threshold voltage distribution of a first bit-value and a second threshold voltage distribution of a second bit-value according to the first data and the second data, wherein the first bit-value and the second bit-value are different; calculating first channel reliability information corresponding to the first physical unit according to the first threshold voltage distribution and the second threshold voltage distribution; and decoding third data stored in the first physical unit according to the first channel reliability information. Therefore, decoding efficiency for the first physical unit is improved.

Abstract: A digital broadcasting system and method of processing data are disclosed. Herein, a method of processing data in a transmitting system includes creating a data group including a plurality of mobile service data packets, re-adjusting a relative position of at least one main service data packet of a main service data section, the main service data section including a plurality of main service data packets, and multiplexing the mobile service data of the data group and the main service data of the main service data section in burst units. Herein, a position of an audio data packet among the main service data packets of the main service data section may be re-adjusted. Also, a position of an audio data packet included in the main service data section may be re-adjusted based upon a multiplexing position of the main service data section.

Abstract: A method, apparatus, and system are provided for implementing an enhanced modulation code for hard disk drives (HDDs). A modulation code directly uses Bit Error Rate (BER) information for different user patterns to construct a coded word minimizing possible error rate. The modulation code has a flexible code rate that simplifies code optimization relative to Coded Bit Density (CBD), signal to noise ratio (SNR) and noise color.

Abstract: Systems and techniques relating to processing multiple data streams include, according to at least one implementation, receiving a single bit stream during a SISO mode of transmission; receiving two or more bit streams during a MIMO mode of transmission, wherein different rotations are applied to dynamically changed second, third, and fourth ones of the two or more bit streams received during the MIMO mode of transmission to improve transmission robustness and transmission data rate; performing separate de-mapping of subcarriers in the two or more bit streams during the MIMO mode of transmission; performing separate de-interleaving of the two or more bit streams during the MIMO mode of transmission, wherein a first portion of a de-interleaver section that handles a first of the two or more bit streams employs a same de-interleaver operation as during the SISO mode of transmission; and combining the two or more bit streams.

Abstract: A method for non-orthogonal transmission of a signal intended for a system with N sources, M relays and a single receiver, in which simultaneous transmission over a single spectral resource by the relays is simultaneous with a transmission over a single spectral resource by the sources. The method includes, for each relay: joint iterative detection/decoding of messages transmitted respectively by the sources during first transmission intervals to obtain decoded messages; detecting errors on the decoded messages; interleaving the detected error-free messages, followed by algebraic network coding including a linear combination, in a finite field of an order higher than two, of the interleaved messages to obtain a coded message, the linear combinations being independent, in pairs, between the relays; and channel coding to generate a signal representative of the network coded message and to transmit this signal during the subsequent transmission intervals simultaneously with a transmission by the sources.

Abstract: A memory system includes a non-volatile memory. A coding unit generates a codeword by performing coding of a graph code using a graph. A side of the graph is associated with a block that is a part of user data and that has one or more symbols at which component codes intersect one another. A control unit stores the codeword in the non-volatile memory. Error correction is performed on the user data in accordance with the codeword.

Abstract: The present disclosure includes apparatus, systems, and techniques relating to noise-predictive detector adaptation. A described technique includes operating a decoder system to decode codewords that are based on a received encoded signal by processing the codewords and exchanging information between path and code decoders, operating the path decoder to use estimation parameters to produce first and second paths based on a codeword of the codewords, operating the code decoder to produce a decoded path based on the codeword; determining a winning path of first and second paths based on whether the decoded path matches the first path or the second path; and updating, based on one or more error terms and the winning path, the estimation parameters to favor selection of the winning path by the path decoder and to disfavor selection of a losing path of the first and second paths by the path decoder.

Abstract: A memory module is disclosed that includes a substrate, a memory device that outputs read data, and a buffer. The buffer has a primary interface for transferring the read data to a memory controller and a secondary interface coupled to the memory device to receive the read data. The buffer includes error logic to identify an error in the received read data and to identify a storage cell location in the memory device associated with the error. Repair logic maps a replacement storage element as a substitute storage element for the storage cell location associated with the error.

Abstract: A combined symbol constellation may be selected from a uniform symbol constellation that is supported by a de-mapper to provide additional power split options while reducing modifications to the de-mapper. In some examples, a signal may be constructed according to a combined symbol constellation selected from a larger uniform symbol constellation based on a desired power-ratio. The signal may include a base-layer, used to communicate a first set of data, and an enhancement-layer, used to communicate a second set of data, in accordance with the selected combined symbol constellation. The signal may be received and de-mapped according to the combined symbol constellation at a de-mapper that supports a uniform symbol constellation that is larger than the combined symbol constellation.

Abstract: A storage device includes non-volatile memory and a controller. A method performed in the data storage device includes sending an instruction to a host device to cause the host device to perform one or more specified computations. The method further includes receiving a response from the host device. The response is based on execution of the one or more specified computations.

Abstract: A list decoding method for a polar code includes generating a tree-type decoding graph for input codeword symbols; the generating a tree-type decoding graph including, generating a decoding path list to which a decoding edge is added based on a reliability of a decoding path, the decoding path list being generated such that, among decoding paths generated based on the decoding edge, decoding paths within a threshold number of critical paths survive within the decoding path list in an order of high likelihood probability, and determining an estimation value, which corresponds to a decoding path having a maximum likelihood probability from among decoding paths of the decoding path list, as an information word.

Abstract: An ECC circuit can operate in a plurality of error correction modes with different correcting capabilities for data stored in a memory. The ECC circuit calculates a syndrome with respect to information data in accordance with an error correction mode set by a control part and adds a syndrome of a fixed length in which dummy bits are added to the calculated syndrome, to the information data. When code data is read out, the ECC circuit performs a correction process on the code data by using the syndrome included in the code data.

Abstract: A method of operating a distributed storage system, the method includes identifying missing chunks of a file. The file is divided into stripes that include data chunks and non-data chunks. The method also includes identifying non-missing chunks available for reconstructing the missing chunks and reconstructing missing data chunks before reconstructing missing non-data chunks using the available non-missing chunks.

Abstract: Provided are a data transmission system, an encoding apparatus, and a decoding method. The encoding apparatus includes an encoding unit configured to use an encoding matrix to encode original packets sequentially generated from a codec to generate an encoded packet in units of a generation. The encoding unit is configured to use information provided from the codec to dynamically determine a generation boundary of the original packets to encode the original packets. The encoding unit is configured to dynamically a generation size according to a generation time of the original packets. According to embodiments of the inventive concept, it is possible to use information provided from a VoIP codec to dynamically determine the boundary or size of a generation to decrease a standby time upon encoding/decoding, and may recover the loss of packets that may occur in a wired/wireless network.

Abstract: The present disclosure provides a method, a system, and an apparatus for data communication in an optical network system. A new encoding scheme is implemented in the following manner: performing 32-bit to 34-bit encoding on a data stream on which 8-bit/10-bit decoding has been performed, performing forward error correction encoding on the data stream on which the 32-bit to 34-bit encoding has been performed, and sending the encoded data stream; or performing forward error correction decoding on a received data stream, and performing 32-bit to 34-bit decoding on the data stream on which the forward error correction decoding has been performed. In this way, a bandwidth resource of a line is saved; line monitoring can be implemented without interrupting a service, which is easy to implement and greatly improves various types of performance of the system.

Abstract: A first network device including a physical layer device. The physical layer device is configured to receive data for transmission to a second network device and receive sideband data for transmission to the second network device. The sideband data corresponds to control information, management information, and/or status information. The physical layer device is further configured to provide, via a first wired connection, the data for transmission to the second network device, generate alignment markers, insert the sideband data into the alignment markers, and selectively provide, via the same first wired connection, the alignment markers including the sideband data inserted by the physical layer device.

Abstract: Provided are an apparatus and method for generating common locator bits to locate a device or column error during error correction operation for a memory subsystem having memory modules, each including a plurality of memory devices. Error detection logic generates common locator bits from device bits in a plurality of memory devices in one of the memory modules. The error detection logic uses the common locator bits to locate a column across at least two of the memory devices having an error when there is a column error and to locate a memory device in the devices having an error when there is a device error. A same of the common locator bits are used to locate both one of the columns and the memory devices having errors. Error correction is performed on the located memory device or column having the error.

Abstract: A system implements adaptive desaturation for the min-sum decoding of LDPC codes. Specifically, when an-above threshold proportion of messages from check nodes to variable nodes (CN-to-VN messages) are saturated to a maximum fixed-precision value, all CN-to-VN messages are halved. This facilitates the saturation of correct messages and boosts error correction over small trapping sets. The adaptive desaturation approach reduces the error floor by orders of magnitudes with negligible add-on circuits.

Abstract: When a channel between a transmission apparatus and a reception apparatus is distorted by multipath fading or other reasons, linear interpolation between pilot subcarriers produces a large estimation error, resulting in an increase in an equalization error and a decrease in reception performance. The present invention allows feedback of a signal that undergoes error correction, reduction in the channel estimation error through repeated channel estimation, and improvement in the reception performance.

Abstract: Provided is method and apparatus of compressing and restoring an image using filter information. The image compression apparatus may generate a reduced image by sampling an input image, determine filter information based on the input image and a decoded reduced image, and code the filter information and the decoded reduced image. Accordingly, a deterioration in an image quality may be prevented in transmitting the image using a limited bandwidth.

Abstract: A data storage device includes a controller and a non-volatile memory coupled to the controller. The controller is configured to generate first parity information based on first data and to generate second parity information based on second data. The non-volatile memory is configured to store the first data and the second data. The data storage device also includes a buffer configured to store the first parity information. The controller is further configured to generate joint parity information associated with the first data and the second data in response to a combined data size of the first data and the second data satisfying a threshold.

Abstract: Methods and apparatus 3 are provided for encoding data for storage in multilevel memory cells 2 having q cell-levels. Input data words are encoded into respective codewords, each having N symbols with one of q symbol-values, via an encoding scheme adapted such that the q symbol-values have unequal multiplicities within at least some codewords, and the multiplicity of each of the q symbol-values in every codeword is no less than ?, where ??2 and more preferably ?3. A first type of encoding scheme uses recursive symbol-flipping to enforce the ?-constraint, adding indicator symbols to indicate the flipped symbols. A second type of encoding scheme maps data words to codewords of a union of permutation codes, the initial vectors for these permutation codes being selected to enforce the ?-constraint. The N qary symbols of each codeword are supplied for storage in respective cells of the multilevel memory 2.

Abstract: Modifying a digital data stream that includes immediately consecutive code words of different length by segmenting, based on a certain block grid, the digital data stream. Each block of the block grid includes a fixed number of bits. It is determined whether all bits of the last block associated with the digital data stream are occupied by data of the digital data stream. If not all bits of the last block are occupied, the unoccupied bits of the last block are padded with bits of an end-of-record (EOR) indicator. If all bits of the last block are occupied, attaching an EOR indicator to the digital data stream is skipped.

Abstract: An operation method of a flash memory system includes a hard decision decoding on a codeword and a soft decision decoding on an error message block. The hard decision decoding on a codeword and the codeword comprises message blocks encoded with row constituent codes and column constituent codes according to a block-wise concatenated BCH (BC-BCH) method. When the hard decision decoding fails, the error message block to which the hard decision decoding fails among a plurality of the message blocks is identified. Soft decision information corresponding to the row constituent codes and the column constituent codes of the error message block is generated and the soft decision decoding on the error message block based on the soft decision information is performed.

Abstract: In one embodiment, a method includes identifying one or more channel queues associated with one or more RF channels, wherein the one or more RF channels are associated with a Data Over Cable System Interface Specification (DOCSIS) bonding group and wherein the DOCSIS bonding group receives downstream data from a first node, determining a data usage of the DOCSIS bonding group, determining that a data rate of the downstream data is to be modified based on at least one of the one or more channel queues or the data usage of the DOCSIS bonding group, and causing the first node to modify the data rate of the downstream data based on the determination.

Abstract: An integrated circuit device includes an output buffer circuit that provides a first output having a first code rate. The first output is provided in response to a first indication of a change in a parameter that affects an error rate of the first output. The first output includes redundant information. The output buffer circuit provides a second output having a second code rate. The second output is provided in response to a second indication of the second output having an error rate that is different than the error rate of the first output. The second code rate of the second output is different than the first code rate.

Abstract: A transmitting system and method therein are disclosed, by which mobile service data is received and processed. The transmitting system includes an encoder, a signaling encoder, a group formatter, a transmission unit. The encoder encodes mobile data and the signaling encoder encodes signaling information. The group formatter forms data groups having the encoded mobile and signaling information. The data groups have a plurality of data blocks and specific data blocks of the plurality of data blocks include known data sequences. The transmission unit transmit broadcast signal including a parade that includes a collection of data groups having same FEC parameters. And the signaling information includes information identifying the parade and first assigned data group number for the parade to which a first assigned data group belongs.