Burst Error Correction Patents (Class 714/762)
  • Patent number: 10938617
    Abstract: A phase adjustment method, a related device, and a system, the method comprising obtaining phases and amplitudes of M symbols adjusting a phase of each of the M symbols to an adjusted phase, wherein the adjusting the phase of each of the M symbols to the adjusted phase includes performing at least one of setting the adjusted phase of the first symbol to the phase of the respective symbol, or setting the adjusted phase of a symbol greater than the first symbol according to the phase of the respective symbol and further according to a sum of phases of all symbols whose amplitudes are greater than an amplitude threshold in a group of one or more symbols from a first symbol to an (i?1)th symbol.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: March 2, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventor: Qingyong Chen
  • Patent number: 10929070
    Abstract: A computer-implemented method, according to one embodiment, includes: sending an instruction to write a first copy of a first portion of data to a first partition on a first tape, and sending an instruction to write a second copy of the first portion of data to a second partition on a second tape. The first tape has at least the first partition and a second partition, while the second tape also has at least a first partition and the second partition. The first partition on each of the first and second tapes is closer to a beginning of the respective tape than the second partition on the respective tape. The second tape is also different than the first tape.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: February 23, 2021
    Assignee: International Business Machines Corporation
    Inventor: Kohei Taguchi
  • Patent number: 10860424
    Abstract: A method for execution by one or more processing modules of a storage network (SN) begins with the one or more processing modules scanning a storage node of the SN at a predetermined interval to determine whether an erasure encoded data slice (EEDS) of a set of erasure encoded data slices (EEDSs) is corrupt, where the set of erasure encoded data slices (EEDSs) is generated from object data using an erasure error encoding dispersal function. The method continues with the one or more processing modules determining that an EEDS is corrupt and in response, rebuilding the EEDS in place in the storage node.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: December 8, 2020
    Assignee: PURE STORAGE, INC.
    Inventors: Greg Dhuse, Andrew Baptist, Zachary J. Mark, Jason K. Resch, Ilya Volvovski
  • Patent number: 10833799
    Abstract: A device and method for receiving communications with dynamic data correction, the method including receiving at a receiving device a data packet from a sending device, the data packet including a header, and a data payload including one or more message blocks and corresponding redundancy blocks; recognizing, via pre-configuration of the receiving device, that there are redundancy blocks to receive along with the one or more message blocks and reading in the message blocks and corresponding redundancy blocks; determining that at least one of the message blocks is defective (e.g., corrupt, missing, etc.); processing one or more of the redundancy blocks to correct the defective message blocks; and optionally sending a response message to the sending device. The method may further include identifying which message blocks are defective and sending a request for, and receiving, redundancy blocks corresponding to the identified defective message blocks.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: November 10, 2020
    Assignee: ITRON GLOBAL SARL
    Inventors: Hartman Van Wyk, Gilles Picard
  • Patent number: 10833848
    Abstract: Disclosed herein are methods, systems, and apparatus, including computer programs encoded on computer storage media, for storing blockchain data. One method includes receiving a request from an application component of a blockchain node to execute one or more software instructions in a trusted execution environment (TEE); determining one or more blockchain node blocks for executing the one or more software instructions; performing error correction coding of the one or more blocks in the TEE to generate one or more encoded blocks; dividing each of the one or more encoded blocks into a plurality of datasets; selecting one or more datasets from each of the one or more encoded blocks; and hashing the one or more datasets to generate one or more hash values corresponding to the one or more datasets for use in replacing the one or more datasets to save storage space of the blockchain node.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: November 10, 2020
    Assignee: Alibaba Group Holding Limited
    Inventor: Haizhen Zhuo
  • Patent number: 10790969
    Abstract: Disclosed herein are methods, systems, and apparatus, including computer programs encoded on computer storage media, for storing blockchain data. One method includes receiving a request from an application component of a blockchain node to execute one or more software instructions in a trusted execution environment (TEE); determining one or more blockchain node blocks for executing the one or more software instructions; performing error correction coding of the one or more blocks in the TEE to generate one or more encoded blocks; dividing each of the one or more encoded blocks into a plurality of datasets; selecting one or more datasets from each of the one or more encoded blocks; and hashing the one or more datasets to generate one or more hash values corresponding to the one or more datasets for use in replacing the one or more datasets to save storage space of the blockchain node.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: September 29, 2020
    Assignee: Alibaba Group Holding Limited
    Inventor: Haizhen Zhuo
  • Patent number: 10659226
    Abstract: A data encryption method performed at a computing device includes: receiving a data encryption request, the data encryption request indicating original data that needs to be encrypted and at least two target storage devices that are communicatively connected to the computing device; in response to the data encryption request: separately obtaining unique device information of the at least two target storage devices; generating, based on the unique device information, a public key according to a preset policy; encrypting the original data by using the public key to obtain ciphertext; and destructing relevant data of the public key from the computing device, and storing the ciphertext into the at least two target storage devices.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: May 19, 2020
    Assignee: Tencent Technology (Shenzhen) Company Limited
    Inventors: Luyi Lin, Yufei Wang
  • Patent number: 10635909
    Abstract: A vehicular structure from motion (SfM) system can include an input to receive a sequence of image frames acquired from a camera on a vehicle and an SIMD processor to process 2D feature point input data extracted from the image frames so as to compute 3D points. For a given 3D point, the SfM system can calculate partial ATA and partial ATb matrices outside of an iterative triangulation loop, reducing computational complexity inside the loop. Multiple tracks can be processed together to take full advantage of SIMD instruction parallelism.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: April 28, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Deepak Kumar Poddar, Shyam Jagannathan, Soyeb Nagori, Pramod Kumar Swami
  • Patent number: 10560117
    Abstract: Disclosed herein are a system, non-transitory computer-readable medium, and method for encoding and decoding information on a data bearing medium. A message comprising a bit string is read. A plurality of substrings in the message may be associated with a phase invariant codeword.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: February 11, 2020
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Matthew D Gaubatz, Robert Ulichney, Steven J Simske
  • Patent number: 10298944
    Abstract: A decoding circuit applied to a multimedia apparatus is provided. The decoding circuit is for decoding encoded data to generate system information, and includes multiple processing circuits and a determination circuit. The multiple processing circuits individually process the encoded data to generate multiple processed signals, and respectively correspond to multiple bit combinations of a part of the system information. The determination circuit determines the system information according to the multiple processed signals.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: May 21, 2019
    Assignee: MSTAR SEMICONDUCTOR, INC.
    Inventors: Kuan-Chou Lee, Kai-Wen Cheng, Tai-Lai Tung
  • Patent number: 10296265
    Abstract: A computer-implemented method, according to one embodiment, includes: selecting a first tape to write a first copy of a first portion of data to, sending an instruction to write the first copy of the first portion of data to a first partition on the first tape, wherein the first tape has at least the first partition and a second partition, selecting a second tape that is different than the first tape to write a second copy of the first portion of data to, and sending an instruction to write the second copy of the first portion of data to a second partition on the second tape, wherein the second tape has at least a first partition and the second partition. The first partition on each of the first and second tapes is closer to a beginning of the respective tape than the second partition on the respective tape.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: May 21, 2019
    Assignee: International Business Machines Corporation
    Inventor: Kohei Taguchi
  • Patent number: 10291783
    Abstract: An overlay network platform facilitates a multi-party conference. End users participate in the conference using client-based web browser software, and using a protocol such as WebRTC. According to this disclosure, an enhanced “audio” experience for the conference is providing by collecting and correlating microphone data from multiple co-located clients, and then constructing (at the platform) a three-dimensional (3D) sound profile of the room in which the clients are co-located. By processing in the platform (as opposed to locally at each client), the approach enables platform-side creation of an ad-hoc, high quality microphone array that identifies the relative positions and orientations of the microphones that are being used by the clients. Individual audio streams received from the microphones are combined, and the relative position information (of the individual microphones) is used to render a single audio stream that represents a high quality recording of the audio in the common physical space.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: May 14, 2019
    Assignee: Akamai Technologies, Inc.
    Inventor: Abhijit C. Mehta
  • Patent number: 10270855
    Abstract: A method with a computer generating a first set of access requests regarding a first set of encoded data slices and storage units of a dispersed storage network. A first data segment is encoded into the first set of encoded data slices. The method continues with the computer generating a second set of access requests regarding a second set of encoded data slices and the storage units. A second data segment is encoded into the second set of encoded data slices. The method continues with the computer grouping the first set of access requests and the second set of access requests to produce a set of combined requests. The method continues with the computer sending the set of combined requests to the storage units.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: April 23, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Srinivas Palthepu, Vance T. Thornton, Jesse L. Young, John Quigley, Andrew Baptist, Greg Dhuse
  • Patent number: 10230692
    Abstract: A dispersed storage (DS) processing module may include a gateway module operable to communicate data and/or corresponding information with a user device and may include an access module operable to segment outbound data of the data into one or more outbound data segments and aggregate one or more inbound data segments into inbound data of the data. The DS processing module may include a grid module operable to encode an outbound data segment of the one or more outbound data segments into a plurality of outbound encoded data slices and decode a plurality of inbound encoded data slices into an inbound data segment of the one or more inbound data segments. The DS processing module may include a storage module operable to output the plurality of outbound encoded data slices to a plurality of DS storage units and receive the plurality of inbound encoded data slices from the plurality of DS storage units.
    Type: Grant
    Filed: May 6, 2010
    Date of Patent: March 12, 2019
    Assignee: International Business Machines Corporation
    Inventors: John Quigley, Greg Dhuse
  • Patent number: 10225271
    Abstract: A method includes receiving a data access request from a requesting device regarding one or more encoded data slices. A data object is dispersed storage error encoded into a plurality of sets of encoded data slices that are stored in storage units of a dispersed storage network (DSN). The method further includes determining whether one or more of the data access request, the requesting device, and the data object is affiliated with a DSN entity flagged for enhanced security monitoring. When the one or more of the data access request, the requesting device, and the data object is affiliated with the DSN entity flagged for enhanced security monitoring, the method further includes determining enhanced security monitoring parameters; generating security monitoring information in accordance with the enhanced security monitoring parameters; determining a DSN security threat level; and implementing a security protocol based on the DSN security threat level.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: March 5, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Manish Motwani, Brian F. Ober, Jason K. Resch
  • Patent number: 10171107
    Abstract: Disclosed herein are a system, non-transitory computer-readable medium, and method for encoding and decoding information on a data bearing medium. A message comprising a bit string is read. A plurality of substrings in the message may be associated with a phase invariant codeword.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: January 1, 2019
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Matthew D Gaubatz, Robert Ulichney, Steven J Simske
  • Patent number: 10049008
    Abstract: A method includes determining whether at least a portion of a data object requires rebuilding, wherein the data object is stored in accordance with a RAID format. The method further includes, when the at least a portion of the data object requires rebuilding, reconstructing stripes from sets of data blocks and parity blocks. The method further includes dividing the recovered data object into data segments. The method further includes dispersed storage error encoding the data segments in accordance with dispersed storage error encoding parameters to produce sets of encoded data slices, wherein a data segment is recoverable from a threshold number of encoded data slices. The method further includes issuing sets of write requests to write the sets of encoded data slices into storage units of a dispersed storage network (DSN).
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: August 14, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gary W. Grube, Timothy W. Markison
  • Patent number: 9858143
    Abstract: A method includes obtaining a data object for storage. The method further includes generating a data object identifier for the data object. The method further includes determining a vault for storing the data object. The method further includes generating a source name for the data object based on the data object identifier and a vault identifier. The method further includes dispersed storage error encoding the data object to produce a plurality of sets of encoded data slices. The method further includes generating a plurality of sets of slice names, wherein each of the slice names of the plurality of slice names includes the source name. The method further includes sending, in accordance with the plurality of sets of slice names, the plurality of sets of encoded data slices to a set of storage units of the DSN that supports the vault for storage therein.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: January 2, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Manish Motwani, S. Christopher Gladwin, Jesse Louis Young, Matthew Michael England
  • Patent number: 9842222
    Abstract: A method begins by a requesting entity issuing a rebuild request regarding an encoded data slice to at least some of a set of distributed storage (DS) units. In response to the rebuild request, the method continues with each of at least some of the DS units of the set of DS units generating a partial slice corresponding to the encoded data slice to be rebuilt based on one of a set of encoded data slices stored by the respective DS unit to produce an array of partial slices. The method continues with the at least some of the DS units encrypting the array of partial slices using a set of encryption keys to produce an array of encrypted partial slices. The method continues with the requesting entity rebuilding the encoded data slice from the array of encrypted partial slices.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: December 12, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Greg Dhuse, Jason K. Resch
  • Patent number: 9819659
    Abstract: Provided are a method, system, and article of manufacture for iterative data secret-sharing transformation and reconversion. In one aspect, data secret-sharing transformation and reconversion is provided in which each bit of an input stream of bits of data is split, on a bit by bit basis, into a pair of secret-sharing bits, and the secret-sharing bits of each pair of secret-sharing bits are separated into separate streams of secret-sharing bits. In this manner, one secret-sharing bit of each pair of secret-sharing bits may be placed in one stream of secret-sharing bits and the other secret-sharing bit of each pair may be placed in another stream of secret-sharing bits different from the one stream of secret-sharing bits. Confidentiality of the original input stream may be protected in the event one but not both streams of secret-sharing bits is obtained by unauthorized personnel.
    Type: Grant
    Filed: July 15, 2016
    Date of Patent: November 14, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Paul A. Jennas, II, Jason L. Peipelman, Joshua M. Rhoades, Matthew J. Ward
  • Patent number: 9781208
    Abstract: A method begins by a processing module of a dispersed storage network (DSN) obtaining an identifier (ID) piece of multiple ID pieces regarding a registry fragment of a distributed DSN registry. The method continues with the processing module performing a function on the ID piece to obtain a registry fragment alias, wherein performance of the function on the multiple ID pieces would produce multiple registry fragment aliases. The method continues with the processing module determining DSN addressing information for the registry fragment based on the registry fragment alias, wherein the DSN addressing information is determinable from any one of the multiple registry fragment aliases. The method continues with the processing module receiving a response regarding the registry fragment when a local copy of the registry fragment is not up-to-date.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: October 3, 2017
    Assignee: International Business Machines Corporation
    Inventors: Wesley Leggette, Jason K. Resch
  • Patent number: 9740657
    Abstract: A memory device for multiple processors capable of processing a plurality of memory access requests and a memory system having the same are provided. The memory device includes one command and control signal port configured to receive a command and control signal from a memory controller, one address port configured to receive an address signal from the memory controller, a data port configured to form a plurality of data channels being independently driven to simultaneously process a plurality of memory access requests of the memory controller, and a plurality of memory banks divided into a plurality of sub-banks to simultaneously perform operations according to the plurality of memory access requests when the plurality of memory access requests are sequentially transmitted through the command and control signal port and the address port.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: August 22, 2017
    Assignee: Foundation of Soongsil University-Industry Cooperation
    Inventor: Chanho Lee
  • Patent number: 9727755
    Abstract: A method and system for processing information. An apparatus divides target information into N pieces of divided data using a secret sharing scheme in which a predetermined number (K) of pieces of the N pieces of divided data is required to restore the target information, wherein N>K. The apparatus is an information processing device or an external storage device. The apparatus selects M pieces from the N pieces (K<M<N). After selecting the M pieces, the M pieces are stored in the external storage device which limits a totality of pieces of the N pieces being stored on the external storage device to the M pieces. After storing the M pieces, the target information is restored from at least K pieces of the N pieces after which D pieces of the M pieces in the external storage device are destroyed (D>M?K).
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: August 8, 2017
    Assignee: International Business Machines Corporation
    Inventor: Kiyotaka Nakayama
  • Patent number: 9705640
    Abstract: A method and apparatus for decoding received packets in a broadcasting and communication system is provided. The method includes reconstructing a source block by arranging source packets received from a sender on a two-dimensional array having a width of a given symbol size, and determining at least one Erased Subdivided Encoding Symbol Index (E-SESI) corresponding to at least one source packet which is not successfully received in the reconstructed source block, determining a symbol unit for Forward Error Correction (FEC) decoding based on the at least one E-SESI, and performing FEC decoding on the reconstructed source block depending on the determined symbol unit.
    Type: Grant
    Filed: October 4, 2013
    Date of Patent: July 11, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seho Myung, Hyun-Koo Yang, Sung-Hee Hwang
  • Patent number: 9703812
    Abstract: A method begins with a processing module initiating a rebuilding process for an encoded data slice of a set of encoded data slices and generating rebuilding information from one or more other encoded data slices of the set of encoded data slices. The method continues with the processing module creating a rebuilt encoded data slice for the encoded data slice based on the rebuilding information. The method continues with the processing module determining whether another encoded data slice of the set of encoded data slices requires rebuilding and when the other encoded data slice requires rebuilding, the method continues with the processing module creating another rebuilt encoded data slice for the other encoded data slice based on the rebuilding information without initiating another rebuilding process for the other encoded data slice.
    Type: Grant
    Filed: May 1, 2013
    Date of Patent: July 11, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Jason K. Resch
  • Patent number: 9626243
    Abstract: A method and device for error detection includes performing error detection for each data word received in a burst access to a memory. When no error is detected, the data words are written to a cache and indicated as valid data. In response to detecting an error in a data word, the error is corrected and the corrected data written to the cache without indicating the data as valid. In addition, the location of the detected error, indicating the data symbol associated with the error, is recorded in an error vector. The error vectors associated with each data word in the burst access are compared to determine whether a detected error was properly corrected.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: April 18, 2017
    Assignee: Advanced Micro Devices, Inc.
    Inventor: James O. Nicholson
  • Patent number: 9627092
    Abstract: A semiconductor device may include a memory core including a data cell region and a parity cell region, a parity calculation logic configured for generating a parity from data received by the parity calculation logic, and an error correcting logic configured for outputting error-corrected data by using data that is output from the data cell region and a parity that is output from the parity cell region.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: April 18, 2017
    Assignee: SK hynix Inc.
    Inventors: Won-Ha Choi, Seung-Min Lee
  • Patent number: 9608670
    Abstract: According to one embodiment, a method for processing data includes determining whether a PES is invalid while reading data from a magnetic medium using at least one data channel, determining whether a PES value is above a first predetermined threshold when the PES is valid, injecting error bits into a data stream in place of corresponding bits of decoded data when the PES is invalid and/or the PES value is above the first predetermined threshold, decoding the data using a run-length limited (RLL) decoder to produce the decoded data based on the data from the magnetic medium, and outputting the data stream. Other methods, systems, and tape drives for processing data using error injection are described in more embodiments.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: March 28, 2017
    Assignee: International Business Machines Corporation
    Inventors: Nhan X. Bui, Setsuko Masuda, Keisuke Tanaka, Kazuhiro Tsuruta
  • Patent number: 9578097
    Abstract: A computer includes a data transform algorithm, a data dispersal algorithm, and a network port. The data transform algorithm performs a data transformation on a data block to produce a transformed data block. The data dispersal algorithm performs a data dispersal function on the transformed data block to produce a plurality of data slices, wherein each of the plurality of data slices includes less than all data contained in the transformed data block. The network port is operable to transmit a plurality of write commands to a plurality of slice servers, wherein each of the plurality of write commands includes a corresponding one of the plurality of data slices. The network port is further operable to receive verification of storage of at least some of the plurality of data slices from at least some of the plurality of slice servers.
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: February 21, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: S. Christopher Gladwin, Greg Dhuse, Vance Thornton, Mainsh Motwani, Jason Resch, Ilya Volvovski, Jamie Bellanca, John Quigley
  • Patent number: 9575834
    Abstract: In one embodiment, a system includes a processor and logic configured to receive data including a plurality of data elements, each data element having one or more bits, and pass each data element along with a corresponding parity bit to an input of a data path, a first binary sequence generator configured to create a binary sequence having a plurality of bonus bits, wherein a total length of the binary sequence is equal to or greater than a maximum burst size of the data, and a first parity module configured to provide a parity calculation using bits of each data element of the data with a bonus bit from the binary sequence to produce a parity bit for each data element. Other systems, methods, and computer program products for providing end-to-end parity generation and checking that the scheme provides coverage for both data and sequencing faults are also disclosed.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: February 21, 2017
    Assignee: International Business Machines Corporation
    Inventor: David A. Pierce
  • Patent number: 9537609
    Abstract: A processing module of a computing device alternatingly sends a stream of data to a first or second processing device. When receiving the stream of data, the first processing device performs a first portion of a dispersed storage error encoding function on the received stream of data to produce a plurality of sets of a threshold number of slices and writes the plurality of sets of the threshold number of slices into first memory of a dispersed storage network (DSN). When not receiving the stream of data, the first processing device reads the plurality of sets of the threshold number of slices from the first memory, performs a second portion of the dispersed storage error encoding function using the plurality of sets of the threshold number of slices to produce a plurality of sets of redundancy slices, and writes the plurality of sets of redundancy slices into second DSN memory.
    Type: Grant
    Filed: June 17, 2013
    Date of Patent: January 3, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: S. Christopher Gladwin, Timothy W. Markison, Greg Dhuse, Thomas Franklin Shirley, Jr., Wesley Leggette, Jason K. Resch, Gary W. Grube
  • Patent number: 9497175
    Abstract: Provided are a method, system, and article of manufacture for iterative data secret-sharing transformation and reconversion. In one aspect, data secret-sharing transformation and reconversion is provided in which each bit of an input stream of bits of data is split, on a bit by bit basis, into a pair of secret-sharing bits, and the secret-sharing bits of each pair of secret-sharing bits are separated into separate streams of secret-sharing bits. In this manner, one secret-sharing bit of each pair of secret-sharing bits may be placed in one stream of secret-sharing bits and the other secret-sharing bit of each pair may be placed in another stream of secret-sharing bits different from the one stream of secret-sharing bits. Confidentiality of the original input stream may be protected in the event one but not both streams of secret-sharing bits is obtained by unauthorized personnel.
    Type: Grant
    Filed: May 6, 2015
    Date of Patent: November 15, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Paul A. Jennas, II, Jason L. Peipelman, Joshua M. Rhoades, Matthew J. Ward
  • Patent number: 9497022
    Abstract: Certain aspects of a method and system for improved fault tolerance in distributed customization controls using non-volatile memory are disclosed. Aspects of one method may include mapping an input control signal to a plurality of input logic circuits within a security processor. A plurality of independent processing paths may be defined between each of the plurality of input logic circuits and an output logic circuit. Each of the plurality of independent processing paths may comprise one or more logic circuits. The input control signal may be routed via at least a portion of the plurality of independent processing paths. The portion of the plurality of independent processing paths may be combined in the output logic circuit to generate the input control signal.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: November 15, 2016
    Assignee: Broadcom Corporation
    Inventors: Iue-Shuenn Chen, Xuemin Chen
  • Patent number: 9495241
    Abstract: A storage module is configured to store data segments, such as error-correcting code (ECC) codewords, within an array comprising two or more solid-state storage elements. The data segments may be arranged in a horizontal arrangement, a vertical arrangement, a hybrid channel arrangement, and/or vertical stripe arrangement within the array. The data arrangement may determine input/output performance characteristics. An optimal adaptive data storage configuration may be based on read and/or write patterns of storage clients, read time, stream time, and so on. Data of failed storage elements may be reconstructed by use of parity data and/or other ECC codewords stored within the array.
    Type: Grant
    Filed: March 4, 2013
    Date of Patent: November 15, 2016
    Assignee: LONGITUDE ENTERPRISE FLASH S.A.R.L.
    Inventors: David Flynn, John Strasser, Bill Inskeep
  • Patent number: 9459955
    Abstract: A data storage device includes a memory and a controller. The controller is configured to scramble data using a scramble key to produce scrambled data and to encode the scramble key to produce an encoded scramble key. The controller is further configured to store the encoded scramble key and the scrambled data to the memory.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: October 4, 2016
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Daniel Edward Tuers, Steven Cheng
  • Patent number: 9436398
    Abstract: A memory and a method of storing data in a memory are provided. The memory comprises a memory block comprising data bits and additional bits. The memory includes logic which, when receiving a first command, writes data into the data bits of the memory block, wherein the data is masked according to a first input. The logic, in response to a second command, writes data into the data bits of the memory block and writes a second input into the additional bits of the memory block.
    Type: Grant
    Filed: June 2, 2015
    Date of Patent: September 6, 2016
    Assignee: Advanced Micro Devices, Inc.
    Inventors: James O'Connor, Warren Kruger
  • Patent number: 9432341
    Abstract: A method begins by a source processing module securing data based on a key stream to produce secured data, where the key stream is derived from a unilateral encryption key accessible only to the source processing module, and sending the secure data to an intermediator processing module, where desecuring the secured data is divided into two partial desecuring stages. The method continues with the intermediator processing module partially desecuring the secure data in accordance with a first partial desecuring stage to produce partially desecured data and sending the partially desecured data to a destination processing module. The method continues with the destination processing module further partially desecuring the partially desecured data in accordance with a second desecuring stage to recover the data, where the destination processing module does not have access to the encryption key or to the key stream.
    Type: Grant
    Filed: April 18, 2014
    Date of Patent: August 30, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jason K. Resch, Greg Dhuse
  • Patent number: 9397703
    Abstract: Some embodiments involve a method of detecting an error of a memory device. It is determined whether the detected error is a catastrophic error. If it is determined that the error is a catastrophic error, an error recovery process is bypassed. Some aspects involve a method of detecting an error of a memory device. It is determined whether a counter value is above a predetermined value. If it is determined that the counter value is above the predetermined value an error recovery process is bypassed and a redundant parity recovery process is performed.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: July 19, 2016
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Mai A. Ghaly, Ara Patapoutian
  • Patent number: 9379739
    Abstract: Aspects of the present disclosure provide an apparatus and methods for recovering data from a control channel in wireless communications. An apparatus decodes a CRC appended codeword to obtain a decoded codeword, and computes a first syndrome of the decoded codeword utilizing a parity check matrix. If the first syndrome is non-zero, The apparatus determines a location S and a length K of an error pattern in bits of the decoded codeword, an index set ? based on the values of S and K. A linear system is formed based on the parity check matrix and the error pattern in accordance with the index set ?. The apparatus determines a solution of the linear system, wherein the solution includes an estimated error pattern. A recovered codeword can be determined by removing the estimated error pattern from the decoded codeword.
    Type: Grant
    Filed: January 7, 2015
    Date of Patent: June 28, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Chulong Chen, Amith Vikram Chincholi, Harish Venkatachari
  • Patent number: 9378091
    Abstract: A user device includes a browser module, a DSN interface to a local or external DSN memory and a DS processing module coupled to the DSN interface for storing and retrieving the data object from the DSN memory, wherein the data object is divided into a plurality of data segments and wherein each of the plurality of data segments is stored in the DSN memory as a plurality of encoded data slices that are generated based on an error encoding dispersal function. The browser module is operable to interpret a user input as a request to display a data object, determine the data object is stored in the DSN memory, request the DS processing module to retrieve the data object from the DSN memory and request an application program to open the data object for display.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: June 28, 2016
    Assignee: International Business Machines Corporation
    Inventor: Greg Dhuse
  • Patent number: 9363131
    Abstract: A device can include a stream builder configured to encode media data at a plurality of different coding rates and to generate a plurality of streams encapsulating the encoded media data. Each of the plurality of streams can have an associated protection level that corresponds to an ability of packet reconstruction and a bandwidth cost. The system can also include a stream replicator configured to transmit each of the plurality of streams to a content receiver via N number of networks. The system can further include an adapter configured to control the coding rate and the protection level of each of the plurality of streams based on a feedback signal transmitted from the content receiver. The feedback signal can characterize a packet loss rate of each of the plurality of streams.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: June 7, 2016
    Assignee: Imagine Communications Corp.
    Inventors: Keyur R. Parikh, Junius A. Kim
  • Patent number: 9362957
    Abstract: A systematic encoder such as a systematic polar encoder for channel encoding to ameliorate the effects of noise in a transmission channel. The codeword carries a data word to be transmitted transparently, and also carries a parity part derived from the data word and a fixed word. Implementations advantageously reduce coding complexity to the order of N log(N), wherein N is the dimension of a matrix of the nth Kronecker power associated with a matrix effectively employed by the encoder.
    Type: Grant
    Filed: August 13, 2015
    Date of Patent: June 7, 2016
    Assignee: POLARAN YAZILIM BILISIM DANISMANLIK ITHALAT IHRACAT SANAYI TICARET LIMITED SIRKETI
    Inventor: Erdal Arikan
  • Patent number: 9317352
    Abstract: A Galois field arithmetic operation circuit substituting (2^m?1) elements (m is an integer) expressed by m bits of Galois field GF(2^m) includes: a base calculation unit configured to calculate m linear independent elements out of the (2^m?1) elements; and a linear development unit configured to calculate the remaining (2^m?1?m) elements not included in the m linear independent elements by combination of the m linear independent elements respectively. The Galois field arithmetic operation circuit may be included in a memory device or other system.
    Type: Grant
    Filed: September 12, 2013
    Date of Patent: April 19, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Koji Murata
  • Patent number: 9311184
    Abstract: A method begins by a processing module receiving data for storage and interpreting the data to identify the data as redundant array of independent disks (RAID) data. The method continues with the processing module interpreting the RAID data to identify at least one of RAID block data and RAID parity data. When the RAID data includes RAID block data and RAID parity data the method continues with the processing module encoding the RAID block data in accordance with error coding dispersal storage function parameters to produce at least one set of encoded data slices and outputting the at least one set of encoded data slices to a dispersed storage network memory.
    Type: Grant
    Filed: December 31, 2010
    Date of Patent: April 12, 2016
    Assignee: CLEVERSAFE, INC.
    Inventors: Gary W. Grube, Timothy W. Markison
  • Patent number: 9274890
    Abstract: A storage device of a DSN includes a plurality of memory devices, an interface, and a processing module. The storage device receives an encoded data slice of a set of encoded data slices, wherein a data segment is dispersed storage error encoded to produce the set of encoded data slices. The dispersed storage error encoding includes arranging the data segment into a data matrix of data blocks, generating an encoded data matrix from the data matrix and an encoding matrix, and arranging encoded data blocks of the encoded data matrix into the set of encoded data slices. The storage unit then divides the encoded data slice into encoded data slice partitions and generates a parity data partition therefrom. The storage device then stores the encoded data slice partitions and the parity data partition in separate memory devices.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: March 1, 2016
    Assignee: International Business Machines Corporation
    Inventors: S. Christopher Gladwin, Wesley Leggette
  • Patent number: 9268637
    Abstract: An example integrated circuit includes a first memory array including a first plurality of data groups, each such data group including a respective plurality of data bits. The integrated circuit also includes a first error detection and correction (EDAC) circuit configured to detect and correct an error in a data group read from the first memory array. The integrated circuit also includes a first scrub circuit configured to access in a sequence each of the first plurality of data groups to correct any detected errors therein. Both the first EDAC circuit and the first scrub circuit include spatially redundant circuitry. The first EDAC circuit and the first scrub circuit may include buried guard ring (BGR) structures, and may include parasitic isolation device (PID) structures. The spatially redundant circuitry may include dual interlocked storage cell (DICE) circuits, and may include temporal filtering circuitry.
    Type: Grant
    Filed: March 15, 2014
    Date of Patent: February 23, 2016
    Assignee: SILICON SPACE TECHNOLOGY CORPORATION
    Inventors: David R. Gifford, Kevin E. Atkinson, James A. Jensen
  • Patent number: 9270298
    Abstract: A method begins with a processing module of a dispersed storage network (DSN) identifying an encoded data slice of a set of encoded data slices that requires rebuilding and identifying storage units of the DSN that store the set of encoded data slices. The method continues with the processing module determining a rebuilding metric regarding the identified encoded data slice and selecting a sub-set of the storage units for retrieving a decode threshold number of encoded data slices of the set of encoded data slices based on the rebuilding metric. When the decode threshold number of encoded data slices have been retrieved, the method continues with the processing module decoding the decode threshold number of encoded data slices to produce a reconstructed data segment and generating a rebuilt encoded data slice from the reconstructed data segment.
    Type: Grant
    Filed: July 20, 2014
    Date of Patent: February 23, 2016
    Assignee: International Business Machines Corporation
    Inventors: Greg Dhuse, Andrew Baptist, Jason K. Resch
  • Patent number: 9223380
    Abstract: A system and method for minimizing power consumption in a transceiver circuit that uses a digital high-speed serial communications link between at least two devices is presented. Comma code matching is generally used as a means for establishing byte synchronization and for determining and preventing data transfer errors. However, comma code matching, when performed in high speed serial communications links that can transfer data at rate of giga-bits per second, can use a significant amount of power. Thus, the system and method described herein maintain comma code matching in an off-state, and transition comma code matching from an off-state to an on-state when a substantive operational change occurs in the serial communications link.
    Type: Grant
    Filed: October 19, 2011
    Date of Patent: December 29, 2015
    Assignee: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL)
    Inventor: Andrei Radulescu
  • Patent number: 9203439
    Abstract: A method of generating a sequence of display frames for display on a display device, wherein the sequence of display frames are derived from a data string which is encoded to include error correction in order to enable recreation of the data string at a receiving device, includes dividing the data string to be encoded into a plurality of source segments; encoding the plurality of source segments to generate a plurality of codewords, each codeword comprising a plurality of codeword bits; and positioning codeword bits in the sequence of frames.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: December 1, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: John Collomosse, Timothy Paul James Gerard Kindberg
  • Patent number: 9166625
    Abstract: Circuits, integrated circuits, and methods are disclosed for interleaved parity computation. In one such example circuit, an interleaved parity computation circuit includes a first parity circuit that receives a first set of bits and a second parity circuit that receives a second set of bits. The first set of bits includes a first parity bit, and is received in the first parity circuit during a first clock cycle. The first parity circuit generates a first signal indicative of the parity of the first set of bits. The second set of bits includes a second parity bit, and is received in the second parity circuit during a second clock cycle. The second parity circuit generates a second signal indicative of the parity of the second set of bits. A combining circuit combines the first signal and the second signal into an alert signal.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: October 20, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Guorjuh Thomas Hwang, Chia Jen Chang