Abstract: Systems and methods are described that enable user terminals to eliminate or reduce the number of dummy bursts (or bursts with no data) they send. The systems and methods use two burst detectors, a first burst detector that analyzes the physical structure of the signal, and a second burst detector that analyzes the informational structure of the signal. Output from the first burst detector can be used to control operation of a signal decoder that decodes received signals. The second burst detector analyzes output from the signal decoder to determine the second burst indicator. In other words, the first burst detector can be implemented prior to decoding the received signal to provide a first estimate related to the presence or absence of a burst. This can then be used to limit the amount of processing performed by the signal decoder.

Abstract: Disclosed embodiments of the present disclosure relate, generally, to systems, methods, and devices for correction of burst-errors induced during transmission of encoded blocks of information. Some embodiments relate to decoders configured to test candidate corrections on a received block of information and select a candidate correction that best fits the characteristics of burst-errors expected for a type of transmission scheme. Such tested candidate corrections may be selected based on characteristics of burst-errors typically induced for a type of transmission scheme. Some embodiments relate to decoders configured to test candidate corrections for correcting burst-errors and perform standard error correcting techniques such as Reed-Solomon forward error correction techniques. Some embodiments relate to systems, such as serial/deserializer interfaces, that incorporate such decoders.

Abstract: A method for verifying information includes receiving a proof for a function to be evaluated from a proofer which has computed an output of the function. The proof is based on an evaluation key generated based on the function and a security parameter. Validity of the proof is verified based on a verification key generated based on the function and the security parameter. The function is defined as a mapping between matrix groups over a finite field and encoded into a polynomial that is described and implemented as an arithmetic circuit. The function to be evaluated is encoded such that the polynomial is a trace of a difference between the product of left and right input matrix polynomials of all gates of the arithmetic circuit and the output matrix polynomial of all gates of the arithmetic circuit.

Abstract: A computer-implemented method assigns one or more trophies to a user. A game is emulated in response to a request from a client device. A trophy trigger is detected during emulation of the game by comparing a memory value of the emulated game to a predetermined value and assigning the one or more trophies to the user based on the detected trophy trigger.

Abstract: Various embodiments relate to a method for multiplying a first and a second polynomial in the ring [X]/(XN?1) to perform a cryptographic operation in a data processing system, the method for use in a processor of the data processing system, including: receiving the first polynomial and the second polynomial by the processor; mapping the first polynomial into a third polynomial in a first ring and a fourth polynomial in a second ring using a map; mapping the second polynomial into a fifth polynomial in the first ring and a sixth polynomial in the second ring using the map; multiplying the third polynomial in the first ring with the fifth polynomial in the first ring to produce a first multiplication result; multiplying the fourth polynomial in the second ring with the sixth polynomial in the second ring to produce a second multiplication result using Renes multiplication; and combining the first multiplication result and the second multiplication result using the map.

Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which a host device may disable ECC functions of the memory devices. When the ECC function is disabled by the host device, the memory device may deactivate various ECC periphery components coupled with an ECC circuit of the memory device to reduce power consumption of the memory device. In some cases, the memory device may disconnect an electrical power supply to the ECC periphery components. In other cases, the memory device may selectively disable the ECC periphery components or block an access command from reaching the ECC periphery components during an access operation. Further, the ECC array may be configured to replace faulty portions of a main array of the memory device when the ECC function is disabled.

Abstract: Disclosed embodiments relate to systems and methods for performing instructions to transpose rectangular tiles. In one example, a processor includes fetch circuitry to fetch an instruction having fields to specify an opcode and locations of first destination, second destination, first source, and second source matrices, the specified opcode to cause the processor to process each of the specified source and destination matrices as a rectangular matrix, decode circuitry to decode the fetched rectangular matrix transpose instruction, and execution circuitry to respond to the decoded rectangular matrix transpose instruction by transposing each row of elements of the specified first source matrix into a corresponding column of the specified first destination matrix and transposing each row of elements of the specified second source matrix into a corresponding column of the specified second destination matrix.

Abstract: Memory controllers, devices, modules, systems and associated methods are disclosed. In one embodiment, a memory module includes a pin interface for coupling to a bus. The bus has a first width. The module includes at least one storage class memory (SCM) component and at least one DRAM component. The memory module operates in a first mode that utilizes all of the first width, and in a second mode that utilizes less than all of the first width.

Abstract: A method for adjustable error correction in a storage cluster is provided. The method includes determining health of a non-volatile memory of a non-volatile solid-state storage unit of each of a plurality of storage nodes in a storage cluster on a basis of per flash package, per flash die, per flash plane, per flash block, or per flash page. The determining is performed by the storage cluster. The plurality of storage nodes is housed within a chassis that couples the storage nodes as the storage cluster. The method includes adjusting erasure coding across the plurality of storage nodes based on the health of the non-volatile memory and distributing user data throughout the plurality of storage nodes through the erasure coding. The user data is accessible via the erasure coding from a remainder of the plurality of storage nodes if any of the plurality of storage nodes are unreachable.

Abstract: A phase adjustment method, a related device, and a system, the method comprising obtaining phases and amplitudes of M symbols adjusting a phase of each of the M symbols to an adjusted phase, wherein the adjusting the phase of each of the M symbols to the adjusted phase includes performing at least one of setting the adjusted phase of the first symbol to the phase of the respective symbol, or setting the adjusted phase of a symbol greater than the first symbol according to the phase of the respective symbol and further according to a sum of phases of all symbols whose amplitudes are greater than an amplitude threshold in a group of one or more symbols from a first symbol to an (i?1)th symbol.

Abstract: A computer-implemented method, according to one embodiment, includes: sending an instruction to write a first copy of a first portion of data to a first partition on a first tape, and sending an instruction to write a second copy of the first portion of data to a second partition on a second tape. The first tape has at least the first partition and a second partition, while the second tape also has at least a first partition and the second partition. The first partition on each of the first and second tapes is closer to a beginning of the respective tape than the second partition on the respective tape. The second tape is also different than the first tape.

Abstract: A method for execution by one or more processing modules of a storage network (SN) begins with the one or more processing modules scanning a storage node of the SN at a predetermined interval to determine whether an erasure encoded data slice (EEDS) of a set of erasure encoded data slices (EEDSs) is corrupt, where the set of erasure encoded data slices (EEDSs) is generated from object data using an erasure error encoding dispersal function. The method continues with the one or more processing modules determining that an EEDS is corrupt and in response, rebuilding the EEDS in place in the storage node.

Abstract: Disclosed herein are methods, systems, and apparatus, including computer programs encoded on computer storage media, for storing blockchain data. One method includes receiving a request from an application component of a blockchain node to execute one or more software instructions in a trusted execution environment (TEE); determining one or more blockchain node blocks for executing the one or more software instructions; performing error correction coding of the one or more blocks in the TEE to generate one or more encoded blocks; dividing each of the one or more encoded blocks into a plurality of datasets; selecting one or more datasets from each of the one or more encoded blocks; and hashing the one or more datasets to generate one or more hash values corresponding to the one or more datasets for use in replacing the one or more datasets to save storage space of the blockchain node.

Abstract: A device and method for receiving communications with dynamic data correction, the method including receiving at a receiving device a data packet from a sending device, the data packet including a header, and a data payload including one or more message blocks and corresponding redundancy blocks; recognizing, via pre-configuration of the receiving device, that there are redundancy blocks to receive along with the one or more message blocks and reading in the message blocks and corresponding redundancy blocks; determining that at least one of the message blocks is defective (e.g., corrupt, missing, etc.); processing one or more of the redundancy blocks to correct the defective message blocks; and optionally sending a response message to the sending device. The method may further include identifying which message blocks are defective and sending a request for, and receiving, redundancy blocks corresponding to the identified defective message blocks.

Abstract: Disclosed herein are methods, systems, and apparatus, including computer programs encoded on computer storage media, for storing blockchain data. One method includes receiving a request from an application component of a blockchain node to execute one or more software instructions in a trusted execution environment (TEE); determining one or more blockchain node blocks for executing the one or more software instructions; performing error correction coding of the one or more blocks in the TEE to generate one or more encoded blocks; dividing each of the one or more encoded blocks into a plurality of datasets; selecting one or more datasets from each of the one or more encoded blocks; and hashing the one or more datasets to generate one or more hash values corresponding to the one or more datasets for use in replacing the one or more datasets to save storage space of the blockchain node.

Abstract: A data encryption method performed at a computing device includes: receiving a data encryption request, the data encryption request indicating original data that needs to be encrypted and at least two target storage devices that are communicatively connected to the computing device; in response to the data encryption request: separately obtaining unique device information of the at least two target storage devices; generating, based on the unique device information, a public key according to a preset policy; encrypting the original data by using the public key to obtain ciphertext; and destructing relevant data of the public key from the computing device, and storing the ciphertext into the at least two target storage devices.

Abstract: A vehicular structure from motion (SfM) system can include an input to receive a sequence of image frames acquired from a camera on a vehicle and an SIMD processor to process 2D feature point input data extracted from the image frames so as to compute 3D points. For a given 3D point, the SfM system can calculate partial ATA and partial ATb matrices outside of an iterative triangulation loop, reducing computational complexity inside the loop. Multiple tracks can be processed together to take full advantage of SIMD instruction parallelism.

Abstract: Disclosed herein are a system, non-transitory computer-readable medium, and method for encoding and decoding information on a data bearing medium. A message comprising a bit string is read. A plurality of substrings in the message may be associated with a phase invariant codeword.

Abstract: A computer-implemented method, according to one embodiment, includes: selecting a first tape to write a first copy of a first portion of data to, sending an instruction to write the first copy of the first portion of data to a first partition on the first tape, wherein the first tape has at least the first partition and a second partition, selecting a second tape that is different than the first tape to write a second copy of the first portion of data to, and sending an instruction to write the second copy of the first portion of data to a second partition on the second tape, wherein the second tape has at least a first partition and the second partition. The first partition on each of the first and second tapes is closer to a beginning of the respective tape than the second partition on the respective tape.

Abstract: A decoding circuit applied to a multimedia apparatus is provided. The decoding circuit is for decoding encoded data to generate system information, and includes multiple processing circuits and a determination circuit. The multiple processing circuits individually process the encoded data to generate multiple processed signals, and respectively correspond to multiple bit combinations of a part of the system information. The determination circuit determines the system information according to the multiple processed signals.

Abstract: An overlay network platform facilitates a multi-party conference. End users participate in the conference using client-based web browser software, and using a protocol such as WebRTC. According to this disclosure, an enhanced “audio” experience for the conference is providing by collecting and correlating microphone data from multiple co-located clients, and then constructing (at the platform) a three-dimensional (3D) sound profile of the room in which the clients are co-located. By processing in the platform (as opposed to locally at each client), the approach enables platform-side creation of an ad-hoc, high quality microphone array that identifies the relative positions and orientations of the microphones that are being used by the clients. Individual audio streams received from the microphones are combined, and the relative position information (of the individual microphones) is used to render a single audio stream that represents a high quality recording of the audio in the common physical space.

Abstract: A method with a computer generating a first set of access requests regarding a first set of encoded data slices and storage units of a dispersed storage network. A first data segment is encoded into the first set of encoded data slices. The method continues with the computer generating a second set of access requests regarding a second set of encoded data slices and the storage units. A second data segment is encoded into the second set of encoded data slices. The method continues with the computer grouping the first set of access requests and the second set of access requests to produce a set of combined requests. The method continues with the computer sending the set of combined requests to the storage units.

Abstract: A dispersed storage (DS) processing module may include a gateway module operable to communicate data and/or corresponding information with a user device and may include an access module operable to segment outbound data of the data into one or more outbound data segments and aggregate one or more inbound data segments into inbound data of the data. The DS processing module may include a grid module operable to encode an outbound data segment of the one or more outbound data segments into a plurality of outbound encoded data slices and decode a plurality of inbound encoded data slices into an inbound data segment of the one or more inbound data segments. The DS processing module may include a storage module operable to output the plurality of outbound encoded data slices to a plurality of DS storage units and receive the plurality of inbound encoded data slices from the plurality of DS storage units.

Abstract: A method includes receiving a data access request from a requesting device regarding one or more encoded data slices. A data object is dispersed storage error encoded into a plurality of sets of encoded data slices that are stored in storage units of a dispersed storage network (DSN). The method further includes determining whether one or more of the data access request, the requesting device, and the data object is affiliated with a DSN entity flagged for enhanced security monitoring. When the one or more of the data access request, the requesting device, and the data object is affiliated with the DSN entity flagged for enhanced security monitoring, the method further includes determining enhanced security monitoring parameters; generating security monitoring information in accordance with the enhanced security monitoring parameters; determining a DSN security threat level; and implementing a security protocol based on the DSN security threat level.

Abstract: Disclosed herein are a system, non-transitory computer-readable medium, and method for encoding and decoding information on a data bearing medium. A message comprising a bit string is read. A plurality of substrings in the message may be associated with a phase invariant codeword.

Abstract: A method includes determining whether at least a portion of a data object requires rebuilding, wherein the data object is stored in accordance with a RAID format. The method further includes, when the at least a portion of the data object requires rebuilding, reconstructing stripes from sets of data blocks and parity blocks. The method further includes dividing the recovered data object into data segments. The method further includes dispersed storage error encoding the data segments in accordance with dispersed storage error encoding parameters to produce sets of encoded data slices, wherein a data segment is recoverable from a threshold number of encoded data slices. The method further includes issuing sets of write requests to write the sets of encoded data slices into storage units of a dispersed storage network (DSN).

Abstract: A method includes obtaining a data object for storage. The method further includes generating a data object identifier for the data object. The method further includes determining a vault for storing the data object. The method further includes generating a source name for the data object based on the data object identifier and a vault identifier. The method further includes dispersed storage error encoding the data object to produce a plurality of sets of encoded data slices. The method further includes generating a plurality of sets of slice names, wherein each of the slice names of the plurality of slice names includes the source name. The method further includes sending, in accordance with the plurality of sets of slice names, the plurality of sets of encoded data slices to a set of storage units of the DSN that supports the vault for storage therein.

Abstract: A method begins by a requesting entity issuing a rebuild request regarding an encoded data slice to at least some of a set of distributed storage (DS) units. In response to the rebuild request, the method continues with each of at least some of the DS units of the set of DS units generating a partial slice corresponding to the encoded data slice to be rebuilt based on one of a set of encoded data slices stored by the respective DS unit to produce an array of partial slices. The method continues with the at least some of the DS units encrypting the array of partial slices using a set of encryption keys to produce an array of encrypted partial slices. The method continues with the requesting entity rebuilding the encoded data slice from the array of encrypted partial slices.

Abstract: Provided are a method, system, and article of manufacture for iterative data secret-sharing transformation and reconversion. In one aspect, data secret-sharing transformation and reconversion is provided in which each bit of an input stream of bits of data is split, on a bit by bit basis, into a pair of secret-sharing bits, and the secret-sharing bits of each pair of secret-sharing bits are separated into separate streams of secret-sharing bits. In this manner, one secret-sharing bit of each pair of secret-sharing bits may be placed in one stream of secret-sharing bits and the other secret-sharing bit of each pair may be placed in another stream of secret-sharing bits different from the one stream of secret-sharing bits. Confidentiality of the original input stream may be protected in the event one but not both streams of secret-sharing bits is obtained by unauthorized personnel.

Abstract: A method begins by a processing module of a dispersed storage network (DSN) obtaining an identifier (ID) piece of multiple ID pieces regarding a registry fragment of a distributed DSN registry. The method continues with the processing module performing a function on the ID piece to obtain a registry fragment alias, wherein performance of the function on the multiple ID pieces would produce multiple registry fragment aliases. The method continues with the processing module determining DSN addressing information for the registry fragment based on the registry fragment alias, wherein the DSN addressing information is determinable from any one of the multiple registry fragment aliases. The method continues with the processing module receiving a response regarding the registry fragment when a local copy of the registry fragment is not up-to-date.

Abstract: A memory device for multiple processors capable of processing a plurality of memory access requests and a memory system having the same are provided. The memory device includes one command and control signal port configured to receive a command and control signal from a memory controller, one address port configured to receive an address signal from the memory controller, a data port configured to form a plurality of data channels being independently driven to simultaneously process a plurality of memory access requests of the memory controller, and a plurality of memory banks divided into a plurality of sub-banks to simultaneously perform operations according to the plurality of memory access requests when the plurality of memory access requests are sequentially transmitted through the command and control signal port and the address port.

Abstract: A method and system for processing information. An apparatus divides target information into N pieces of divided data using a secret sharing scheme in which a predetermined number (K) of pieces of the N pieces of divided data is required to restore the target information, wherein N>K. The apparatus is an information processing device or an external storage device. The apparatus selects M pieces from the N pieces (K<M<N). After selecting the M pieces, the M pieces are stored in the external storage device which limits a totality of pieces of the N pieces being stored on the external storage device to the M pieces. After storing the M pieces, the target information is restored from at least K pieces of the N pieces after which D pieces of the M pieces in the external storage device are destroyed (D>M?K).

Abstract: A method and apparatus for decoding received packets in a broadcasting and communication system is provided. The method includes reconstructing a source block by arranging source packets received from a sender on a two-dimensional array having a width of a given symbol size, and determining at least one Erased Subdivided Encoding Symbol Index (E-SESI) corresponding to at least one source packet which is not successfully received in the reconstructed source block, determining a symbol unit for Forward Error Correction (FEC) decoding based on the at least one E-SESI, and performing FEC decoding on the reconstructed source block depending on the determined symbol unit.

Abstract: A method begins with a processing module initiating a rebuilding process for an encoded data slice of a set of encoded data slices and generating rebuilding information from one or more other encoded data slices of the set of encoded data slices. The method continues with the processing module creating a rebuilt encoded data slice for the encoded data slice based on the rebuilding information. The method continues with the processing module determining whether another encoded data slice of the set of encoded data slices requires rebuilding and when the other encoded data slice requires rebuilding, the method continues with the processing module creating another rebuilt encoded data slice for the other encoded data slice based on the rebuilding information without initiating another rebuilding process for the other encoded data slice.

Abstract: A method and device for error detection includes performing error detection for each data word received in a burst access to a memory. When no error is detected, the data words are written to a cache and indicated as valid data. In response to detecting an error in a data word, the error is corrected and the corrected data written to the cache without indicating the data as valid. In addition, the location of the detected error, indicating the data symbol associated with the error, is recorded in an error vector. The error vectors associated with each data word in the burst access are compared to determine whether a detected error was properly corrected.

Abstract: A semiconductor device may include a memory core including a data cell region and a parity cell region, a parity calculation logic configured for generating a parity from data received by the parity calculation logic, and an error correcting logic configured for outputting error-corrected data by using data that is output from the data cell region and a parity that is output from the parity cell region.

Abstract: According to one embodiment, a method for processing data includes determining whether a PES is invalid while reading data from a magnetic medium using at least one data channel, determining whether a PES value is above a first predetermined threshold when the PES is valid, injecting error bits into a data stream in place of corresponding bits of decoded data when the PES is invalid and/or the PES value is above the first predetermined threshold, decoding the data using a run-length limited (RLL) decoder to produce the decoded data based on the data from the magnetic medium, and outputting the data stream. Other methods, systems, and tape drives for processing data using error injection are described in more embodiments.

Abstract: A computer includes a data transform algorithm, a data dispersal algorithm, and a network port. The data transform algorithm performs a data transformation on a data block to produce a transformed data block. The data dispersal algorithm performs a data dispersal function on the transformed data block to produce a plurality of data slices, wherein each of the plurality of data slices includes less than all data contained in the transformed data block. The network port is operable to transmit a plurality of write commands to a plurality of slice servers, wherein each of the plurality of write commands includes a corresponding one of the plurality of data slices. The network port is further operable to receive verification of storage of at least some of the plurality of data slices from at least some of the plurality of slice servers.

Abstract: In one embodiment, a system includes a processor and logic configured to receive data including a plurality of data elements, each data element having one or more bits, and pass each data element along with a corresponding parity bit to an input of a data path, a first binary sequence generator configured to create a binary sequence having a plurality of bonus bits, wherein a total length of the binary sequence is equal to or greater than a maximum burst size of the data, and a first parity module configured to provide a parity calculation using bits of each data element of the data with a bonus bit from the binary sequence to produce a parity bit for each data element. Other systems, methods, and computer program products for providing end-to-end parity generation and checking that the scheme provides coverage for both data and sequencing faults are also disclosed.

Abstract: A processing module of a computing device alternatingly sends a stream of data to a first or second processing device. When receiving the stream of data, the first processing device performs a first portion of a dispersed storage error encoding function on the received stream of data to produce a plurality of sets of a threshold number of slices and writes the plurality of sets of the threshold number of slices into first memory of a dispersed storage network (DSN). When not receiving the stream of data, the first processing device reads the plurality of sets of the threshold number of slices from the first memory, performs a second portion of the dispersed storage error encoding function using the plurality of sets of the threshold number of slices to produce a plurality of sets of redundancy slices, and writes the plurality of sets of redundancy slices into second DSN memory.

Abstract: Provided are a method, system, and article of manufacture for iterative data secret-sharing transformation and reconversion. In one aspect, data secret-sharing transformation and reconversion is provided in which each bit of an input stream of bits of data is split, on a bit by bit basis, into a pair of secret-sharing bits, and the secret-sharing bits of each pair of secret-sharing bits are separated into separate streams of secret-sharing bits. In this manner, one secret-sharing bit of each pair of secret-sharing bits may be placed in one stream of secret-sharing bits and the other secret-sharing bit of each pair may be placed in another stream of secret-sharing bits different from the one stream of secret-sharing bits. Confidentiality of the original input stream may be protected in the event one but not both streams of secret-sharing bits is obtained by unauthorized personnel.

Abstract: A storage module is configured to store data segments, such as error-correcting code (ECC) codewords, within an array comprising two or more solid-state storage elements. The data segments may be arranged in a horizontal arrangement, a vertical arrangement, a hybrid channel arrangement, and/or vertical stripe arrangement within the array. The data arrangement may determine input/output performance characteristics. An optimal adaptive data storage configuration may be based on read and/or write patterns of storage clients, read time, stream time, and so on. Data of failed storage elements may be reconstructed by use of parity data and/or other ECC codewords stored within the array.

Abstract: Certain aspects of a method and system for improved fault tolerance in distributed customization controls using non-volatile memory are disclosed. Aspects of one method may include mapping an input control signal to a plurality of input logic circuits within a security processor. A plurality of independent processing paths may be defined between each of the plurality of input logic circuits and an output logic circuit. Each of the plurality of independent processing paths may comprise one or more logic circuits. The input control signal may be routed via at least a portion of the plurality of independent processing paths. The portion of the plurality of independent processing paths may be combined in the output logic circuit to generate the input control signal.

Abstract: A data storage device includes a memory and a controller. The controller is configured to scramble data using a scramble key to produce scrambled data and to encode the scramble key to produce an encoded scramble key. The controller is further configured to store the encoded scramble key and the scrambled data to the memory.

Abstract: A memory and a method of storing data in a memory are provided. The memory comprises a memory block comprising data bits and additional bits. The memory includes logic which, when receiving a first command, writes data into the data bits of the memory block, wherein the data is masked according to a first input. The logic, in response to a second command, writes data into the data bits of the memory block and writes a second input into the additional bits of the memory block.

Abstract: A method begins by a source processing module securing data based on a key stream to produce secured data, where the key stream is derived from a unilateral encryption key accessible only to the source processing module, and sending the secure data to an intermediator processing module, where desecuring the secured data is divided into two partial desecuring stages. The method continues with the intermediator processing module partially desecuring the secure data in accordance with a first partial desecuring stage to produce partially desecured data and sending the partially desecured data to a destination processing module. The method continues with the destination processing module further partially desecuring the partially desecured data in accordance with a second desecuring stage to recover the data, where the destination processing module does not have access to the encryption key or to the key stream.

Abstract: Some embodiments involve a method of detecting an error of a memory device. It is determined whether the detected error is a catastrophic error. If it is determined that the error is a catastrophic error, an error recovery process is bypassed. Some aspects involve a method of detecting an error of a memory device. It is determined whether a counter value is above a predetermined value. If it is determined that the counter value is above the predetermined value an error recovery process is bypassed and a redundant parity recovery process is performed.

Abstract: A user device includes a browser module, a DSN interface to a local or external DSN memory and a DS processing module coupled to the DSN interface for storing and retrieving the data object from the DSN memory, wherein the data object is divided into a plurality of data segments and wherein each of the plurality of data segments is stored in the DSN memory as a plurality of encoded data slices that are generated based on an error encoding dispersal function. The browser module is operable to interpret a user input as a request to display a data object, determine the data object is stored in the DSN memory, request the DS processing module to retrieve the data object from the DSN memory and request an application program to open the data object for display.

Abstract: Aspects of the present disclosure provide an apparatus and methods for recovering data from a control channel in wireless communications. An apparatus decodes a CRC appended codeword to obtain a decoded codeword, and computes a first syndrome of the decoded codeword utilizing a parity check matrix. If the first syndrome is non-zero, The apparatus determines a location S and a length K of an error pattern in bits of the decoded codeword, an index set ? based on the values of S and K. A linear system is formed based on the parity check matrix and the error pattern in accordance with the index set ?. The apparatus determines a solution of the linear system, wherein the solution includes an estimated error pattern. A recovered codeword can be determined by removing the estimated error pattern from the decoded codeword.

Abstract: A systematic encoder such as a systematic polar encoder for channel encoding to ameliorate the effects of noise in a transmission channel. The codeword carries a data word to be transmitted transparently, and also carries a parity part derived from the data word and a fixed word. Implementations advantageously reduce coding complexity to the order of N log(N), wherein N is the dimension of a matrix of the nth Kronecker power associated with a matrix effectively employed by the encoder.