Viterbi Decoding Patents (Class 714/795)
  • Patent number: 10886039
    Abstract: A cable having good flammability performance and reduced smoke emission is provided.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: January 5, 2021
    Inventor: Eleni Karayianni
  • Patent number: 10887050
    Abstract: The method whereby user equipment receives a downlink signal in a wireless communication system, according to one embodiment of the present invention, comprises: receiving, from a base station, information on the length of a cyclic redundancy check (CRC) sequence to be added to information bits; receiving a downlink signal; and decoding the downlink signal by using a CRC sequence in the downlink signal on the basis of the information on the length of the CRC sequence, wherein the information on the length of the CRC sequence indicates a first length added for list decoding or a total CRC length obtained by adding the first length.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: January 5, 2021
    Assignee: LG Electronics Inc.
    Inventors: Kwangseok Noh, Bonghoe Kim
  • Patent number: 10673468
    Abstract: Methods, apparatuses, and systems for implementing error-correction in communication systems, particularly wireless communication systems, are provided. A Polar code-based encoding method combines first and second pluralities of information bits and error-correcting code bits, and a plurality of frozen bits, into an input vector. The input vector is encoded according to a Polar code to produce a first codeword, which improves the probability of successfully transmitting and receiving the codeword over a physical channel in the communication system.
    Type: Grant
    Filed: January 21, 2019
    Date of Patent: June 2, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yiqun Ge, Wuxian Shi
  • Patent number: 10651976
    Abstract: In accordance with an example embodiment of the present invention, disclosed is a method and an apparatus thereof for removing jitter introduced by a packet switched network. Each received audio frame comprises a primary portion and a redundancy portion. The redundancy portion comprises a partial redundant copy of a previous frame that is offset by k frames. If a frame n is lost, a frame n+k that comprises the partial redundant copy of the lost frame n, is located in a jitter buffer. Based on the frame n+k, a substitute frame n? substituting the lost frame n is created and a substitution indicator of the substitute frame n? is set to indicate that the redundancy portion of the substitute fame n? should be used in decoding.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: May 12, 2020
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
    Inventors: Stefan Bruhn, Tomas Frankkila, Karl Hellwig
  • Patent number: 10623018
    Abstract: A method of arrangement of an algorithm to calculate cyclic redundancy check (CRC) independent of the length of a polynomial generator and data stream which can be realized in digital implementation with a calculation latency of once clock cycle. The method allows a sequence of information and the corresponding polynomial generator be arranged into a transformation table.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: April 14, 2020
    Assignee: AKRIBIS SYSTEMS PTE LTD
    Inventors: Shee Jia Chin, Yong Min Kong
  • Patent number: 10581464
    Abstract: An embodiment encoder device for encoding an information word c=[c0, c1, . . . , cK-1] having K information bits, ci, includes an encoder for a tail biting convolutional code having a constraint length, L, where K<L?1; the encoder being configured to receive the K information bits; and encode the K information bits so as to provide an encoded code word. An embodiment decoder device for determining an information word c=[c0, c1, . . . , cK-1], having K information bits, ci, includes a decoder for a tail biting convolutional code having a constraint length, L, where K<L?1; the decoder being configured to: receive an input sequence; compute at least one reliability parameter based on the received input sequence; and determine an information word c based on the at least one reliability parameter.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: March 3, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Fredrik Berggren, Alberto Giuseppe Perotti
  • Patent number: 10425108
    Abstract: Certain aspects of the present disclosure relate to techniques and apparatus for increasing decoding performance and/or reducing decoding complexity. An exemplary method generally includes receiving, via a wireless medium, a codeword encoded using a tailless convolutional code (TLCC) with a known start state, evaluating a set of decoding candidate paths through a trellis decoder that originate at the known start state of the TLCC, performing, for each of a plurality of the decoding candidate paths, a back trace from a respective end state to the known start state, and selecting one of the decoding candidate paths based, at least in part, on path metrics generated while performing the back trace. Other aspects, embodiments, and features are also claimed and described.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: September 24, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Jamie Menjay Lin, Yang Yang, Joseph Binamira Soriaga
  • Patent number: 10367601
    Abstract: Control logic determines when a network condition has changed by evaluating network condition data. Based on a detected network condition change, the control logic reorders an encoder parameter controller execution sequence of a plurality of encoder parameter controllers. The control logic configures the plurality of reordered encoder parameter controllers so that an encoder parameter determination from a prior encoder parameter controller is used as a decision input for a subsequent encoder parameter controller. An encoder encodes data, such as audio data, video data or other type of data using the generated encoder control parameters from the reordered plurality of encoder parameter controllers. A related method is also disclosed.
    Type: Grant
    Filed: August 12, 2016
    Date of Patent: July 30, 2019
    Assignee: Google LLC
    Inventors: Tina le Grand, Niklas Blum, Minyue Li, Henrik Lundin, Michael Tschumi, Alexander Narest
  • Patent number: 9978014
    Abstract: A processing device includes a processor core and a number of calculation modules that each is configurable to perform any one of operations for a convolutional neuron network system. A first set of the calculation modules are configured to perform convolution operations, a second set of the calculation modules are reconfigured to perform averaging operations, and a third set of the calculation modules are reconfigured to perform dot product operations.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: May 22, 2018
    Assignee: Intel Corporation
    Inventors: Marc Lupon, Enric Herrero Abellanas, Ayose Falcon, Fernando Latorre, Pedro Lopez, Frederico Pratas
  • Patent number: 9958840
    Abstract: A controller for controlling a system includes a non-transitory computer-readable memory storing data for an operation and a control of the system and at least one processor operatively connected to the memory for determining a control signal transitioning a state of the system from a current state to a next state. At least two instances of the data are stored in the memory with different precisions defined by numbers of bits storing the instance in the memory. The processor determines the control signal using the instances of the data with the different precisions.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: May 1, 2018
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Andrei Kniazev, Peizhen Zhu, Stefano Di Cairano
  • Patent number: 9742598
    Abstract: A mobile communication device may include a radio transceiver configured to transmit and receive communication signals, and a baseband modem circuit configured to determine a decoded information field of a first encoded system information packet, set one or more bits of the decoded information field as an initial encoder state of a convolutional decoder for decoding the first encoded system information packet, decode the first encoded system information packet with the initial encoder state to obtain a first decoded system information packet, and use the decoded system information packet to transmit or receive data with one or more network cells.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: August 22, 2017
    Assignee: INTEL IP CORPORATION
    Inventors: Matthew Hayes, Gwang-Hyun Gho
  • Patent number: 9742639
    Abstract: An intelligent multi-level resource discovery and analysis system and method identify and characterize physical, logical and virtual resources of a multi-vendor, multi-class, multi-layer network by automatically generating and sending discovery commands that query resources as to their addresses, identities, characteristics and operational states, and by analyzing responses to the commands to identify continuously and in real time resource vendors, types, operating states, configurations of resources and network topology, and changes to resource and network conditions. Externally entered or dynamically discovered discovery parameters define the types and level of detail of information discovered and analyzed.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: August 22, 2017
    Assignee: Cavirin Systems, Inc.
    Inventor: Gordon Zhang
  • Patent number: 9722845
    Abstract: A Bluetooth Low Energy (BLE) device, having a demodulator configured to translate in-phase and quadrature components of a received BLE signal into a differential phase signal; an estimator configured to estimate a frequency offset of the differential phase signal; and a detector configured to detect information in the differential phase signal corrected by the estimated frequency offset.
    Type: Grant
    Filed: December 23, 2015
    Date of Patent: August 1, 2017
    Assignee: Intel IP Corporation
    Inventors: Lu Lu, Jinyong Lee, Xuan Steven Li, Aiguo Yan
  • Patent number: 9571129
    Abstract: A method of decoding a signal that has been encoded by a tail-biting code based on at least one encoding parameter is disclosed. The at least one encoding parameter may be a trellis size or a quantity of aggregated encoding elements or a code rate. The method is suitable for use in a communication device and comprises receiving the signal, performing a first decoding attempt of the signal based on a first set of starting state metrics and a first encoding parameter hypothesis, the first decoding attempt resulting in a first set of ending state metrics. The method further comprises performing, if the first decoding attempt fails, a second decoding attempt of the signal based on a second set of starting state metrics based on the first set of ending state metrics and a second encoding parameter hypothesis different from the first encoding parameter hypothesis.
    Type: Grant
    Filed: April 8, 2009
    Date of Patent: February 14, 2017
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
    Inventor: Matthias Kamuf
  • Patent number: 9552808
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for decoding parameters for Viterbi search are disclosed. In one aspect, a method includes the actions of receiving lattice data that defines a plurality of lattices. The actions include for each defined lattice determining a particular path that traverses the lattice; determining a node cost of a path from the start node to the frame node; determining a beam size for each frame; determining a beam cost width for each frame; determining a maximum beam size from the beam sizes determined for frames; and determining a maximum beam cost width from the beam cost widths determine for the frames. The actions include selecting a particular beam size and a particular beam cost width. The actions include determining paths for additional lattices using the pruning parameters of the particular beam size and the particular beam cost width.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: January 24, 2017
    Assignee: Google Inc.
    Inventor: Yasuhisa Fujii
  • Patent number: 9432143
    Abstract: A communication device is configured to communicate coded information to other communication device(s). The communication device uses NCPs to indicate locations of codewords within signal(s) transmitted to the other communication device(s). The communication device is configured to encode NCP(s) using an FEC code to generate coded NCP(s) and also to encode the NCP(s) using a cyclic redundancy check (CRC) code to generate NCP CRC bits. The communication device is also configured to encode the NCP CRC bits using the FEC code to generate coded NCP CRC bits. The communication device is then configured to generate OFDM or OFDMA symbol(s) include the coded NCP(s) and the coded NCP CRC bits to indicate beginnings of codeword(s) within at least one of the OFDM symbol(s) and/or additional OFDM symbol(s). The communication device is also configured to transmit the OFDM or OFDMA symbols to another communication device via a communication interface of the communication device.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: August 30, 2016
    Assignee: Broadcom Corporation
    Inventors: Niki Roberta Pantelias, Ba-Zhong Shen, Tak Kwan Lee, Avraham Kliger, Richard Stephen Prodan
  • Patent number: 9407475
    Abstract: A method and system for soft output multiple-input-multiple-output (MIMO) decoding may include generating a tree-graph based on: MIMO rank, number of bits per layer, and type of modulation, wherein the tree-graph comprises a root node, leaf nodes, nodes, and branches connecting the nodes; performing sphere decoding by determining a radius covering a subset of nodes within said tree-graph; managing, based on the sphere decoding, tables comprising metrics and counter metrics usable for log likelihood ratio (LLR) generation; predicting, based on a specified prediction scheme, counter metrics for paths in the tree-graph that comprise nodes and branches out of the determined radius; and updating the tables comprising the counter metrics with the predicted counter metric, in a case that the predicted counter metrics are better in maximum likelihood terms than the determined counter metrics.
    Type: Grant
    Filed: July 28, 2014
    Date of Patent: August 2, 2016
    Assignee: Ceva D.S.P. Ltd.
    Inventors: Zeev Kaplan, Noam Dvoretzki, Eitan Hai
  • Patent number: 9294134
    Abstract: A Viterbi decoding device to decode a signal produced by a convolutional encoder is described. The device may include: an analog-to-digital conversion unit to extract a soft symbol S=(S0, S1) from the signal, the soft symbol including a first sample value S0 and a second sample value S1; and a digital processing unit to compute, for each of the N states, a branch metric value of BM—0_K in dependence on the soft symbol S, K being an index identifying the respective state. The digital processing unit may store the soft symbol S as a complex number S=S0+J*S1 in a complex number format; and compute a complex branch metric value BM—0_(K, K?)=BM—0_K+J*BM—0_K? in a complex number format on the basis of the soft symbol S, with K different from K?.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: March 22, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Mihai-Ionut Stanciu, Ioan-Virgil Dragomir, Khurram Waheed
  • Patent number: 9294314
    Abstract: A communication system having a receiver with a linear path and a nonlinear path. As the receiver receives a data signal, it adaptively equalizes the received signal, and amplitude-limits the equalized signal in the nonlinear path using a saturable amplifier limiter or the like. A slicer extracts data from the limited equalized received signal. In the linear path, a clock recovery circuit generates a clock signal from the equalized received signal. A delay circuit in the linear path at least partially compensates for propagation delay in the limiter. Having the clock recovery occur in other than the nonlinear path, a low jitter clock is generated. The limiter enhances the vertical opening of the data eye by increasing the rise and fall times of the limited signal, providing more noise margin for the slicer to operate with and a greater timing margin in which to sample the sliced data.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: March 22, 2016
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Mohammad S. Mobin, Pervez M. Aziz, Ye Liu
  • Patent number: 9209937
    Abstract: Methods and apparatus are disclosed for detecting a control channel message transmitted on one of a plurality of shared control channels and targeted to a wireless receiver. In an exemplary method, messages transmitted over a plurality of shared control channels are decoded, and at least one likelihood metric is determined for each of the decoded messages. A best candidate is selected from the decoded messages, based on the likelihood metrics, and the at least one likelihood metric for the best candidate is compared to corresponding likelihood metrics for the messages other than the best candidate to determine whether the best candidate is a valid message. Wireless communication receivers configured correspondingly are also disclosed.
    Type: Grant
    Filed: November 26, 2007
    Date of Patent: December 8, 2015
    Assignee: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL)
    Inventors: Lennart Andersson, Andres Reial
  • Patent number: 9202519
    Abstract: A communication system and a noise predictive calibration method are disclosed. The communication system includes a decoder configured to decode an input signal, wherein the decoder produces one of: a converged data output when the decoder decodes the input signal successfully, and a non-converged data output when the decoder decodes the input signal unsuccessfully. The communication system also includes a convergence monitor configured to determine a calibration procedure based on at least one of: a number of times where the decoder decodes successfully, and a number of times where the decoder decodes unsuccessfully. A noise predictive calibration circuit is configured to utilize output produced by the decoder without qualification when the convergence monitor indicates utilization of a first calibration procedure.
    Type: Grant
    Filed: April 11, 2014
    Date of Patent: December 1, 2015
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Bruce A. Wilson, Haitao Xia, Seongwook Jeong, Weijun Tan
  • Patent number: 9160524
    Abstract: A computerized system and method for identifying one or more cryptographic operations from software code, comprising: performing processing associated with identifying, one or more cryptographic operations in the software code, the software code being run on a processor; and performing processing associated with identifying a boundary for each cryptographic operation in the software code.
    Type: Grant
    Filed: May 2, 2012
    Date of Patent: October 13, 2015
    Assignee: GEORGE MASON UNIVERSITY
    Inventors: Xinyuan Wang, Xin Li
  • Patent number: 9160454
    Abstract: An optical system may include a digital signal processor (DSP) to receive first samples of a digital signal. The first samples may be Hamming encoded. The DSP may correlate the first samples to multiple groups of second samples to determine multiple correlation values. Each of the multiple groups of second samples may correspond to respective code words. Each of the multiple correlation values may correspond to a correlation measurement between the first samples and each of the multiple groups of second samples. The DSP may determine a particular code word, of the multiple code words, corresponding to one of the correlation values of the multiple correlation values; determine output bits based on bits of the particular code word and the one of the correlation values; and provide the output bits. The output bits may include data associated with the digital signal.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: October 13, 2015
    Assignee: Infinera Corporation
    Inventors: Han H. Sun, Kuang-Tsan Wu
  • Patent number: 9142251
    Abstract: Systems and method relating generally to data processing, and more particularly to systems and methods for data synchronization and detection.
    Type: Grant
    Filed: February 11, 2014
    Date of Patent: September 22, 2015
    Assignee: Avago Technologies General IP (Singapore) PTE. LTD.
    Inventors: Yuqing Yang, Shaohua Yang, Lei Wang, Gu Zhao
  • Patent number: 9098411
    Abstract: In iterative decoding, a data recovery scheme corrects for corrupted or defective data by determining reliability metrics for blocks of decoded data. Block or windowed detectors generate block reliability metrics for data blocks (rather than individual bits) of decoded data using soft information from the regular decoding mode or from new iterative decoding iterations performed during error recovery mode. An error recovery system triggers corrective decoding of selected data blocks based on the block reliability metrics, by for example, comparing the block reliability metrics to a threshold or by selecting an adjustable number of the least reliable data blocks.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: August 4, 2015
    Assignee: MARVELL INTERNATIONAL LTD.
    Inventors: Nedeljko Varnica, Yifei Zhang, Panu Chaichanavong, Gregory Burd
  • Patent number: 9047205
    Abstract: A data storage device is disclosed comprising a non-volatile memory (NVM), wherein data is read from the NVM to generate a two dimension matrix of signal samples, including a first dimension and a second dimension. The matrix of signal samples is first equalized to reduce intersymbol interference (ISI) in the first dimension to generate second dimension signal samples, and second equalized to reduce ISI in the second dimension to generate first dimension signal samples. A first data sequence is detected in response to the first dimension signal samples, and a second data sequence is detected in response to the second dimension signal samples.
    Type: Grant
    Filed: August 15, 2013
    Date of Patent: June 2, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Yiming Chen, Anantha Raman Krishnan
  • Patent number: 9048868
    Abstract: It is decided whether to adjust data associated with a decoder. In the event it is decided to adjust the data associated with the decoder, the data is adjusted to obtain adjusted data and decoding is performed on the adjusted data. In the event it is decided to not adjust the data associated with the decoder, decoding is performed on the data associated with the decoder.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: June 2, 2015
    Assignee: SK hynix memory solutions inc.
    Inventors: Lingqi Zeng, Yu Kou
  • Patent number: 9043688
    Abstract: Generating error data associated with decoding data is disclosed, including: processing an input sequence of samples associated with data stored on media using a detector and a decoder during a global iteration; and generating one or more error values based at least in part on one or more decision bits output by the detector or the decoder and the input sequence of samples.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: May 26, 2015
    Assignee: SK hynix memory solutions inc.
    Inventors: Kai Keung Chan, Xin-Ning Song, Jason Bellorado, Kwok W. Yeung
  • Patent number: 9037955
    Abstract: Apparatus and methods are disclosed for decoding data stored on a data storage medium. A disclosed decoding method and decoder include a radial incoherence (RI) detector that increases the probability of detecting RI and improves the decoding performance in terms of the bit error rate of the decoded signal. RI is detected by comparing an input signal to the decoder against a RI threshold value and generating a RI-type signal. The RI detector may include a filter for filtering out noise and error in the RI-type signal, an adaptive threshold unit that adjusts the RI threshold value based upon the RI-type signal, a transition-based threshold unit that adjusts the RI threshold value based upon each transition in the input signal, or a path-based threshold unit that adjusts the RI threshold value based upon a best surviving path corresponding to the input signal, in combination or alone.
    Type: Grant
    Filed: April 3, 2014
    Date of Patent: May 19, 2015
    Assignee: MARVELL INTERNATIONAL LTD.
    Inventors: Zaihe Yu, Michael Madden
  • Patent number: 9030902
    Abstract: Methods for programming memory cells. One such method for programming memory cells includes generating an encoded stream using a data stream and programming the memory cells using the encoded stream to represent the data stream. A particular bit position of the encoded stream has a first voltage level when the particular bit position of the data stream has a particular logical state, and the particular bit position of the encoded stream has either a second voltage level or a third voltage level when the particular bit position of the data stream has a logical state other than the particular logical state.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: May 12, 2015
    Assignee: Micron Technology, Inc.
    Inventor: Chandra C. Varanasi
  • Patent number: 9032276
    Abstract: The present invention includes generating a tie-breaking metric via a comparative tie-breaking metric training process, monitoring an output of a channel detector in order to identify a tie condition between a first log-likelihood ratio (LLR) value and a second LLR value of a symbol, and upon identifying a tie condition between the first LLR value and the second LLR value of the symbol, applying the generated tie-breaking metric to the symbol in order to assign a hard decision to the symbol.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: May 12, 2015
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Wu Chang, Fan Zhang, Yang Han, Ming Jin
  • Patent number: 9026876
    Abstract: Systems and methods for computing sign disagreement between signals may implement one or more operations including, but not limited to: receiving an extrinsic log likelihood ratio (LLR) value; incrementing a sign-disagreement counter according to a sign disagreement between the extrinsic LLR value and an a priori LLR value; providing a value of the sign-disagreement counter to a binary short media defect (SMD) detector; and detecting one or more consecutive sign disagreements between an extrinsic output of a detector and an extrinsic output of a decoder.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: May 5, 2015
    Assignee: LSI Corporation
    Inventors: Fan Zhang, Wu Chang
  • Patent number: 9026894
    Abstract: A channel decoder includes a demodulator, a filter, a detector module, and first and second circuits. The demodulator receives an input signal based on data read from a storage medium, and demodulates the input signal to generate a data signal. The filter generates equalized data based on the data signal. The detector module executes a Viterbi algorithm based on the equalized data to generate estimates of data originally stored in the storage medium, and based on the execution of the Viterbi algorithm, generates a first and second sets of depths. The first set of depths includes depths larger than depths in the second set of depths. The first circuit generates a first error signal based on the first set of depths. The second circuit generates a second error signal based on the second set of depths. The filter generates the equalized data based on the first and second error signals.
    Type: Grant
    Filed: April 1, 2013
    Date of Patent: May 5, 2015
    Assignee: Marvell International Ltd.
    Inventors: Hongwei Song, Zining Wu
  • Patent number: 9026883
    Abstract: A decoding apparatus has an on-chip buffer, an external buffer interface, and a turbo decoder. The on-chip buffer is arranged for buffering each code block to be decoded. The external buffer interface is arranged for accessing an off-chip buffer. The turbo decoder is arranged for decoding a specific code block read from the on-chip buffer. The specific code block is not transmitted from the on-chip buffer to the off-chip buffer via the external buffer interface unless decoding fail of the specific code block is identified.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: May 5, 2015
    Assignee: MediaTek Singapore Pte. Ltd.
    Inventors: Chiaming Lo, Yi-Chang Liu, Lawrence Chen Lee, Wei-Yu Lai, Wei-De Wu
  • Patent number: 9025704
    Abstract: Certain aspects of the present disclosure relate to techniques for generating likely demodulation candidates using Vector Candidate Sampling (VCS). VCS is used to generate high likelihood candidates for Multiple Input Multiple Output (MIMO) demodulation that approaches optimal maximum a posteriori (MAP) performance with reasonable complexity. A receive data vector is recorded corresponding to a signal received at a MIMO receiver. A plurality of likely candidates are determined for MIMO demodulation via VCS, based at least on the receive data vector. Determining the likely candidates may include perturbing the receive data vector for each candidate based on a pre-determined perturb vector, and estimating a corresponding transmit data vector based at least on the perturbed receive data vector for the candidate and an estimator matrix, wherein the likely candidate comprises the estimated data vector.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: May 5, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: James E. Beckman, Alexei Yurievitch Gorokhov
  • Patent number: 9021332
    Abstract: An apparatus having a circuit and one or more processor is disclosed. The circuit is configured to receive a codeword from a memory. The memory is nonvolatile. The codeword generally has one or more errors. The processors are configured to generate read data by decoding the codeword repeatedly. The decoding includes a soft-decision decoding that uses a plurality of parameters calculated by (i) a first procedure, (ii) a second procedure in response to a plurality of failures of the decoding to converge using the first procedure and (iii) a third procedure in response to another failure of the decoding to converge using the second procedure.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: April 28, 2015
    Assignee: Seagate Technology LLC
    Inventors: Erich F. Haratsch, Jeremy Werner, Zhengang Chen, Earl T. Cohen, Yunxiang Wu, Ning Chen
  • Patent number: 9008242
    Abstract: A receiver system and method for recovering information from a symbol data sequence Y. The symbol data sequence Y corresponds to a symbol data sequence X that is transmitted onto the channel by a transmitter. The symbol data sequence X is generated by the transmitter based on associated information bits. At the receiver, a set of two or more processors operate in parallel on two or more overlapping subsequences of the symbol data sequence Y, where each of the two or more overlapping subsequences of the symbol data sequence Y corresponds to a respective portion of a trellis. The trellis describes redundancy in the symbol data sequence Y. The action of operating in parallel generates soft estimates for the associated information bits. The soft estimates are useable to form a receive message corresponding to the associated information bits.
    Type: Grant
    Filed: May 8, 2014
    Date of Patent: April 14, 2015
    Assignee: Coherent Logix, Incorporated
    Inventors: David B. Drumm, James P. Golab, Jan D. Garmany, Kevin L. Shelby, Michael B. Doerr
  • Patent number: 9009557
    Abstract: The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for performing data decoding.
    Type: Grant
    Filed: January 21, 2013
    Date of Patent: April 14, 2015
    Assignee: LSI Corporation
    Inventors: Shu Li, Zongwang Li, Shaohua Yang, Fan Zhang, Chung-Li Wang
  • Patent number: 8996948
    Abstract: Methods and apparatus for tail termination are provided that include a decoder that includes a processor configured to a forward state metric and a backward state metric wherein each iteration of an initial state of the backward state metric is fetched from a memory and is pre-computed without feedback from a decoding iteration. Each decoding iteration is substantially identical, and the backward state metric that is pre-computed is used for a subsequent iteration. The decoder may include a turbo decoder or a radix-4 decoder.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: March 31, 2015
    Assignee: Intel Corporation
    Inventors: Jianbin Zhu, Yuan Li, Tao Zhang
  • Patent number: 8984376
    Abstract: A low-density parity check (LDPC) decoder is provided for decoding low-density parity check (LDPC) encoded data wherein the processing order of the layers of the LDPC parity check matrix are rearranged during the decode process in an attempt to avoid error mechanisms brought about by the iterative nature of the LDPC belief propagation decoding process, such as stopping sets and trapping sets.
    Type: Grant
    Filed: April 10, 2013
    Date of Patent: March 17, 2015
    Assignee: PMC-Sierra US, Inc.
    Inventor: Christopher I. W. Norrie
  • Publication number: 20150074501
    Abstract: A bitstream generator includes at least first and second bitstream generator stages connected in a cascaded arrangement. The first bitstream generator stage includes a first adder which receives an input signal and generates a first error signal indicative of a difference between the input signal and a first bitstream candidate representing a closest approximation to the input signal among multiple bitstream candidates generated by the first bitstream generator stage. The second bitstream generator stage includes a second adder which receives the first error signal and generates a second error signal indicative of a difference between the first error signal and a second bitstream candidate representing a closest approximation to the input signal among multiple bitstream candidates generated by the second bitstream generator stage. A third adder in the bitstream generator receives the first and second bitstream candidates and generates an output signal more closely approximating the input signal.
    Type: Application
    Filed: January 18, 2013
    Publication date: March 12, 2015
    Inventors: Peter Kiss, Said E. Abdelli, Donald R. Laturell, James F. MacDonald, Ross S. Wilson
  • Patent number: 8977941
    Abstract: Systems and methods are provided for improved designs and performance for iterative decoder systems. In some embodiments, the iterative decoder may be decoupled from FIR samples through an FIR RAM, thus resulting in a less complex design and shorter processing times. In some embodiments, an intermediate memory may be used when passing information between the SOVA and LDPC of the iterative decoder. In some embodiments, the SOVA-required information may be continuously serialized from information received from the LDPC during each LDPC iteration. In some embodiments, the 1/(1+D2) precoder of the HR RLL encoder may be split into two serial, 1/(1+D) precoders. One 1/(1+D) precoder may be pulled outside of the HR RLL encoder and used in conjunction with the iterative decoder. A 1/(1+D) precoder may be used with the iterative decoder while maintaining the RLL constraints imposed upon the encoded information by the HR RLL encoder.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: March 10, 2015
    Assignee: Marvell World Trade Ltd.
    Inventors: Panu Chaichanavong, Nedeljko Varnica, Nitin Nangare, Gregory Burd, Zining Wu
  • Patent number: 8976911
    Abstract: A method and system for a sequence estimation in a receiver, such as for use when receiving a sample of a received inter-symbol correlated (ISC) signal corresponding to a transmitted vector of L symbols, with L being a integer greater than 1, and with symbol L being a most-recent symbol and symbol 1 being least recent symbol of the vector. A plurality of candidate vectors may be generated, wherein element L?m of each candidate vector holding one of a plurality of possible values of the symbol L?m, with m is an integer greater than or equal to 1, and elements L?m+1 through L of each candidate vectors holding determined filler values. A plurality of metrics may be generated based on the plurality of candidate vectors, and based on the generated plurality of metrics, a best one of the possible values of the symbol L?m may be selected.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: March 10, 2015
    Assignee: MagnaCom Ltd.
    Inventor: Amir Eliaz
  • Patent number: 8966350
    Abstract: A set of reliability metrics is provided for use by an iterative probabilistic decoding process for non-volatile storage. A plurality of sense operations are performed on at least one set of non-volatile storage elements which are programmed to a plurality of programming states. A set of reliability metrics such as logarithmic likelihood ratios is provided based on the sense operations. The set of reliability metrics is can be used by an iterative probabilistic decoding process in determining a programming state of at least one non-volatile storage element based on at least one subsequent sense operation involving the at least one non-volatile storage element. The plurality of sense operations can be performed at different ages (e.g., number of program/erase cycles) of the at least one set of non-volatile storage elements and the set of reliability metrics can be based on an average over the different ages.
    Type: Grant
    Filed: May 6, 2013
    Date of Patent: February 24, 2015
    Assignee: SanDisk Technologies Inc.
    Inventors: Nima Mokhlesi, Henry Chin, Dengtao Zhao
  • Patent number: 8966352
    Abstract: Apparatus and methods store data in a non-volatile solid state memory device according to a rate-compatible code, such as a rate-compatible convolutional code (RPCC). An example of such a memory device is a flash memory device. Data can initially be block encoded for error correction and detection. The block-coded data can be further convolutionally encoded. Convolutional-coded data can be punctured and stored in the memory device. The puncturing decreases the amount of memory used to store the data. Depending on conditions, the amount of puncturing can vary from no puncturing to a relatively high amount of puncturing to vary the amount of additional error correction provided and memory used. The punctured data can be decoded when data is to be read from the memory device.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: February 24, 2015
    Assignee: Micron Technology, Inc.
    Inventor: William H. Radke
  • Patent number: 8959419
    Abstract: A Viterbi decoder module includes a branch metric module configured to calculate branch metrics corresponding to a continuous phase modulated signal. Each of the branch metrics corresponds to a respective path between stages of the Viterbi decoder module. A path metric module is configured to calculate a first cost metric associated with the first state of the next stage based on the first branch metric and the second branch metric, and calculate a second cost metric associated with the second state of the next stage based on the third branch metric and the fourth branch metric. A traceback module is configured to determine a maximum likelihood path between stages of the Viterbi decoder based on the first cost metric and the second cost metric. The Viterbi decoder module is configured to output decoded data based on the maximum likelihood path.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: February 17, 2015
    Assignee: Marvell International Ltd.
    Inventors: Ankit Sethi, Swaroop Venkatesh, Rohit U. Nabar, Vijay Ahirwar
  • Patent number: 8953667
    Abstract: A method of operation of a communication system includes: calculating a shift distance of a received signal having a distortion; calculating an approximate likelihood of the received signal matching a transmitted signal from the shift distance; determining a bias factor from the distortion; and selecting a determined modulation maximizing a combination of the approximate likelihood and the bias factor for communicating with a device.
    Type: Grant
    Filed: January 15, 2014
    Date of Patent: February 10, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dongwoon Bai, Jungwon Lee, Sungsoo Kim, Jung Hyun Bae, Jooyeol Yang, Inyup Kang
  • Patent number: 8947804
    Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a combination data decoder circuit. The combination data decoder circuit includes: a non-binary data decoder circuit and a binary data decoder circuit.
    Type: Grant
    Filed: December 12, 2011
    Date of Patent: February 3, 2015
    Assignee: LSI Corporation
    Inventors: Zongwang Li, Chung-Li Wang, Shaohua Yang, Changyou Xu, Lei Chen, Yang Han
  • Patent number: 8948318
    Abstract: An exemplary embodiment of the present invention provides an incremental lattice reduction method comprising: receiving an input signal at a plurality of input terminals; evaluating a reliability assessment condition using a primary symbol vector estimate of at least a portion of the input signal; terminating the incremental lattice reduction method if the reliability assessment condition is satisfied; and if the reliability assessment condition is not satisfied, performing at least one iteration of a lattice reduction detection sub-method to obtain a secondary symbol vector estimate.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: February 3, 2015
    Assignee: Georgia Tech Research Corporation
    Inventors: Brian Gestner, David Verl Anderson, Xiaoli Ma
  • Patent number: 8948319
    Abstract: A technique includes jointly demodulating a desired signal and an interfering signal of a received signal in response to a carrier-to-interference ratio estimate for the received signal being below a threshold level. The jointly demodulating is based on first channel impulse response coefficients associated with the desired signal and second channel impulse response coefficients associated with the interfering signal. The technique includes determining the first channel impulse response coefficients based on a first cross-correlation function between the received signal and a training sequence of the desired signal and determining the second channel impulse response coefficients based on a second cross-correlation function between the received signal and a training sequence of the interfering signal.
    Type: Grant
    Filed: February 10, 2014
    Date of Patent: February 3, 2015
    Assignee: AT&T Intellectual Property I, L.P.
    Inventors: Richard A. Kobylinski, David Randall Wolter