Data Flow Analysis Patents (Class 717/155)
  • Patent number: 11934828
    Abstract: A method for accessing stored entities (SEs) that are stored in a storage unit of a storage system, the method may include determining in a cyclic manner, by each compute node (CN) of a group of compute nodes, CN SEs budgets to be used in a cycle, based on a shared storage space that stores performance requests of Ces of the group.
    Type: Grant
    Filed: November 29, 2022
    Date of Patent: March 19, 2024
    Assignee: VAST DATA LTD.
    Inventors: Ron Mandel, Mirit Shalem
  • Patent number: 11797930
    Abstract: A system for securing data is disclosed. The system includes a processing subsystem including a connection module to evaluate a computing device corresponding to remote workers for compatibility with a peripheral edge computing device, the computing device is enabled with an edge assisted proctoring service. The system includes an edge computing subsystem including an authentication module to verify an identity of the remote workers on the computing device using verification processes. The edge computing subsystem includes an activity monitoring module to monitor activities of the remote workers by collecting streaming data in real-time on the peripheral edge computing device. The activity monitoring module identifies suspicious activities by processing the streaming data. The edge computing subsystem includes an alert generation module to generate an alert upon identifying the suspicious activities.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: October 24, 2023
    Assignee: Virtusa Corporation
    Inventor: Giridhara Padmanabha Rao Madakashira
  • Patent number: 11526336
    Abstract: Operations may include obtaining source code describing an optimization problem. The operations may include identifying problem parameters associated with the optimization problem such that a specialized computing system may be enabled to solve the optimization problem. The operations may include extracting one or more first parameters of the problem parameters from the source code. The operations may include identifying one or more second parameters of the problem parameters that are not included in the source code. A user may be prompted via a GUI for input relating to the one or more second parameters. The operations may include compiling the extracted first parameters and the user-provided second parameters as input parameters of the specialized computing system. The operations may include providing the input parameters to the specialized computing system such that the specialized computing system is able to solve the optimization problem.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: December 13, 2022
    Assignee: FUJITSU LIMITED
    Inventors: Mehdi Bahrami, Wei-Peng Chen, Oussama Chafiqui
  • Patent number: 11301357
    Abstract: Techniques for performing compile-time checks of source code using static analysis are described herein. One or more application programming interface calls to a remote computing service provider are detected in a set of source code listings using static analysis, and properties of each call are checked against a user-defined model containing rules defining incorrect behavior. If incorrect behavior is detected, a visualization is presented containing information about the incorrect behavior.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: April 12, 2022
    Assignee: Amazon Technologies, Inc.
    Inventors: Andrew Jude Gacek, Neha Rungta, Lee Pike
  • Patent number: 11244248
    Abstract: A method for training a user learning network for recognizing obfuscated data is provided. The method includes steps of: a learning device (a) (i) inputting obfuscated data, from a data provider, into a user learning network to generate first characteristic information and (ii) updating parameters of a user task layer and a first user batch normalizing layer such that an error, calculated using (1) the first characteristic information or a first task specific output and (2) a first ground truth of the obfuscated data, is minimized, and (b) (i) inputting original data, from a user, into the user learning network to generate second characteristic information and (ii) updating parameters of the user task layer and the second user batch normalizing layer such that an error, calculated using (1) the second characteristic information or a second task specific output and (2) a second ground truth of the original data, is minimized.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: February 8, 2022
    Assignee: Deeping Source Inc.
    Inventor: Tae Hoon Kim
  • Patent number: 11204746
    Abstract: A method for modifying a call graph may include identifying, in source code, a first call site including a first predicate and a call from a first function to a second function. The first call site may correspond to a first edge of the call graph. The first edge may connect a first node corresponding to the first function and a second node corresponding to the second function. The method may further include modifying the call graph by labelling the first edge with a first encoding of the first predicate, and identifying, in the source code, a second call site including a second predicate and a call from a third function to the first function. The method may further include in response to determining that the first predicate is unsatisfied, modifying the call graph by labelling the second edge with a second encoding of a violation of the first predicate.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: December 21, 2021
    Assignee: Oracle International Corporation
    Inventors: Sora Bae, Nathan Robert Albert Keynes, Cristina Cifuentes
  • Patent number: 11194705
    Abstract: Method, apparatus and product for automatically introducing register dependency into tests. A test template represents an abstract test scenario to be utilized for testing a target processor. The abstract test scenario requires that a value be assigned to a register. A test that implements the abstract test scenario is generated. The test is a set of instructions that are executable by the target processor. The generation of the test comprises: determining a memory address to retain the value in a memory that is accessible to the target processor; and adding to the test an instruction to load to the register the value from the memory address, whereby adding a register dependency to the test that is not required by the abstract test scenario. The test can be executed on the target processor or simulation thereof.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: December 7, 2021
    Assignee: International Business Machines Corporation
    Inventors: Hillel Mendelson, Tom Kolan, Vitali Sokhin
  • Patent number: 11082441
    Abstract: Systems and methods for detecting anomalous data files and preventing detected anomalous data files from being stored in a data storage. In particular, the systems and methods detect anomalous data files by dividing each data file into blocks of data whereby entropy values are obtained for each block of data and this information is collated and subsequently used in a machine learning model to ascertain the security level of the data file.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: August 3, 2021
    Assignee: Flexxon Pte Ltd
    Inventors: Nizar Bouguerra, Chan Mei Ling
  • Patent number: 11023273
    Abstract: An embodiment of the invention may include a method, computer program product and system for multi-threaded programming. An embodiment may include creating a plurality of threads. Each of the plurality of threads implements a same functionality. An embodiment may include determining a first operation implementing the functionality using a first group of resources. An embodiment may include determining at least one second operation implementing the functionality using at least one second group of resources. An embodiment may include enabling each thread of the plurality of threads to call the first operation or the at least one second operation.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: June 1, 2021
    Assignee: International Business Machines Corporation
    Inventors: Yu Xuan Zhang, Yuheng Zhang, Jiu Fu Guo, Zi Xuan Wu
  • Patent number: 11003764
    Abstract: In one aspect, a computer-implemented method for monitoring and validating execution of an executable binary code, includes the step of, prior to beginning execution of the executable binary code, disassembling the executable binary code, listing all of application programming interfaces (API) or function calls in the executable binary code, generating a validation table for a type of each of the APIs or each of the function calls, a location of each of the APIs or each of the function calls, and a return address of each of the APIs or each of the function calls in the executable binary code, and listing in the validation table the type of each of the APIs or each of the function calls.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: May 11, 2021
    Inventors: Jayant Shukla, Abhay Kanhere, Kiran Thirumalai
  • Patent number: 10846449
    Abstract: A design tool executing on a computer system converts a block model of a circuit design to a high-level language (HLL) specification. The design tool then converts the HLL specification to a hardware description language (HDL) specification. Circuit implementation data is generated from the HDL specification by the design tool, and the circuit implementation data can be used to make an integrated circuit that performs functions specified by the circuit design.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: November 24, 2020
    Assignee: Xilinx, Inc.
    Inventors: Avinash Somalinga Suresh, Nabeel Shirazi, Daniel E. Michek, Daniel G. Gibbons
  • Patent number: 10846641
    Abstract: The present disclosure describes a device and methods that provide a communication channel between two disparate decision management systems. In various embodiments, the device executes instructions performing operations that include receiving, from a first decision management system, a first plurality of artifacts that defines a first set of logic for a decision and that is executable by a first decision management system, wherein the first plurality of artifacts includes a top-down decision flow artifact. The operations also include converting the first plurality of artifacts from the first decision management system into a second plurality of artifacts that defines a second set of logic for the decision, that is equivalent to the first set of business logic, and that is executable by a second decision management system. Furthermore, the operations include communicating the second plurality of artifacts to a second decision management system, which executes the second plurality of artifacts.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: November 24, 2020
    Assignee: FEDERAL HOME LOAN MORTGAGE CORPORATION (FREDDIE MAC)
    Inventors: Subramanian Hariharan, Abdul Hameed Mahmad, Kenety Borges, Suresh Kalkavery, Adithi Chandran, Ravindranath Mangalagiri, Stephen Sepulveda
  • Patent number: 10768917
    Abstract: Systems, methods, and articles of manufacture are disclosed for processing element (PE) deployment placement in a streaming data system. In particular, PEs of a stream computing application are grouped across compute nodes in a dynamic manner that improves over manually specified groupings of PEs on particular compute nodes. A stream manager deploys PEs according to rules in deployment instructions specifying whether to collocate PEs on a single compute node and/or ex-collocate PEs across compute nodes based on dynamically-determined information relating to the PEs themselves, compute nodes on which PEs are to run, and/or the streams runtime. For example, the stream manager may profile code and deploy PEs on compute nodes based on such profiling, deploy PEs together on compute nodes meeting predefined system characteristics or streams runtime conditions or metrics, and/or deploy PEs on a compute node within a predefined proximity of an external source.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: September 8, 2020
    Assignee: International Business Machines Corporation
    Inventors: John M. Santosuosso, Eric L. Barsness, Daniel Beuch, Michael J. Branson
  • Patent number: 10705810
    Abstract: The disclosure generally describes methods, software, and systems for generating code using test cases. A plurality of test cases is received for a new software component to be coded. Software components in a software component repository are identified, including determining software components having a similarity to the new software component to identify similar software components. For each of the similar software components, the received plurality of test cases is executed to generate results. The generated results are compared to expected outputs of the plurality of test cases to identify an existing software component adaptable to match the expected outputs. The new software component is created from the existing software component matching the expected outputs.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: July 7, 2020
    Assignee: SAP SE
    Inventor: Matthias Fuchs
  • Patent number: 10620916
    Abstract: A high level programming language provides a read-only communication operator that prevents a computational space from being written. An indexable type with a rank and element type defines the computational space. For an input indexable type, the read-only communication operator produces an output indexable type with the same rank and element type as the input indexable type but ensures that the output indexable type may not be written. The read-only communication operator ensures that any attempt to write to the output indexable type will be detected as an error at compile time.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: April 14, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Yosseff Levanoni, Paul F. Ringseth, Weirong Zhu, Lingli Zhang
  • Patent number: 10606573
    Abstract: A legacy-to-container (L2C) system converts a computer program in a procedural programming language to an object oriented programming language. The L2C system parses the procedural language to identify program variables and also program sub-elements, such as paragraphs in COBOL for example. The L2C system provides a user interface that allows the user to select which paragraphs should be converted into methods wherein the remaining non-selected paragraphs are to be converted into classes. The L2C system is configured to re-architect the procedural language by (i) creating normal object classes corresponding to the identified variables, (ii) creating methods for the user-selected paragraphs; and (iii) creating classes for the remaining non-selected paragraphs.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: March 31, 2020
    Assignee: SYNTEL, INC.
    Inventors: Abhijit Apte, Vivek Rao, Sagar Kulkarni, Prashant Ladha, Shashank Moghe, Vedavyas Rallabandi, Ravi Shankar, Lopamudra Dhal, Prabhat Parey, Rahul Mehra, Amit Pundeer, Abhishek Agarwal, Abhijeet Sheth
  • Patent number: 10564948
    Abstract: A method and a device for processing an irregular application are disclosed. The method comprises: determining M classes of tasks of the irregular application; executing the M classes of tasks in parallel, wherein each task has an index respectively; for the i-th task in the x-th class of task of the M classes of tasks: when the i-th task is executed to a rendezvous, stalling the i-th task, and determining a rule corresponding to the i-th task; inspecting current state of the i-th task according to the rule corresponding to the i-th task so as to steer the continued execution of the i-th task. According to the embodiment of the present disclosure, irregular applications can be correctly and automatically executed with high performance in a manner of fine-grained pipeline parallelism.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: February 18, 2020
    Assignee: Wuxi Research Institute of Applied Technologies Tsinghua University
    Inventors: Leibo Liu, Zhaoshi Li, Shaojun Wei
  • Patent number: 10558434
    Abstract: A method, system, and computer program product for Java development environments. The method commences upon receiving a set of one or more rules to be applied to one or more JSON messages, then generating of one or more Java classes respective to received JSON messages. The received JSON messages can be retrieved from a repository for JSON message files, or the JSON messages can be received by sniffing a message transmitted over a network link. The rules can be applied according to one or more precedence regimes, and applying the precedence regimes over the two or more rules can be considered in a pre-processing step performed before receiving a JSON message or can be considered after receiving a JSON message.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: February 11, 2020
    Assignee: Oracle International Corporation
    Inventors: Darryl Martin Shakespeare, Nicole Jodie Laurent, Michael Patrick Rodgers
  • Patent number: 10528905
    Abstract: The present disclosure describes a device and methods that provide a new communication channel between two disparate decision management systems. In various embodiments, the device retrieves business logic artifacts from a first decision management system, analyzes them and creates equivalent business logic artifacts that operate on the second decision management system, and transmits the equivalent business logic artifacts for execution by the second decision management system via an API of the second decision management system. In various implementations, the device analyzes top-down decision flow artifacts from the first decision management system and creates equivalent bottom-up rule flow artifacts that are usable by the second decision management system.
    Type: Grant
    Filed: July 5, 2019
    Date of Patent: January 7, 2020
    Assignee: FEDERAL HOME LOAN MORTGAGE CORPORATION (FREDDIE MAC)
    Inventors: Subramanian Hariharan, Abdul Hameed Mahmad, Kenety Borges, Suresh Kalkavery, Adithi Chandran, Ravindranath Mangalagiri, Stephen Sepulveda
  • Patent number: 10459829
    Abstract: A generic Test Tool migration system that migrates test cases from one platform to another in different Languages and also incorporate best practices while migration. The system comprises of three phases, a pre-processor, an in-flight module, and a post-processor. The pre-processor scans and reads the entire Source code and passes the output to the in-flight module which converts the Source scripts to a neutral Language and generates a Target Language. The output of the process becomes the input to the post-processor that provides options for resolving the ambiguity, issues, and warnings with best practice suggestions to a user by the Smart (migration) Remedy Engine (SME). The translated code is further improved, validated, reported and logged. The output of the phase is converted Object Repositories, Test Data and Scripts.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: October 29, 2019
    Assignee: M/s. Cigniti Technologies Limited
    Inventors: Rajesh Sarangapani, Kasi Viswanath Kurva, Suneel Kumar Rallapalli
  • Patent number: 10445125
    Abstract: A method for securing an application programming interface of a utility program library, including at least one program construct, of a hypervisor, including a configuration of the hypervisor that assigns at least one permissible call of the program construct to at least one guest system of the hypervisor, and a code generation, supported by the configuration, of a declaration of the program construct adapted to the guest system.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: October 15, 2019
    Assignee: Robert Bosch GmbH
    Inventors: Gunnar Piel, Gary Morgan
  • Patent number: 10387819
    Abstract: The present disclosure describes a device and methods that provide a new communication channel between two disparate decision management systems. In various embodiments, the device retrieves business logic artifacts from a first decision management system, analyzes them and creates equivalent business logic artifacts that operate on the second decision management system, and transmits the equivalent business logic artifacts for execution by the second decision management system via an API of the second decision management system. In various implementations, the device analyzes top-down decision flow artifacts from the first decision management system and creates equivalent bottom-up rule flow artifacts that are usable by the second decision management system.
    Type: Grant
    Filed: February 17, 2016
    Date of Patent: August 20, 2019
    Assignee: FEDERAL HOME LOAN MORTGAGE CORPORATION (FREDDIE MAC)
    Inventors: Subramanian Hariharan, Abdul Hameed Mahmad, Kenety Borges, Suresh Kalkavery
  • Patent number: 10268768
    Abstract: A method of preparing application data for visitors of a website is performed at a computer server. The computer server receives a webpage request initiated by a client device, the webpage request including a first element from a first dataset and a second element from a second dataset. In response, the computer server generates two sets of combinations between the first and second elements and respective elements of the second and first datasets, respectively. The computer server queries a cache for application data associated with each combination of elements. For each combination that returns a cache miss, the computer server retrieves the associated application data from an application database and stores the application data in the cache. The computer generates a response using application data associated with the first and second elements and returns the response to the client device.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: April 23, 2019
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventor: Ming Niu
  • Patent number: 10229470
    Abstract: A processing apparatus is described. The apparatus includes a plurality of processing cores, including a first processing core and a second processing core a first field programmable gate array (FPGA) coupled to the first processing core to accelerate execution of graphics workloads processed at the first processing core and a second FPGA coupled to the second processing core to accelerate execution of workloads processed at the second processing core.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: March 12, 2019
    Assignee: INTEL IP CORPORATION
    Inventors: Carsten Benthin, Sven Woop, Ingo Wald
  • Patent number: 10095869
    Abstract: A method, system and computer-usable medium for generating a security analysis effort, cost and process scope estimates, comprising: analyzing a software system; identifying a complexity level of a security analysis, the complexity level of the security analysis comprising identification of an effort level for the security analysis; and, generating the security analysis effort estimate, the security analysis effort estimate comprising an estimate of an effort expenditure to perform a security analysis on the software system at the identified complexity level.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: October 9, 2018
    Assignee: International Business Machines Corporation
    Inventors: Rhonda L. Childress, Sharon Hagi, Jeffrey C. Turnham
  • Patent number: 9696974
    Abstract: The type environment of a program can be modeled as a graph. In the graph, a node can represent a code element including but not limited to a function, a class, an object, a variable, an expression, a script, a global, a primitive, a module, an interface, an enumerated list, an array, an alias for a type, a parameter, a property, a type, a method, a function expression, a call signature, an index signature, an object type, or a function type. An edge in the graph can represent a relationship between code elements. When the type of a code element changes, the graph can be changed to model the revised source code. Computations concerning effects of a type change are delayed until information concerning the affected code element is requested.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: July 4, 2017
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC.
    Inventor: Joseph J. Pamer
  • Patent number: 9542166
    Abstract: In accordance with various embodiments, systems and methods are provided which facilitate inferring immutability of variables. A compiler analyzes local variables within source code to determine whether they are immutable. In particular embodiments the compiler examines locations where each variable is assigned to determine whether the variable was definitely unassigned before the assignment. Because the compiler can infer whether a local variable is immutable, it is possible for the programmer to avoid using a keyword to expressly declare the local variable as immutable. Inferring immutability of variables, thus, maintains correctness of the compiled code while reducing the burden on the programmer.
    Type: Grant
    Filed: November 14, 2012
    Date of Patent: January 10, 2017
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Brian Goetz, Alexander Buckley, Daniel Smith, Maurizio Cimadamore
  • Patent number: 9519567
    Abstract: A device for generating a performance evaluation program includes: a memory; and a processor coupled to the memory. The processor is configured to: analyze a source code of a target program that is subject to performance evaluation, translate the source code into a binary code based on an analysis result of the source code while generating execution binary that has an evaluation area to be used in the performance evaluation at a target location corresponding to a candidate location of the target program, and write an evaluation code in the evaluation area of the execution binary to evaluate performance of the target program based on an evaluation item and the target location of the target program.
    Type: Grant
    Filed: July 23, 2014
    Date of Patent: December 13, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Yuta Mukai, Hideki Miwa
  • Patent number: 9507945
    Abstract: A method executable via operation of configured processing circuitry to identify vulnerabilities in program code may include receiving a program and employing a disassembler to disassemble the program, generating a function call tree for the program based on disassembly of the program, receiving an indication of a post condition for which analysis of the program is desired, transforming program statements into logical equations, simplifying the logical equations, propagating post conditions backwards via Dijkstra's weakest precondition variant, analyzing aliases and processing loops to generate a precondition, and using an automated solver to determine whether the precondition is realizable and, if so, providing program inputs required to realize the precondition.
    Type: Grant
    Filed: April 1, 2014
    Date of Patent: November 29, 2016
    Assignee: The Johns Hopkins University
    Inventors: Yanni A. Kouskoulas, Douglas C. Schmidt, C. Durward McDonell, III, Laura J. Glendenning, Ryan W. Gardner, David J. Heine, Margaret F. Lospinuso, Forest C. Deal, Jr., David R. Zaret, Vina H. Nguyen
  • Patent number: 9438676
    Abstract: In an embodiment, a method comprises receiving a plurality of source data records from one or more source computers, wherein one or more first source data records are associated with a first source transaction and one or more second source data records are associated with a second source transaction; generating a first derived transaction comprising one or more first derived records based on the plurality of source data records; generating a first transaction mapping between the first derived transaction and the first source transaction; generating a second transaction mapping between the first derived transaction and the second source transaction; determining that the first derived transaction has ended, and in response, committing first derived transaction including the one or more first derived records to a persistent storage; receiving a first ending punctuation associated with the first source transaction, and in response, committing the first source transaction including the one or more first source dat
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: September 6, 2016
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Saileshwar Krishnamurthy, Madhu Kumar, Amit Bhat
  • Patent number: 9436449
    Abstract: Debugging and testing are aided by removing portions of software which are not relevant to a particular scenario. Upon replay, scenario behavior occurs. A reduction tool selects a function exercised during the replay, disables it to provide a test version of the software, replays the scenario to the test version to produce a candidate behavior, and compares the candidate behavior to the scenario behavior. When the candidate behavior matches the scenario behavior the tool removes the disabled function, thereby providing a reduced version of the software which is functionally equivalent to the full version but has fewer functions to manage. The tool may also remove unexercised code. Trimming unexercised code and reducing exercised but irrelevant code may be interleaved. Caching, dynamic uniform resource locator mapping, hypertext markup language code refactoring, and/or avoidance of certain random elements may also facilitate exhibiting, testing, or debugging web applications.
    Type: Grant
    Filed: June 2, 2015
    Date of Patent: September 6, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Dinesh Chandnani, Kunal Pathak, Ritesh Parikh
  • Patent number: 9430204
    Abstract: A high level programming language provides a read-only communication operator that prevents a computational space from being written. An indexable type with a rank and element type defines the computational space. For an input indexable type, the read-only communication operator produces an output indexable type with the same rank and element type as the input indexable type but ensures that the output indexable type may not be written. The read-only communication operator ensures that any attempt to write to the output indexable type will be detected as an error at compile time.
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: August 30, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Yosseff Levanoni, Paul F. Ringseth, Weirong Zhu, Lingli Zhang
  • Patent number: 9367307
    Abstract: A method, system, and computer-readable medium (CRM) for performing a staged points-to analysis of an object-oriented codebase, including obtaining the codebase and a points-to query, slicing the codebase to obtain a program slice, and performing a type analysis of the program slice to compute a type set. The method, system, and CRM include refining the program slice, after performing the type analysis, by resolving virtual dispatch sites based on the type set, and performing, after refining the program slice, a context-insensitive points-to analysis of the program slice to compute a first points-to set. The method, system, and CRM include re-refining the program slice, after performing the context-insensitive points-to analysis, by resolving the virtual dispatch sites based on the first points-to set, and performing, after re-refining the program slice, a context-sensitive points-to analysis of the program slice to compute a second points-to set, which is provided to a developer.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: June 14, 2016
    Assignee: Oracle International Corporation
    Inventors: Nicholas Allen, Bernhard F. Scholz, Padmanabhan Krishnan
  • Patent number: 9304749
    Abstract: Aspects of the disclosure provide a method for instruction scheduling. The method includes receiving a sequence of instructions, identifying redundant flag-register based dependency of the instructions, and re-ordering the instructions without being restricted by the redundant flag-register based dependency.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: April 5, 2016
    Assignee: Marvell World Trade Ltd.
    Inventors: Xinyu Qi, Ningsheng Jian, Haitao Huang, Liping Gao
  • Patent number: 9274923
    Abstract: A method for extracting static information from user code, analyzing the static information to determine location expressions for program information and comparing the location expressions to reference location expressions of the user code. In addition, a system having a reading module configured to read and extract static information from user code, an analyzing module configured to analyze the static information to determine location expressions for program information and a comparison module configured to compare the location expressions to reference location expressions of the user code.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: March 1, 2016
    Assignee: WIND RIVER SYSTEMS, INC.
    Inventors: Felix Burton, Peder Andersen, Mitch Stanek
  • Patent number: 9268619
    Abstract: A method for allowing communication between a remote analytical instrument and a client component is provided. The method includes communicating a first software message in a first message format from a client component to a first connectivity driver, translating the first software message from the first message format to the second message format using the first connectivity driver, and communicating the software messages in the second message format directly to the first remote analytical instrument from the first connectivity driver. The first software message relates to the operation of a first remote analytical instrument. The first software message is selected from a standardized command set. The first remote analytical instrument is configured to receive messages in a second message format different than the first message format which are capable of inducing operation of the first remote analytical instrument.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: February 23, 2016
    Assignee: Abbott Informatics Corporation
    Inventor: Slava Rivkin
  • Patent number: 9229725
    Abstract: One embodiment is a computer-implemented method for safe conditional operation when storage access cannot be proven safe. The method includes receiving a portion of source code for a transaction by an enhanced compiler and. The portion of source code received is analyzed, by the enhanced compiler, to determine whether the portion of source code is a candidate for transformation. Responsive to a determination that the portion of source code analyzed by the enhanced compiler is a candidate for transformation, the portion of the source code analyzed is transformed, by a computer processor, to use a conditional operation in a first portion of the transformed code. The conditional operation uses hardware transaction memory to invoke retry operations within hardware. A branch is added, directed to an original code portion, in a second portion of transformed code, where the branch is a recovery portion containing the original code portion.
    Type: Grant
    Filed: September 10, 2014
    Date of Patent: January 5, 2016
    Assignee: International Business Machines Corporation
    Inventors: Marcel Mitran, Visda Vokhshoori
  • Patent number: 9218169
    Abstract: Techniques and systems for creating a function call graph for a codebase are disclosed. Graph creation includes identifying functions in the codebase by a function signature and representing a function as a first node in the call graph. For that function, identifying call-to functions, call-from functions, and inheritance parents and children, and a base class from the function signature of that function; adding child nodes to the first node based on the identified call-to and call-from functions; for an interface call to a base class method in the function, adding child nodes to the first node based on implementations of an override of the base class method; for an added child node, removing that child node from the first node if a source file that includes an implementation of an override and a source code file that includes the function don't share at least one common binary file.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: December 22, 2015
    Assignee: GOOGLE INC.
    Inventors: Ramakrishna Rajanna, Deepank Gupta, Arul Siva Murugan Velayutham, Abhishek Sheopory, Ankit Agarwal
  • Patent number: 9195441
    Abstract: Techniques provided herein facilitate just-in-time compilation of source code, such as a script, during execution. According to some embodiments, a tracelet is limited to a single basic block of code. The data types of variable values provided by one or more variables used in the single basic block of code are known by generalized categories, rather than only being known by specific data types. Accordingly, guard code associated with each tracelet, which ensures that variable values received by the tracelet though the variables are of the data types expected by the tracelet's associated code body, can use generalized data types. The tracelet can contain code body that can handle input values that meet those generalized data types. A generalized data type can be defined according to one or more common characteristics shared by two or more specific data types.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: November 24, 2015
    Assignee: Facebook, Inc.
    Inventors: Ali-Reza Adl-Tabatabai, Guilherme de Lima Ottoni
  • Patent number: 9183013
    Abstract: A system and method for redundant array copy removal in a virtual machine (VM), or other runtime environment, and particularly for use in a system that includes a Java Virtual Machine (JVM). In pointer free languages array copy operations are common and time consuming. Embodiments of the present invention enable the compiler to detect situations where the compiled code can safely use the source array as the destination array without performing any copy operation. By avoiding array copy operations, the performance of the application is improved.
    Type: Grant
    Filed: March 21, 2014
    Date of Patent: November 10, 2015
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventor: Marcus Lagergren
  • Patent number: 9171102
    Abstract: The disclosed embodiments included a system, apparatus, method, and computer program product for performing a topological sort of a directed graph that comprises a cyclic component or subcomponent. The apparatus comprises a processor configured to execute computer-readable program code embodied on a computer program product. And executing the computer-readable program code comprises identifying a plurality of vertices in a directed graph that depend upon each other in a cyclic manner and removing those vertices and all of the vertices in the same component from a topology object. The topology object then may be utilized to sort the acyclic components and/or subcomponents of the directed graph based the dependencies between the remaining vertices.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: October 27, 2015
    Assignee: CA, Inc.
    Inventor: Pavel Zlatnik
  • Patent number: 9134977
    Abstract: A computer-implemented method and apparatus for optimizing conditional code by identifying conditional code in a source code, adding a no-operation instruction to an executable code corresponding to the source code in place of the conditional code, adding an entry to a table to pair the no-operation instruction to the conditional code, compiling the conditional code, and storing the compiled conditional code separate from the executable code. A computer-implemented method and apparatus to optimize conditional code by loading an executable code to be executed, checking whether conditional code associated with the executable code is enabled for execution, looking up a location of a no-operation instruction in a table and a location of a compiled conditional code in the table, and replacing the no-operation instruction in the executable code with the compiled conditional code.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: September 15, 2015
    Assignee: Red Hat, Inc.
    Inventors: Jason I. H. Baron, Richard Henderson, Roland McGrath
  • Patent number: 9104462
    Abstract: A method and apparatus of providing an RE-aware technique for placing slots based on redundancy across and within slot communication pairs. In particular, the RE-aware placement strategy takes into account the redundancy in data transfers for slot-to-slot communications and place slots to exploit redundancy in data transfers while minimizing the overall inter-rack (or inter-data center) bandwidth usage.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: August 11, 2015
    Assignee: Alcatel Lucent
    Inventors: Krishna P. Puttaswamy Naga, Ashok Anand
  • Patent number: 9081961
    Abstract: Analyzing computer code using a tree is described. For example, a client device generates a data request for retrieving data from a non-trusted entity via a network. A gateway is communicatively coupled to the client device and to the network. The gateway is configured to receive computer code from the non-trusted entity via the network. The gateway builds a tree representing the computer code. The tree has one or more nodes. A node of the tree represents a statement from the computer code. The gateway analyzes the statement to identify symbol data. The symbol data describes a name of the variable and the value of the variable. The gateway stores the symbol data in a symbol table.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: July 14, 2015
    Assignee: Trustwave Holdings, Inc.
    Inventors: Alexander Yermakov, Mark Kaplan
  • Patent number: 9043774
    Abstract: Computer-implemented methods for analyzing computer programs written in semi-structured languages are disclosed. The method is based on unification of the two classic forms of program flow analysis, control flow and data flow analysis. As such, it is capable of substantially increased precision, which increases the effectiveness of applications such as automated parallelization and software testing. Certain implementations of the method are based on a process of converting source code to a decision graph and transforming that into one or more alpha graphs which support various applications in software development. The method is designed for a wide variety of digital processing platforms, including highly parallel machines. The method may also be adapted to the analysis of (semi-structured) flows in other contexts including water systems and electrical grids.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: May 26, 2015
    Inventors: William G. Bently, David D. Duchesneau
  • Patent number: 9032380
    Abstract: A device receives program code, generated via a technical computing environment (TCE) and including code that requires further processing to execute, and identifies one or more function calls or one or more object method calls in the program code. The device creates a control flow graph, for the program code, based on the one or more function calls or the one or more object method calls. The device transforms the control flow graph into a data flow graph. The data flow graph includes a representation for each of the one or more function calls or the one or more object method calls. The device generates hardware code based on the data flow graph, the hardware code including code that does not require further processing to execute.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: May 12, 2015
    Assignee: The MathWorks, Inc.
    Inventors: Navaneetha K. Ruthramoorthy, Kiran K. Kintali
  • Patent number: 9026987
    Abstract: System and method for performing program-related operations over a network via a web browser. A network connection is established between a server computer and a client computer over a network. A universal resource identifier (URI) is sent from the client computer to the server computer over the network, where the URI indicates a program, e.g., a graphical program (GP), or at least a portion of a graphical program interactive development environment (GPIDE), e.g., a graphical program editor, an execution engine, a static or dynamic analyzer, and/or compiler. The at least a portion of the GPIDE is received from the server computer over the network in response to the URI, and executed in a web browser of the client computer to perform some specified functionality with respect to the GP.
    Type: Grant
    Filed: October 2, 2009
    Date of Patent: May 5, 2015
    Assignee: National Instruments Corporation
    Inventor: Christopher G. Cifra
  • Patent number: 9027010
    Abstract: A method and an apparatus that optimize operations for a key among a collection of key indexed data structures using meta data describing properties of the key with respect to the collection of data structures are described. The meta data may correspond to a cache dynamically updated to indicate invariants which are true for the key in a current state of the collection of data structures. Expensive calculations to search through the collection of data structures for the key may be avoided. For example, costly lookup operations over a collection of data structures may not be required at all if a key is known to always (or to never) reference certain specific values, or for these values to have certain meta-properties, in any of the collection of data structure globally throughout a system at a current state.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: May 5, 2015
    Assignee: Apple Inc.
    Inventors: Gavin Barraclough, Filip J. Pizlo
  • Publication number: 20150121353
    Abstract: Systems and methods for monitoring performance of virtualized instructions are provided. One method includes, during emulated execution of non-native program code including non-native instructions, maintaining a program flow history in a computing system representing a flow of program execution of the non-native program code. The program flow history includes a listing of non-native jump instructions for which execution is emulated in the computing system. The method also includes capturing one or more statistics regarding performance in native execution of the non-native program code on the computing system. The method further includes correlating the one or more statistics to the program flow history to determine performance of the computing system in executing one or more non-native instructions between each of the non-native jump instructions.
    Type: Application
    Filed: October 28, 2013
    Publication date: April 30, 2015
    Inventors: Thomas Nowatzki, Charles Caldarale
  • Patent number: 9015687
    Abstract: Systems and methods of allocating physical registers to variables may involve identifying a partial definition of a variable in an inter-procedural control flow graph. A determination can be made as to whether to terminate a live range of the variable based at least in part on the partial definition. Additionally, a physical register may be allocated to the variable based at least in part on the live range.
    Type: Grant
    Filed: March 30, 2011
    Date of Patent: April 21, 2015
    Assignee: Intel Corporation
    Inventors: Biju George, Guei-Yuan Lueh