Including Analysis Of Program Patents (Class 717/154)
  • Patent number: 10831493
    Abstract: A buffer is configured to store a plurality of last addresses accessed by a processor core from a memory. A minimum distance extraction circuit determines distances of a current memory address accessed by the processor core from each of the plurality of last addresses in the buffer and determines a minimum distance from the distances. A limit determination circuit compares the minimum distance to each of a plurality of ranges of distances and selects a range of the plurality of ranges within which the minimum distance falls. Each of a plurality of counters of a counter circuit is associated with a corresponding one of the plurality of ranges. A counter of the plurality of counters is to be incremented corresponding to the selected range.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: November 10, 2020
    Assignee: International Business Machines Corporation
    Inventors: Markus Buehler, Burkhard Steinmacher-Burow, Arni Ingimundarson, Thilo Maurer, Benedikt Rombach
  • Patent number: 10783027
    Abstract: Techniques for implementing preemptive crash data capture are provided. According to one set of embodiments, a computer system can determine that a failure has occurred with respect to an application running on the computer system and, in response to the failure, collect context information pertaining to the application's state at the time of the failure. If the failure subsequently causes the application to crash, the computer system can generate a crash dump that includes the collected context information.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: September 22, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Manodasan Wignarajah, Avneet Singh
  • Patent number: 10740184
    Abstract: A method for recovering data for a file system includes a journal-less recovery process that detects one or more inconsistencies for file system blocks upon a system failure based on one or more comparisons of information for the file system blocks.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: August 11, 2020
    Assignee: International Business Machines Corporation
    Inventors: Prasenjit Sarkar, Mohit Saxena
  • Patent number: 10684839
    Abstract: A plugin for a website browser can enable a user to deploy software onto a computing device quickly and easily. For example, the plugin can automatically detect that a user is visiting a website on which program code for a software application is shared or hosted. The website may be an open-source website, a program-code repository, or a program-code review platform. The plugin can automatically analyze the program code, an installation file provided with the program code, software and hardware characteristics of the specific computing device on which the software application is to be deployed, and other data to determine how to deploy the software application on the specific computing device. The plugin can then deploy the software application on the computing device in response to the user clicking a button, allowing for the software application to be easily deployed on the computing device with minimal user interaction or skill.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: June 16, 2020
    Assignee: Red Hat Israel, Ltd.
    Inventors: Boaz Shuster, Oded Ramraz
  • Patent number: 10671372
    Abstract: A blockchain-based secure customized catalog system includes a catalog customization system that receives a request to customize a first software catalog, and modifies the first software catalog to create a second software catalog that is customized for computing devices in a computing system. The catalog customization system then generates and broadcasts a first blockchain transaction that includes a smart contract having a second software catalog hash created from the second software catalog. A blockchain device receives the first blockchain transaction and, in response, provides the smart contract on a blockchain. When the blockchain device receives a second blockchain transaction broadcast by the computing system and including a hash value, it executes the smart contract. If the blockchain device determines that the execution of the smart contract indicates that the hash value matches the second software catalog hash, it transmits a second software catalog verification to the computing system.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: June 2, 2020
    Assignee: Dell Products L.P.
    Inventors: Kevin T. Marks, Viswanath Ponnuru, Raveendra Babu Madala
  • Patent number: 10558438
    Abstract: Optimizations are provided for sibling calls. A sibling caller is marked to indicate that it may call a sibling routine or that it may call an external sibling routine. Based on the marking, certain processing is performed to facilitate use of sibling calls, particularly when the sibling routine being called is external to the caller.
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: February 11, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Michael K. Gschwind
  • Patent number: 10540262
    Abstract: A software development system is described that enables a user that is debugging source code to select for unoptimizing a function within the source code and to cause an edit and continue operation to be performed that produces a compiled version of the source code in which the selected function is unoptimized, while other functions remain optimized. Embodiments also enable a user to select a previously unoptimized function within the source code for re-optimizing and to cause an edit and continue operation to be performed that produces a compiled version of the source code in which the function is re-optimized. Still further embodiments enable a user to select within source code that is being developed a function for which optimization should be prevented and to cause a compiled representation of the source code to be built in which the selected function is unoptimized, while other functions are optimized.
    Type: Grant
    Filed: October 17, 2016
    Date of Patent: January 21, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Ramkumar Ramesh, Changqing Fu, Ankit Asthana, Andrew B. Hall
  • Patent number: 10503485
    Abstract: A method for generating program code based on one or more blocks of a block diagram in a technical computing environment, an identifier being assigned to at least one, preferably each, of the one or more blocks of the block diagram. A processor opens the block diagram in the model editor, converts the block diagram to an intermediate representation using the code generator, wherein the conversion comprises checking if a replacement condition is fulfilled for a current block in the block diagram. Checking the replacement condition includes verifying that a predefined functional code unit is assigned to the identifier of the current block, in that case changing the block to a placeholder containing input/output-definitions but no functionality. The processor then converts the intermediate representation to program code, the conversion comprising adding a predefined functional code unit from the data definition tool to the definition code corresponding to the placeholder block.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: December 10, 2019
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Andreas Hoffmann, Wolfgang Trautmann, Frank Luenstroth, Volker Straetgen
  • Patent number: 10503634
    Abstract: Techniques are described for semantically comparing machine code traces generated by compilers that compile computer software code. For example, a trace of machine code generated by a compiler can be obtained. The trace can be transformed into a set of expressions in a uniform expression format (e.g., by performing translation of the trace instructions into corresponding expressions and/or by performing other transformations). The set of expressions in the uniform expression format can be compared to other sets of expressions in the uniform expression format (e.g., other sets of expressions created from traces of machine code from other compilers). Results of the comparison can comprise indications of whether the sets of expressions match.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: December 10, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Xiang Li, Ivan Nevraev, David McCarthy Peixotto, Marcelo Lopez Ruiz
  • Patent number: 10437885
    Abstract: Implementations of the disclosure provide for graph modeling of applications for detection of duplicate modules. In one embodiment, an apparatus comprising: a memory to store graphs; and a processing device, operatively coupled to the memory is provided. The processing device identify a first executable code module of a plurality of executable code modules associated with an application represented by a graph data structure. The graph data structure is updated with an indicator for each of the executable code modules matching the first module. The indicator references the first executable code module. One or more corresponding modules associated with the graph data structure are selected in view of the indicator. Using the graph data structure, an amount of a computing resource to allocate for a migration of the corresponding modules of the application is determined in view of a selection criterion.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: October 8, 2019
    Assignee: Red Hat, Inc.
    Inventors: Ondrej Zizka, Jesse Daniel Sightler
  • Patent number: 10440154
    Abstract: A method for predictive loading of software resources in a web application includes predicting a future state of the web application, determining the software resources required by the first predicted future state, and loading the software resources required by the first predicted future state. Determining that future predicated state further includes determining an associated probability for each possible future state in the first set of possible future states, identifying, from the first set of possible future states, a first predicted future state with the highest associated probability, and predicting a first set of possible future states based on a current state, run-time application context, and either use case data or historical application usage data.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: October 8, 2019
    Assignee: EMC IP Holding Company LLC
    Inventor: Chaithanya Lekkalapudi
  • Patent number: 10417119
    Abstract: A method for automated software testing may include mapping test cases to lines in files in a codebase. Each test case covers one or more lines in one or more files and has corresponding test results. The method may further include obtaining a change list including one or more changes. Each change specifies a changed line in a changed file. The method may further include determining impacted test cases, based on the mapping and the change list, prioritizing the impacted test cases based, in part, on test results corresponding to each impacted test case, executing, based on the prioritization, one or more impacted test cases to obtain executed test cases, and obtaining, for each executed test case, new test results.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: September 17, 2019
    Assignee: INTUIT INC.
    Inventors: Sachin Francis, Divya Gupta, Ayush Datta, Vijay Thomas
  • Patent number: 10379886
    Abstract: A non-transitory computer-readable medium stores computer-executable instructions that, when executed by a computer, cause the computer to perform operations including generating a changed optimization file by changing an original optimization file, the original optimization file being an optimization file created at a point in time at which an intermediate language file for an application is loaded; storing the changed optimization file; creating and storing verification information for verifying whether the intermediate language file is changed; determining whether the intermediate language file is changed based on the stored verification information in response to reloading of the intermediate language file; and creating a new optimization file by deleting the changed optimization file or recovering the original optimization file based on the changed optimization file and reusing the original optimization file, based on whether the intermediate language file is changed.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: August 13, 2019
    Assignee: LINE CORPORATION
    Inventors: Sang Min Chung, SangHun Jeon, Myungju Chung, Wang Jin Oh, Sungbeom Ahn, Dongpil Seo, Kwang-Hee Han, Tae Woo Kim, Seong Yeol Lim, Joo Hyeon Ryu
  • Patent number: 10354064
    Abstract: According to the invention, there is provided a computer implemented method for controlling dynamically the execution of a code by a processing system, said execution being described by a control flow graph comprising a plurality of basic blocks composed of at least an input node and an output node, a transition in the control flow graph corresponding to a link between an output node of origin belonging to a first basic block and an input node of a second basic block, a plurality of initialization vectors being associated to the output nodes at the time of generating the code, an a priori control word being associated to each input node which is linked to the same output node of origin according the control flow graph, said a priori control word being precomputed at the time of generating the code by applying a predefined deterministic function F to the initialization vector associated to its output node of origin, the following steps being applied once the execution of the output node belonging to a first ba
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: July 16, 2019
    Assignee: SECURE-IC SAS
    Inventors: Sylvain Guilley, Thibault Porteboeuf
  • Patent number: 10353679
    Abstract: A PGO compiler can instrument an executable to collect profile data from which global variables that were modified during the execution of a training executable can be identified. PGO optimization using a list of modified global variables identified from the profile data can be used to optimize a program in a second compilation phase. The global variables that were modified during the training run are identified by capturing a current snapshot of global variables and comparing their state to a baseline snapshot to ascertain the addresses of global variables that were modified. The addresses that changed can be mapped to global variable names to create a list of global variables that were modified during execution of the training executable. The list of global variables that have been modified can be to enable the compiler to perform optimizations such as but not limited to co-locate the modified global variables in memory.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: July 16, 2019
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC.
    Inventor: Terry Jack Mahaffey
  • Patent number: 10338906
    Abstract: The disclosure is directed to controlling availability of a feature of an application without having to change a code of the application. A gate application employs a “gate” that facilitates making a feature available to a set of users without having to change the code of the application as the set of users to whom the feature is to be made available change. The gate includes parameters and criteria that can determine whether a particular feature of the application, e.g., a photo tagging feature of a social networking application, is to be made available to a particular user. If the request attributes, e.g., attributes associated with a requesting user, satisfy the criteria defined in the gate, the gate indicates to the host application to make the feature available, which then executes a portion of the code corresponding to the particular feature to make the particular feature available to the user.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: July 2, 2019
    Assignee: Facebook, Inc.
    Inventors: Richard William Branson, Chenyang Wu
  • Patent number: 10325097
    Abstract: A method for statically analyzing a web application program may include obtaining a control flow graph for the web application program. Each control flow graph node may correspond to a statement in the web application program. The method may further include obtaining a sanitizer sequence including one or more sanitizers followed by an output statement, obtaining a placeholder corresponding to the sanitizer sequence, and generating control flow paths including an output node that corresponds to the output statement. The method may further include generating documents for each control flow path. Each document may include a sanitized value corresponding to the output statement. The method may further include inserting the placeholder into each document at a location of the sanitized value, and reporting a potential cross-site scripting flaw when the sanitizer sequence is insufficient for the output context sequence of the sanitized value.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: June 18, 2019
    Assignee: Oracle International Corporation
    Inventors: Francois Gauthier, Antonin Steinhauser
  • Patent number: 10270886
    Abstract: A method and system for dynamically optimizing a script library are described. A request for a script library is received from a set of client devices. An instrumented version of the script library is transmitted to at least one of the set of client devices. The instrumented version of the script library includes code for tracing execution of the script library. Responsive to execution of the instrumented version of the script library at each one of the at least one of client devices, script library usage feedback indicative of usage of the script library at these client devices is received. An optimized version of the script library, generated based on the script library usage feedback by removing portions of the script library that are unused by the subset of client devices, is transmitted to the client device instead of the script library in response to a second request.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: April 23, 2019
    Assignee: CLOUDFLARE, INC.
    Inventors: Igor Postelnik, Dane Orion Knecht, Oliver Zi-gang Yu, John Fawcett
  • Patent number: 10255050
    Abstract: A method for disambiguating an executable code file including a symbol table, includes reading a disambiguation configuration including at least one symbol-renaming instruction; renaming symbols from a symbol table according to at least one symbol-renaming instruction of the disambiguation configuration; and saving the file with the code disambiguated according to the disambiguation configuration.
    Type: Grant
    Filed: January 27, 2015
    Date of Patent: April 9, 2019
    Inventors: Patrice Martinez, Ga{hacek over (e)}l Lalire, Landry Stéphane Zeng Eyindanga
  • Patent number: 10255159
    Abstract: Dynamic program analysis is decoupled from execution in virtual computer environments so that program analysis can be performed on a running computer program without affecting or perturbing the workload of the system on which the program is executing. Decoupled dynamic program analysis is enabled by separating execution and analysis into two tasks: (1) recording, where system execution is recorded with minimal interference, and (2) analysis, where the execution is replayed and analyzed.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: April 9, 2019
    Assignee: VMware, Inc.
    Inventors: James E. Chow, Tal Garfinkel, Peter M. Chen
  • Patent number: 10229045
    Abstract: A method for allocating memory includes an operation that determines whether a prototype of a callee function is within a scope of a caller. The caller is a module containing a function call to the callee function. In addition, the method includes determining whether the function call includes one or more unnamed parameters when a prototype of the callee function is within the scope of the caller. Further, the method may include inserting instructions in the caller to allocate a register save area in a memory when it is determined that the function call includes one or more unnamed parameters.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: March 12, 2019
    Assignee: International Business Machines Corporation
    Inventors: Michael Karl Gschwind, Ronald I. McIntosh, Ulrich Weigand
  • Patent number: 10229044
    Abstract: A method for allocating memory includes an operation that determines whether a prototype of a callee function is within a scope of a caller. The caller is a module containing a function call to the callee function. In addition, the method includes determining whether the function call includes one or more unnamed parameters when a prototype of the callee function is within the scope of the caller. Further, the method may include inserting instructions in the caller to allocate a register save area in a memory when it is determined that the function call includes one or more unnamed parameters.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: March 12, 2019
    Assignee: International Business Machines Corporation
    Inventors: Michael Karl Gschwind, Ronald I. McIntosh, Ulrich Weigand
  • Patent number: 10133560
    Abstract: A method for optimizing source code comprises optimizing the source code of files from a computer program at link-time, and receiving, at a linker, a customized linker script defining output sections for files of an executable version of the files of the computer program. The method comprises adding, to intermediate representation files having global or local symbols, metadata comprising default section assignment information for the symbols and recording, for symbols in machine code files, an origin path and an output section. The method further comprises parsing, by the compiler, the intermediate representation files, recording the symbols and related symbol information comprising default section assignment and dependency information of the intermediate representation files, assigning output sections to the symbols based on the default section assignments and instructions from the customized linker script, and linking optimized code of the files of the computer program based on the assigned output sections.
    Type: Grant
    Filed: September 22, 2016
    Date of Patent: November 20, 2018
    Assignee: QUALCOMM Innovation Center, Inc.
    Inventors: Sergei Larin, Shankar Kalpathi Easwaran, Hemant Kulkarni, Tobias Edler Von Koch
  • Patent number: 10108536
    Abstract: According to some embodiments, system comprises a communication device operative to communicate with a user to obtain one or more requirements associated with a model for a test case generation module; a translation computer module to receive the model, store the model and generate an intermediate model; a generator computer module to receive the intermediate model, store the intermediate model, generate at least one test case; a memory for storing program instructions; at least one test case generation platform processor, coupled to the memory, and in communication with the translation computer module and the generator computer module, operative to execute program instructions to: transform the model into an intermediate model by executing the translation computer module; identify a model type associated with the intermediate model based on an analysis of the intermediate model by executing the generator computer module; select a test generation method based on analysis of the identified model type by execut
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: October 23, 2018
    Assignee: GENERAL ELECTRIC COMPANY
    Inventor: Meng Li
  • Patent number: 9880923
    Abstract: A model checking device for a distributed-environment-model according to the present invention, includes: a distributed-environment-model search unit that adopts a first state as start point when obtaining information indicating a distributed-environment-model, searches the state attained by the distributed-environment-model by executing straight line movements for moving from the first state to a second state which is an end position, and determines whether the searched state satisfies a predetermined property; a searched state management unit that stores the searched state in the past; a searched-transition-history management unit that stores an order of the transitions of the straight line movements in the past; a searched state transition association information management unit that stores the transition when moving to another state in the past search in such a manner that the transition is associated with each of the searched states.
    Type: Grant
    Filed: August 21, 2014
    Date of Patent: January 30, 2018
    Assignee: NEC CORPORATION
    Inventors: Yutaka Yakuwa, Nobuyuki Tomizawa
  • Patent number: 9870240
    Abstract: Embodiments of the present invention disclose an approach for inserting code into a running thread of execution. A computer sets a first set of bits to a first value, wherein the first value indicates that a first set of instructions should be inserted onto a stack. The computer executes a second set of instructions associated with a first safepoint, wherein the second set of instructions comprises one or more instructions to determine if the first set of bits is set to the first value. The computer determines that the first set of bits is set to the first value, and the computer inserts the first set of instructions onto the stack.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: January 16, 2018
    Assignee: International Business Machines Corporation
    Inventors: Michael H. Dawson, Graeme Johnson, San Hong Li
  • Patent number: 9858419
    Abstract: A static analysis for identification of permission-requirements on stack-inspection authorization systems is provided. The analysis employs functional modularity for improved scalability. To enhance precision, the analysis utilizes program slicing to detect the origin of each parameter passed to a security-sensitive function. Furthermore, since strings are essential when defining permissions, the analysis integrates a sophisticated string analysis that models string computations.
    Type: Grant
    Filed: September 22, 2013
    Date of Patent: January 2, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Julian Timothy Dolby, Emmanuel Geay, Marco Pistoia, Barbara G. Ryder, Takaaki Tateishi
  • Patent number: 9824419
    Abstract: A method and system are provided for executing, by a processor including a read-only cache, a program having a plurality of variables including a first variable and a second variable. Each variable is for executing a respective read operation or a respective write operation for an object. The method includes providing a first code that uses the read-only cache and a second code that does not use the read-only cache. The method further includes determining, by the processor, whether a first object designated by the first variable is aliased or not aliased with a second object designated by the second variable. The method also includes executing, by the processor, the first code when the first object is not aliased with the second object, and the second code when the first object is aliased with the second object.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: November 21, 2017
    Assignee: International Business Machines Corporation
    Inventor: Kazuaki Ishizaki
  • Patent number: 9817706
    Abstract: An information processing device in a parallel computer system, the information processing device includes a processor.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: November 14, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Takafumi Nose
  • Patent number: 9811342
    Abstract: A method for executing dual dispatch of blocks and half blocks. The method includes receiving an incoming instruction sequence using a global front end; grouping the instructions to form instruction blocks, wherein each of the instruction blocks comprise two half blocks; scheduling the instructions of the instruction block to execute in accordance with a scheduler; and performing a dual dispatch of the two half blocks for execution on an execution unit.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: November 7, 2017
    Assignee: Intel Corporation
    Inventor: Mohammad Abdallah
  • Patent number: 9779133
    Abstract: Various embodiments of systems and methods for validating Structured Query Language (SQL) queries in a database-accessing software application during application development are described herein. In some embodiments, an SQL query can be copied, during debugging of the software application, from a program editor used to define the software application into an SQL console that facilitates modifying and executing the query and displays data resulting from the execution of the query. Upon developer validation of the SQL query, the validated query may be copied back into the software application to substitute the original query. The SQL query may include one or more unresolved parameters that can be resolved by the SQL console via access to memory in which the software application is executed during debugging.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: October 3, 2017
    Assignee: SAP SE
    Inventor: Raghuvira Bhagavan
  • Patent number: 9772882
    Abstract: The execution of an executable code by a set of processing modules is provided, wherein the executable code is executed by at least one first processing module of the set of processing modules, wherein said executable code comprises a set of parallel executable parts, wherein each parallel executable part of the executable code comprises at least two parallel executable steps, and wherein said executing comprises: detecting by the at least one first processing module a parallel executable part of the set of parallel executable parts of the executable code to be executed; selecting by the at least one first processing module at least two second processing modules of the set of processing modules; and commanding by the at least one first processing module the selected at least two second processing modules to perform the at least two parallel executable steps of the detected parallel executable part of the executable code.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: September 26, 2017
    Assignee: HYBRIDSERVER TEC IP GMBH
    Inventors: Halis Aslan, Farbod Saremi, Tobias Zielinski, Hendrik Dürkop
  • Patent number: 9710241
    Abstract: Provided are an apparatus and method for providing instructions for a heterogeneous processor having heterogeneous components supporting different data widths. Respective data widths of operands and connections in a data flow graph are determined by using type information of operands. Instructions, to be executed by the heterogeneous processor, are provided based on the determined data widths.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: July 18, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Egger Bernhard, Soo-jung Ryu, Dong-hoon Yoo, Il-hyun Park
  • Patent number: 9697021
    Abstract: A computer-implemented method includes compiling one or more segments of code during run-time of a process executing at one or more processors of a computer system. The compilation produces a high-level intermediate representation of the one or more segments of the code. The high-level intermediate representation is modifiable by the process, without executing the high-level intermediate representation, to generate a modified high-level intermediate representation that is executable by the process.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: July 4, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Harish Kantamneni, Andrew Cherry, Anders Hauge, Amanda Silver, Nathan Carlson, Anthony Crider, Abhijeet S. Shah, Ming Hong Zhu
  • Patent number: 9542235
    Abstract: In one embodiment, a non-transitory processor-readable medium stores code representing instructions that when executed cause a processor to obtain a first mutual exclusion object. The first mutual exclusion object can be a write mutual exclusion object associated with a shared resource. The code can further represent instructions that when executed cause the processor to obtain a second mutual exclusion object associated with an object manager module and define a read event object with a name conforming to a predetermined format. The code can further represent instructions that when executed cause the processor to release the second mutual exclusion object, release the first mutual exclusion object, read at least a portion of the shared resource, obtain the second mutual exclusion object, destroy the read event object and release the second mutual exclusion object.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: January 10, 2017
    Assignee: AppSense, Limited
    Inventors: Richard Pointon, Richard James Somerfield
  • Patent number: 9529697
    Abstract: An embodiment can include one or more computer-readable media storing executable instructions that when executed on processing logic process variable signals. The media can store one or more instructions for receiving executable code that includes constructs with variable signals for processing the variable signals, and for performing a coverage measurement on the executable code based on information about one or more of the variable signals processed by the executable code. The media can store one or more instructions for producing a coverage result based on the coverage measurement, the coverage result identifying a degree of coverage for the executable code when the executable code processes the variable signals.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: December 27, 2016
    Assignee: The MathWorks, Inc.
    Inventors: William J. Aldrich, Olga Voronina, Zsolt Kalmar
  • Patent number: 9489214
    Abstract: New code is added to existing object code in order to add new functionality. For example, a call to start a profiler function can be added at the beginning of a Java method and a call to stop the profiler function can be added at the exits of the Java method. A method may have many different exits. To insure that the profiler process is stopped regardless of which exit is performed, the byte code and exception table are modified.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: November 8, 2016
    Assignee: CA, Inc.
    Inventor: Jeffrey R Cobb
  • Patent number: 9471327
    Abstract: A tool for formally verifying forwarding paths in an information pipeline. The tool creates two logic design copies of the pipeline to be verified. The tool retrieves a first and a second instruction, which have previously been proven to compute a mathematically correct result when executed separately. The tool defines driver input functions for issuing instructions to the two logic design copies. In accordance with the driver input functions, the tool issues instructions to the two logic design copies. The tool abstracts data flow of the two logic design copies to isolate forwarding paths for verification. The tool adjusts for latency differences between the first and second logic design copies. The tool checks a register for results, and when results from of two logic design copies become available in the register, the tool verifies the results to conclusively prove the correctness of all states of the information pipeline.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: October 18, 2016
    Assignee: International Business Machines Corporation
    Inventors: Anand B. Arunagiri, Udo Krautz, Sujeet Kumar, Viresh Paruthi
  • Patent number: 9459878
    Abstract: A tool for formally verifying forwarding paths in an information pipeline. The tool creates two logic design copies of the pipeline to be verified. The tool retrieves a first and a second instruction, which have previously been proven to compute a mathematically correct result when executed separately. The tool defines driver input functions for issuing instructions to the two logic design copies. In accordance with the driver input functions, the tool issues instructions to the two logic design copies. The tool abstracts data flow of the two logic design copies to isolate forwarding paths for verification. The tool adjusts for latency differences between the first and second logic design copies. The tool checks a register for results, and when results from of two logic design copies become available in the register, the tool verifies the results to conclusively prove the correctness of all states of the information pipeline.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: October 4, 2016
    Assignee: International Business Machines Corporation
    Inventors: Anand B. Arunagiri, Udo Krautz, Sujeet Kumar, Viresh Paruthi
  • Patent number: 9417855
    Abstract: A micro-architecture may provide a hardware and software co-designed dynamic binary translation. The micro-architecture may invoke a method to perform a dynamic binary translation. The method may comprise executing original software code compiled targeting a first instruction set, using processor hardware to detect a hot spot in the software code and passing control to a binary translation translator, determining a hot spot region for translation, generating the translated code using a second instruction set, placing the translated code in a translation cache, executing the translated code from the translated cache, and transitioning back to the original software code after the translated code finishes execution.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: August 16, 2016
    Assignee: Intel Corporation
    Inventors: Abhay S. Kanhere, Paul Caprioli, Koichi Yamada, Suriya Madras-Subramanian, Suresh Srinivas
  • Patent number: 9411580
    Abstract: A code annotating system includes a code wrapper engine, an annotator engine, and a memory device. The code wrapper engine receives an output stream produced by a source code of a generator. The code wrapper engine also wraps the output stream to produce a copy of the output stream. The annotator engine automatically annotates the copy with source information. The source information maps a relationship between data in the output stream and the source code of the generator. The memory device stores the source information.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: August 9, 2016
    Assignee: International Business Machines Corporation
    Inventor: Scott B Greer
  • Patent number: 9411567
    Abstract: An optimizing compiler includes a strength reduction mechanism that optimizes a computer program that includes operations that have an unknown stride by analyzing the instructions in the computer program in a single pass, determining whether instruction substitution is profitable for original instructions in the code, and performing instruction substitution for one or more original instructions for which instruction substitution is deemed profitable, including operations with unknown strides. The substituted instructions result in strength reduction in the computer program.
    Type: Grant
    Filed: March 16, 2015
    Date of Patent: August 9, 2016
    Assignee: International Business Machines Corporation
    Inventor: William J. Schmidt
  • Patent number: 9405517
    Abstract: An optimizing compiler includes a strength reduction mechanism that optimizes a computer program that includes operations that have an unknown stride by analyzing the instructions in the computer program in a single pass, determining whether instruction substitution is profitable for original instructions in the code, and performing instruction substitution for one or more original instructions for which instruction substitution is deemed profitable, including operations with unknown strides. The substituted instructions result in strength reduction in the computer program.
    Type: Grant
    Filed: March 16, 2015
    Date of Patent: August 2, 2016
    Assignee: International Business Machines Corporation
    Inventor: William J. Schmidt
  • Patent number: 9389845
    Abstract: In an aspect, a system, non-transitory machine readable medium and method for providing a personalized executable file to a client device is disclosed. A request sent from a client device to obtain a software application is received. The request is processed to identify the client device and a user associated with the client device. The client device profile information associated with the identified client device as well as user profile information associated with the identified user is determined. One or more configuration/core library files are selected from a file database based on the user profile information and the client device profile information. A personalized executable file is generated for the requested software application, wherein the personalized executable file comprises selected core library files and the selected configuration files. The personalized executable file of the requested software application is then sent to the client device.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: July 12, 2016
    Assignee: Infosys Limited
    Inventors: Puneet Gupta, Akshay Darbari, Venkat Kumar Sivaramamurthy, Sudhakar Vusirika
  • Patent number: 9383981
    Abstract: A modulo scheduling method including calculating at least two candidate initiation intervals between adjacent iterations, searching for schedules of the instructions in parallel by using the candidate initiation intervals, and selecting a schedule determined to be valid from among the searched schedules.
    Type: Grant
    Filed: October 7, 2014
    Date of Patent: July 5, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min-wook Ahn, Won-sub Kim, Tai Song Jin, Seung-won Lee, Jin-seok Lee, Chae-seok Im
  • Patent number: 9342510
    Abstract: State handles mark application data states within a sequence of operations for preservation. Applications can maintain non-linear sets of operations that include multiple sequences of operations between state handles. Applications can determine a sequence of operations between any two state handles, allowing applications to change from the data state associated with one state handle to the data state associated with another state handle. The sequence of operations between any two state handles may include executing operations and/or reversing operations. An application automatically adds new branches in the set of operations to preserve the sequences of operations necessary to reconstruct data states of previously set handles and removes branches that are not needed.
    Type: Grant
    Filed: October 22, 2008
    Date of Patent: May 17, 2016
    Assignee: Pixar
    Inventors: Alex Mohr, Tom Lokovic
  • Patent number: 9336128
    Abstract: A method for code analysis includes generating, by a computer processor, an execution path through software code. Generating the execution path includes adding, for an object having an undefined class, a first symbolic type constraint to a path condition of the first execution path based on a first statement in the execution path, and adding, for the object having the undefined class, a second symbolic type constraint to the path condition of the execution path based on a second statement in the first execution path. The method further includes the computer processor making a determination that the path condition of the execution path is infeasible based on the first symbolic type constraint of the object being inconsistent with the second symbolic type constraint of the object, and discarding the execution path based on the determination.
    Type: Grant
    Filed: March 21, 2014
    Date of Patent: May 10, 2016
    Assignee: Oracle International Corporation
    Inventors: Lian Li, Andrew Santosa
  • Patent number: 9336023
    Abstract: Systems, methods and computer program products for mobile device application design are described herein. The method accesses a data model corresponding to a selected mobile platform. The data model is used by a device application designer to generate, model, and debug a mobile application. The data model is used to take into consideration characteristics of the selected platform and a selected mobile device as the application is designed. The application is structured and generated for a selected platform that is independent of the data model, but is cognizant of the selected platform. A simulator models the application user interface (UI) as it will appear on the selected platform. The method performs platform-specific validation and allows for correction of various aspects of a generated application including platform-specific features. The tool generates a graphical image that can guide a developer to either generated code or help files corresponding to framework libraries.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: May 10, 2016
    Assignee: SYBASE, INC.
    Inventors: Himagiri Mukkamala, Cliff Collins, Stella Yu
  • Patent number: 9329845
    Abstract: A system described herein includes a receiver component that receives source code from a computer-readable medium of a computing device and a static analysis component that executes a points-to analysis algorithm over the source code to cause generation of a points-to graph, wherein the points-to graph is a directed graph that comprises a plurality of nodes and a plurality of edges, wherein nodes of the points-to graph represent pointers in the source code and edges represent inclusion relationships in the source code. The system also includes an inference component that infers target types for generic pointers in the source code based at least in part upon known type definitions and global variables in the source code.
    Type: Grant
    Filed: June 4, 2009
    Date of Patent: May 3, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Weidong Cui, Marcus Peinado
  • Patent number: 9298926
    Abstract: Processing a downgrader specification by constructing a set of candidate downgrader placement locations found within a computer software application, where each of the candidate downgrader placement locations corresponds to a transition between a different pair of instructions within the computer software application, and where each of the transitions participates in any of a plurality of data flows in a set of security-sensitive data flows within the computer software application, applying a downgrader specification to the set of candidate downgrader placement locations, and determining that the downgrader specification provides full coverage of the set of security-sensitive data flows within the computer software application if at least one candidate downgrader placement location within each of the security-sensitive data flows is a member of the set of candidate downgrader placement locations.
    Type: Grant
    Filed: September 12, 2013
    Date of Patent: March 29, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Omer Tripp