Using Procedure Or Function Call Graph Patents (Class 717/157)
-
Patent number: 11960866Abstract: A method and system are provided to construct, from a TensorFlow graph, a common intermediate representation that can be converted to a plurality of compiler intermediate representations (IRs), which enables compiler optimization to be applied efficiently.Type: GrantFiled: February 10, 2022Date of Patent: April 16, 2024Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Jack Lee, Kai-Ting Amy Wang
-
Patent number: 11914903Abstract: A device may include an interconnect interface, a memory system including one or more first type memory devices to receive first data, one or more second type memory devices to receive second data, and an accelerator configured to perform an operation using the first data and the second data. The memory system may further include a cache configured to cache the second data for the one or more second type memory devices. A device may include an interconnect interface, a memory system coupled to the interconnect interface to receive data, an accelerator coupled to the memory system, and virtualization logic configured to partition one or more resources of the accelerator into one or more virtual accelerators, wherein a first one of the one or more virtual accelerators may be configured to perform a first operation on a first portion of the data.Type: GrantFiled: October 8, 2021Date of Patent: February 27, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yang Seok Ki, Krishna T. Malladi, Rekha Pitchumani
-
Patent number: 11855833Abstract: Examples of device-driven management are described. A management service can transmit a device-driven management workflow to a number of client devices. The device-driven management workflow can include workflow objects that define a branching sequence of instructions. The client devices can provide a corresponding plurality of completion statuses for a step of the device-driven management workflow. The management service can identify a failure of the step according to a set of failure rules, and visually emphasize the failure within a representation of the device-driven management workflow.Type: GrantFiled: April 8, 2021Date of Patent: December 26, 2023Assignee: VMWARE, INC.Inventors: Rahul Parwani, Brian Link, Satish Venkatakrishnan, Mohan Guttikonda, Amogh Datar
-
Patent number: 11841811Abstract: A reconfigurable processor comprises an array of processing units and an instrumentation network. The array of processing units is configured to execute runtime events to execute an application. The instrumentation network is operatively coupled to the array of processing units. The instrumentation network comprises a control bus configured to form control signal routes in the instrumentation network. The instrumentation network further comprises a plurality of instrumentation counters having inputs and outputs connected to the control bus and to the processing units. Instrumentation counters in the plurality instrumentation units are configurable to consume control signals on the inputs and produce counts of the runtime events on the outputs.Type: GrantFiled: September 20, 2021Date of Patent: December 12, 2023Assignee: SambaNova Systems, Inc.Inventors: Raghu Prabhakar, Matthew Thomas Grimm, Sumti Jairath, Kin Hing Leung, Sitanshu Gupta, Yuan Lin, Luca Boasso
-
Patent number: 11733980Abstract: Implementing an application can include generating, from the application, a compact data flow graph (DFG) including load nodes, inserting, in the compact DFG, a plurality of virtual buffer nodes (VBNs) for each of a plurality of buffers of a data processing engine (DPE) array to be allocated to nets of the application, and, forming groups of one or more load nodes of the compact DFG based on shared buffer requirements of the loads on a per net basis. Virtual driver nodes (VDNs) that map to drivers of nets can be added to the compact DFG, where each group of the compact DFG is driven by a dedicated VDN. Connections between VDNs and load nodes through selected ones of the VBNs are created according to a plurality of constraints. The plurality of buffers are allocated to the nets based on the compact DFG as connected.Type: GrantFiled: December 10, 2021Date of Patent: August 22, 2023Assignee: Xilinx, Inc.Inventors: Brian Guttag, Satish B. Sivaswamy, Nitin Deshmukh
-
Patent number: 11640566Abstract: An industrial integrated development environment (IDE) includes a training component that improves the IDE's automated design tools over time based on analysis of aggregated project data submitted by developers over time. The industrial IDE can apply analytics (e.g., artificial intelligence, machine learning, etc.) to project data submitted by developers across multiple industrial enterprises to identify commonly used control code, visualizations, device configurations, or control system architectures that are frequently used for a given industrial function, machine, or application. This learned information can be encoded in a training module, which can be leveraged by the IDE to generate programming, visualization, or configuration recommendations. The IDE can automatically add suitable control code, visualizations, or configuration data to new control projects being developed based on an inference of the developer's design goals and knowledge of how these goals have been implemented by other developers.Type: GrantFiled: June 7, 2021Date of Patent: May 2, 2023Inventors: Andrew R Stump, Anthony Carrara, Eashwer Srinivasan, Christopher W Como, Sharon M Billi-Duran
-
Patent number: 11599346Abstract: Techniques for accessing a migrated method include: identifying a request to invoke a method defined by a type, the request including one or more arguments associated with respective argument types; identifying, in the type, an older version of the method associated with (a) a method name and (b) a first set of one or more parameter types, and a current version of the method associated with (a) the method name and (b) a second set of one or more parameter types; determining that the argument type(s) match(es) the first set of one or more parameter types; responsive to determining that the argument type(s) match(es) the first set of one or more parameter types: applying one or more conversion functions to convert the argument(s) to the second set of one or more parameter types; executing the current version of the method using the converted argument(s).Type: GrantFiled: May 4, 2022Date of Patent: March 7, 2023Assignee: Oracle International CorporationInventors: Brian Goetz, John R. Rose, Gavin Mark Bierman
-
Patent number: 11556756Abstract: The present disclosure relates to a method for scheduling a computation graph on heterogeneous computing resources. The method comprises generating an augmented computation graph that includes a first set of replica nodes corresponding to a first node in the computation graph and a second set of replica nodes corresponding to a second node in the computation graph, wherein the replica nodes of the first set are connected by edges to the replica nodes of the second set according to dependency between the first node and the second node in the computation graph, adapting the augmented computation graph to include performance values for the edges, the replica nodes of the first set, and the replica nodes of the second set, and determining a path across the adapted computation graph via one replica node of the first set and one replica node of the second set based on the performance values.Type: GrantFiled: April 25, 2019Date of Patent: January 17, 2023Assignee: Alibaba Group Holding LimitedInventor: Weifeng Zhang
-
Patent number: 11550899Abstract: Systems and methods are provided for reducing attack surface of a software environment by removing code of an unused functionality. A security hardening module may identify a portion of code of a software, the software comprising at least one of: an operating system and an application. The security hardening module may determine whether the portion is being utilized, and in response to determining that the process is not being utilized, the security hardening module may generate a live patch that removes the portion from the code and may modify, during runtime, the software using the live patch without restarting the software.Type: GrantFiled: October 14, 2019Date of Patent: January 10, 2023Assignee: Cloud Linux Software Inc.Inventor: Kirill Korotaev
-
Patent number: 11521185Abstract: A distributed private ledger function of a server of a first consortium member receives data representing an alias for one of its customers from the customer and also receives data that represents an alias for a customer of a second member replicated by a distributed private ledger function of a server of the second member to all members of the consortium. Thereafter, the distributed private ledger function of the first member's server identifies a recipient account of the second member's customer based on an account pointer associated with the alias of the second member's customer and initiates a transfer of funds from a source account of the first member's customer corresponding to an account pointer associated with the alias for the first member's customer to the identified recipient account of the second member's customer.Type: GrantFiled: May 19, 2016Date of Patent: December 6, 2022Assignee: CITIBANK, N.A.Inventors: Saket Gupta, Venkat Ramanathan
-
Patent number: 11321155Abstract: A computing environment includes an originating system, a plurality of networked communication channels each configured to communicate one or more of a plurality of instructions for calling one or more downstream applications in response to calling of an originating application by the first system, and a resource dependency system for providing automatic resource dependency tracking and maintenance of resource fault propagation. The resource dependency system performs a query configured to identify any application calls performed in a predetermined period of time; for each identified application call, builds a corresponding transaction paragraph comprising a list of all sub-application calls performed in response to the application call; from each transaction paragraph, extracts a chronological sequence of sub-application calls found in the transaction paragraph; forms a tier pathway for each transaction paragraph; and stores each tier pathway in an accessible file.Type: GrantFiled: November 22, 2019Date of Patent: May 3, 2022Assignee: BANK OF AMERICA CORPORATIONInventors: Sunil R. Bangad, Benjamin Nien-Ting Wu, Sridhar M. Seetharaman, Praveen Kumar Kasu
-
Patent number: 11144319Abstract: In an approach to dynamic redistribution of register files, whether a redistribution of register files is necessary is determined. Responsive to determining that the redistribution of register files is necessary, one or more register file transfers that have not yet completed are flushed. One or more register file write locations are allocated for each architected register based on a register free list. Source data is read from each architected register. The source data is written to the one or more register file write locations.Type: GrantFiled: July 28, 2020Date of Patent: October 12, 2021Assignee: International Business Machines CorporationInventors: Steven J. Battle, Susan E. Eisen, Dung Q. Nguyen, Salma Ayub, Albert J. Van Norstrand, Jr., Kent Li, Kurt A. Feiste, Christian Gerhard Zoellin
-
Patent number: 10558441Abstract: Embodiments of the present invention facilitate pruning a dependence graph for a loop in a computer program. An example computer-implemented method includes determining, by a compiler, a source and a sink of a dependence in the dependence graph. The method further includes determining, by the compiler, a source symbolic expression for the source, and a sink symbolic expression for the sink. The method further includes constructing, by the compiler, a difference expression using the source symbolic expression and the sink symbolic expression. The method further includes checking, by the compiler, if the difference expression is indicative of a memory overlap between the source and the sink. The method further includes, in response to the difference expression being indicative of no overlap, removing the dependence from the dependence graph, and generating object code for the computer program based on the dependence graph.Type: GrantFiled: March 12, 2018Date of Patent: February 11, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ettore Tiotto, Jose N. Amaral, Artem Chikin, Taylor Lloyd
-
Patent number: 10372482Abstract: A topology-based transversal analysis service has been created that correlates topologies of different domains of a distributed application and creates cross-domain “stories” for the different types of transactions provided by the distributed application. A “story” for a transaction type associates an event(s) with a node in an execution path of the transaction type. This provides context to the event(s) with respect to the transaction type (“transaction contextualization”) and their potential business impact. The story is a journal of previously detected events and/or information based on previously detected events. The events have been detected over multiple instances of a transaction type and the journal is contextualized within an aggregate of execution paths of the multiple instances of the transaction type. The story can be considered a computed, ongoing narrative around application and infrastructure performance events, and the narrative grows as more performance-related events are detected.Type: GrantFiled: September 28, 2017Date of Patent: August 6, 2019Assignee: CA, Inc.Inventors: Erhan Giral, Tomas Kolda
-
Patent number: 10365905Abstract: The disclosed computer-implemented method may include (1) receiving a set of control performance values and a set of modified performance values, (2) determining a set of comparative performance values based on the set of control performance values and the set of modified performance values, (3) generating a call graph based on the set of comparative performance values, the call graph including a set of nodes, each node corresponding to a function, the function corresponding to a particular comparative performance value included in the set of comparative performance values, and (b) a set of edges connecting the nodes based on relationships between the nodes, (4) weighting each node in accordance with the comparative performance value corresponding to the node, and (5) displaying the call graph via a user interface in accordance with the weighting of each node. Various other methods, systems, and computer-readable media are also disclosed.Type: GrantFiled: April 25, 2018Date of Patent: July 30, 2019Assignee: Facebook, Inc.Inventors: Kian Win Ong, Helga Gudmundsdottir, Benjamin D. Maurer, David McCabe, Douglas Armstrong, Kevin Casey, Luis Miguel Fonseca dos Reis, Paul Van Slembrouck
-
Patent number: 10289392Abstract: Embodiments disclose a method, computer program product, and system for optimizing computer functions. The embodiment may create a control flow graph from a computer function. The control flow graph may contain an entry block, an exit block, and basic blocks located between the entry block and the exit block. The embodiment may classify each of the basic blocks as an original heavy basic block or an original light basic block. The embodiment may classify the original heavy block, the exit block and each of the basic blocks that are located between each original heavy block and the exit block as a determined heavy block. The embodiment may create light computer functions and heavy computer functions from the computer function. Each heavy computer function contains the basic blocks classified as determined heavy. The light computer functions contains the remaining basic blocks, the exit block and calls to the heavy computer functions.Type: GrantFiled: December 8, 2017Date of Patent: May 14, 2019Assignee: International Business Machines CorporationInventors: Jaques Clapauch, Steven J. Perron
-
Patent number: 10275235Abstract: A method for controlling a web application state in a micro-service architecture may be provided. The method comprises registering a client-side state client at a client user interface component and loading a current state of the web application via a server-side state micro-service from a server state store upon a navigation to a website relating to a server-side micro-service of the web application. The method also comprises triggering a state change of the web application by a user interface control of the client user interface component, transmitting the changed state from the server-side micro-service of the web application to the server-side state micro-service, storing the changed state by the server-side state micro-service together with a state identifier in a server state store, transmitting the changed state and the state identifier from the server-side state micro-service to the state client, and notifying the client user interface component about the changed state.Type: GrantFiled: September 18, 2017Date of Patent: April 30, 2019Assignee: International Business Machines CorporationInventors: Dieter Buehler, Matthias Falkenberg, Armelle Parfaite Gaha Tchamabe, Nedim Karaoguz, Thomas Steinheber
-
Patent number: 10223237Abstract: A system for performing mid-method instrumentation includes a processor; a memory; and one or more modules stored in the memory and executable by a processor to perform operations including: obtain bytecode representation of an application; identify a method in the bytecode including a beginning and an end of the method; identify lines of bytecode between the beginning and the end of the identified method; identify one or more of the lines of bytecode between the beginning and the end of the method to instrument with one or more interceptors; during runtime of the application, instrument the identified one or more of the lines of bytecode between the beginning and the end of the identified method by apply the one or more interceptors; and during the runtime of the application, receive information associated with the instrumented one or more lines of bytecode between the beginning and the end of the method.Type: GrantFiled: October 31, 2016Date of Patent: March 5, 2019Assignee: Cisco Technology, Inc.Inventors: Ryan Nicholas TerBush, Haojun Li, Anthony Kilman
-
Patent number: 9824173Abstract: A software development-based compilation flow for circuit design may include executing, using a processor, a makefile including a plurality of rules for hardware implementation. Responsive to executing a first rule of the plurality of rules, a source file including a kernel specified in a high level programming language may be selected; and, an intermediate file specifying a register transfer level implementation of the kernel may be generated using the processor. Responsive to executing a second rule of the plurality of rules, a configuration bitstream for a target integrated circuit may be generated from the intermediate file using the processor. The configuration bitstream includes a compute unit circuit implementation of the kernel.Type: GrantFiled: September 11, 2015Date of Patent: November 21, 2017Assignee: XILINX, INC.Inventors: Bennet An, Henry E. Styles, Sonal Santan, Fernando J. Martinez Vallina, Pradip K. Jha, David A. Knol, Sudipto Chakraborty, Jeffrey M. Fifield, Stephen P. Rozum
-
Patent number: 9785302Abstract: Disclosed herein is a system and method for optimizing a developer's ability to find and navigate relevant documents, relationships, and other information related to an identifier in the code they are developing. An inline viewport is presented to the user in response to the user selecting an identifier in the code whereby the user is able to see relevant information related to the identifier in a spatially consistent location with the code they are investigating. Further, the developer has the ability to make changes to the code in the viewport without leaving the current editor.Type: GrantFiled: May 31, 2013Date of Patent: October 10, 2017Assignee: Microsoft Technology Licensing, LLCInventors: Monty Hammontree, Murali Krishna Hosabettu Kamalesha, Brandon Adams, Steven John Clarke, Oleg Tkachenko, Zachary S Zaiss, John Tilford, David Pugh, Daniel Dole
-
Patent number: 9519465Abstract: A computer implemented method and system to generate final code for execution in a runtime environment, the method including creation, via a compiler, of intermediate code from destination source code, wherein the destination source code has been compiled from original source code which includes at least one jump instruction, by omitting the at least one jump instruction, the destination source code existing in a destination programming language and the original source code in a source programming language, loading the intermediate code into an intermediate code manipulation unit, and creation, via the intermediate code manipulation unit, of the final code from the intermediate code, wherein the creation comprises an insertion of at least one jump statement into the final code, and wherein the inserted at least one jump statement is functionally equivalent to the at least one omitted jump instruction.Type: GrantFiled: April 29, 2013Date of Patent: December 13, 2016Assignee: innoWake GmbHInventor: Thorsten Bernecker
-
Patent number: 9507574Abstract: Expressions are selectively retrieved from memory during compilation by scanning code for expressions that can be effectively accessed directly from highly cached memory without needing to be loaded into a register, e.g., expressions that are not modified by the rest of the code. The scanning may include examining the use of the expression. Those expressions may be retrieved directly from the highly cached memory rather than being loaded into registers. This reduces compilation time.Type: GrantFiled: September 28, 2006Date of Patent: November 29, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Marcel Mitran, Vijay Sundaresan, Alexander Vaseilevskiy
-
Patent number: 9195443Abstract: A compiler may optimize source code and any referenced libraries to execute on a plurality of different processor architecture implementations. For example, if a compute node has three different types of processors with three different architecture implementations, the compiler may compile the source code and generate three versions of object code where each version is optimized for one of the three different processor types. After compiling the source code, the resultant executable code may contain the necessary information for selecting between the three versions. For example, when a program loader assigns the executable code to the processor, the system determines the processor's type and ensures only the optimized version that corresponds to that type is executed. Thus, the operating system is free to assign the executable code to any of the different types of processors.Type: GrantFiled: January 18, 2012Date of Patent: November 24, 2015Assignee: International Business Machines CorporationInventors: Jamie R. Kuesel, Mark G. Kupferschmidt, Paul E. Schardt, Robert A. Shearer
-
Patent number: 9152537Abstract: The present disclosure provides methods and systems for instrumenting a “semantic stack trace” (SST), where semantic information and dependency relationships between a plurality of code elements (“elements”) are captured during runtime execution of various front-end declarative languages, and are subsequently extracted for display in a SST-enabled interactive user interface with traversing capability. Embodiments of the present invention enable a framework for traversing and debugging complex code, providing an unprecedented lens into understanding code behavior in mixed imperative and declarative construction languages.Type: GrantFiled: February 8, 2013Date of Patent: October 6, 2015Assignee: FACEBOOK, INC.Inventors: Alexey N. Spiridonov, William Jacobs
-
Patent number: 9141788Abstract: Software self-checking mechanisms are described for improving software tamper resistance and/or reliability. Redundant tests are performed to detect modifications to a program while it is running. Modifications are recorded or reported. Embodiments of the software self-checking mechanisms can be implemented such that they are relatively stealthy and robust, and so that it they are compatible with copy-specific static watermarking and other tamper-resistance techniques.Type: GrantFiled: April 28, 2014Date of Patent: September 22, 2015Assignee: Intertrust Technologies CorporationInventors: William G. Horne, Lesley R. Matheson, Casey Sheehan, Robert E. Tarjan
-
Patent number: 9129056Abstract: Implementations of the present disclosure provide methods including receiving one or more specifications at a virtual machine that is executed using one or more processors, each specification indicating one or more methods and one or more parameters to be traced, the one or more parameters corresponding to the one or more methods, executing an application, the application calling a method of the one or more methods using the virtual machine, determining a subset of the one or more received specifications, the subset corresponding to specifications that are applicable to the method, generating an entry event corresponding to the method based on the subset, the entry event comprising event data including values of the one or more parameters, and reporting the entry event.Type: GrantFiled: December 4, 2009Date of Patent: September 8, 2015Assignee: SAP SEInventors: Ralf Schmelter, Michael Wintergerst, Dietrich Mostowoj
-
Patent number: 9128728Abstract: A tool (22) automatically analyzes application source code (16) for application level vulnerabilities. The tool integrates seamlessly into the software development process, so vulnerabilities are found early in the software development life cycle, when removing the defects is far cheaper than in the post-production phase. Operation of the tool is based on static analysis, but makes use of a variety of techniques, for example methods of dealing with obfuscated code.Type: GrantFiled: February 21, 2013Date of Patent: September 8, 2015Assignee: CHECKMARX LTD.Inventor: Maty Siman
-
Patent number: 9081587Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for receiving source code that contains a hot function that calls a multiversioned function, where a function definition of the multiversioned function specifies a first version and an alternative second version, and generating compiled code that includes a first and a second clone of the hot function, and a first and a second version of the multiversioned function. In the compiled code, the first clone of the hot function includes a direct call to the first version of the multiversioned function, and the second clone of the hot function includes a direct call to the second version of the multiversioned function.Type: GrantFiled: February 25, 2013Date of Patent: July 14, 2015Assignee: Google Inc.Inventors: Xinliang David Li, Sriraman Tallam
-
Patent number: 9063753Abstract: A business object infrastructure may comprise a repository storing a business object having a plurality of nodes, including at least one exit node associated with a code snippet written in a programming language. The business object infrastructure may further include a scripting framework coupled to the repository. The scripting framework may, responsive to a request received from a client device, execute the business object at a processing framework until the exit node is reached. When the exit node is reached, the scripting framework may load the code snippet from the repository and, based on the programming language of the code snippet, select a virtual machine interpreter for the code snippet.Type: GrantFiled: June 22, 2010Date of Patent: June 23, 2015Assignee: SAP SEInventor: Horst Schaude
-
Patent number: 9043774Abstract: Computer-implemented methods for analyzing computer programs written in semi-structured languages are disclosed. The method is based on unification of the two classic forms of program flow analysis, control flow and data flow analysis. As such, it is capable of substantially increased precision, which increases the effectiveness of applications such as automated parallelization and software testing. Certain implementations of the method are based on a process of converting source code to a decision graph and transforming that into one or more alpha graphs which support various applications in software development. The method is designed for a wide variety of digital processing platforms, including highly parallel machines. The method may also be adapted to the analysis of (semi-structured) flows in other contexts including water systems and electrical grids.Type: GrantFiled: February 12, 2009Date of Patent: May 26, 2015Inventors: William G. Bently, David D. Duchesneau
-
Patent number: 9032380Abstract: A device receives program code, generated via a technical computing environment (TCE) and including code that requires further processing to execute, and identifies one or more function calls or one or more object method calls in the program code. The device creates a control flow graph, for the program code, based on the one or more function calls or the one or more object method calls. The device transforms the control flow graph into a data flow graph. The data flow graph includes a representation for each of the one or more function calls or the one or more object method calls. The device generates hardware code based on the data flow graph, the hardware code including code that does not require further processing to execute.Type: GrantFiled: December 4, 2012Date of Patent: May 12, 2015Assignee: The MathWorks, Inc.Inventors: Navaneetha K. Ruthramoorthy, Kiran K. Kintali
-
Publication number: 20150121354Abstract: Embodiments relate to code stack management. An aspect includes a processor configured to execute a software application. Another aspect includes a code stack memory area and a data stack memory area, the code stack memory area being separate from the data stack memory area. Another aspect includes maintaining a data stack in the data stack memory area, the data stack comprising a plurality of stack frames comprising one or more data variables corresponding to the execution of the software application. Another aspect includes maintaining a code stack in the code stack memory area, the code stack comprising a plurality of code stack entries comprising executable computer code corresponding to the execution of the software application.Type: ApplicationFiled: October 30, 2013Publication date: April 30, 2015Applicant: International Business Machines CorporationInventor: Michael K. Gschwind
-
Patent number: 9021451Abstract: In one embodiment, a method for call graph analysis is provided. The method includes determining a plurality of nodes in a call graph. The plurality of nodes represent resource consumption of functions of a software program executed in a software system. A simplification factor is determined. A first set of nodes in the plurality of nodes is then eliminated based on exclusive values for the plurality of nodes, inclusive values for the plurality of nodes, and the simplification factor. An inclusive value for a node is a first amount of resources consumed by the node and any descendent nodes of that node. An exclusive value for the node is a second amount of resources consumed by the node. A simplified call graph is output including a second set of nodes in the plurality of nodes. The second set of nodes does not include the eliminated first set of nodes.Type: GrantFiled: June 25, 2013Date of Patent: April 28, 2015Assignee: SAP SEInventors: Cheolman Park, Chan Young
-
Patent number: 9015689Abstract: Methods and apparatus for managing stack data in multi-core processors having scratchpad memory or limited local memory. In one embodiment, stack data management calls are inserted into software in accordance with an integer linear programming formulation and a smart stack data management heuristic. In another embodiment, stack management and pointer management functions are inserted before and after function calls and pointer references, respectively. The calls may be inserted in an automated fashion by a compiler utilizing an optimized stack data management runtime library.Type: GrantFiled: March 7, 2014Date of Patent: April 21, 2015Assignee: Board of Regents on Behalf of Arizona State UniversityInventors: Ke Bai, Aviral Shrivastava, Jing Lu
-
Patent number: 9015688Abstract: Methods and apparatuses associated with vectorization of scalar callee functions are disclosed herein. In various embodiments, compiling a first program may include generating one or more vectorized versions of a scalar callee function of the first program, based at least in part on vectorization annotations of the first program. Additionally, compiling may include generating one or more vectorized function signatures respectively associated with the one or more vectorized versions of the scalar callee function. The one or more vectorized function signatures may enable an appropriate vectorized version of the scalar callee function to be matched and invoked for a generic call from a caller function of a second program to a vectorized version of the scalar callee function.Type: GrantFiled: April 1, 2011Date of Patent: April 21, 2015Assignee: Intel CorporationInventors: Xinmin Tian, Sergey Stanislavoich Kozhukhov, Sergey Victorovich Preis, Robert Yehuda Geva, Konstantin Anatolyevich Pyjov, Hideki Sato, Milind Baburao Girkar, Aleksei Gurievich Kasov, Nikolay Vladimirovich Panchenko
-
Patent number: 9003377Abstract: Unsuspended co-routines are handled by the machine call stack mechanism in which the stack grows and shrinks as recursive calls are made and returned from. When a co-routine is suspended, however, additional call stack processing is performed. A suspension message is issued, and the entire resume-able part of the call stack is removed, and is copied to the heap. A frame that returns control to a driver method (a resumer) is copied to the call stack so that resumption of the co-routine does not recursively reactivate the whole call stack. Instead the resumer reactivates only the topmost or most current frame called the leaf frame. When a co-routine is suspended, it does not return to its caller, but instead returns to the resumer that has reactivated it.Type: GrantFiled: January 7, 2010Date of Patent: April 7, 2015Assignee: Microsoft Technology Licensing, LLCInventors: Neal M. Gafter, Mads Torgersen, Henricus Johannes Maria Meijer, Niklas Gustafsson
-
Patent number: 9003375Abstract: In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for implementing optional logging of debug activities in a real time instruction tracing log. For example, in one embodiment, such means may include an integrated circuit having means for initiating instruction tracing for instructions of a traced application, mode, or code region, as the instructions are executed by the integrated circuit; means for generating a plurality of packets to a debug log describing the instruction tracing; means for initiating an alternative mode of execution within the integrated circuit; and means for suppressing indication of entering the alternative mode of execution. Additional and alternative means may be implemented for selectively causing an integrated circuit to operate in accordance with an invisible trace mode or a visible trace mode upon transition to the alternative mode of execution.Type: GrantFiled: December 30, 2011Date of Patent: April 7, 2015Assignee: Intel CorporationInventors: Jason W. Brandt, Peter Lachner, Huy V. Nguyen, Jonathan J. Tyler
-
Patent number: 8997072Abstract: This technology is directed to compressing dependency graphs in online communities, e.g., social networks, by determining a dependency graph and by performing a transitive reduction on the dependency graph. The transitive reduction may be used in various applications, e.g., for loading software modules in social networks, without causing inefficiencies by loading the same modules multiple times. In some instances, the systems and methods include 1) sorting nodes (e.g., modules) in the dependency graph into a list in a valid dependency order (a node depends only on nodes earlier in the list), 2) iterating over the list while building a map from any node to all of its dependencies, 3) iterating through the dependency graph in reverse order, and for each node, iterating through its dependencies (also in reverse order) and removing each dependency if it is a transitive dependency of any of the previous dependencies of that node.Type: GrantFiled: August 23, 2012Date of Patent: March 31, 2015Assignee: Google Inc.Inventor: Henry Wong
-
Patent number: 8997065Abstract: A device creates a graph based on source code, and analyzes the source code to identify private variables and functions of the source code and public variables and functions of the source code. The device determines, based on the graph, a size threshold and semantics-related characteristics of functions and variables for each module, of multiple modules, and assigns, based on the graph, the private variables and functions to a corresponding module of the multiple modules. The device reduces, based on the graph, a number of the public variables and functions assigned to each module, and generates the multiple modules based on one or more of the graph, the size threshold, the assigned private variables and functions, and the number of the public variables and functions assigned to each module.Type: GrantFiled: December 3, 2012Date of Patent: March 31, 2015Assignee: The MathWorks, Inc.Inventors: Michael E. Karr, Gael Mulat
-
Patent number: 8990792Abstract: A method of generating a dynamic call graph of an application is disclosed. The method includes collecting information on what program code pages are accessed during each sampling period, defining parts of an executable program code which are accessible during each sampling period according to the collected information, defining a set of functions within the defined parts of the executable program code, generating dynamic call graphs using the defined set of functions for each sampling period, and generating dynamic call graphs for an observation period by combining accurate dynamic call graphs of each sampling period.Type: GrantFiled: May 26, 2009Date of Patent: March 24, 2015Assignee: Samsung Electronics Co., Ltd.Inventor: Ekaterina Gorelkina
-
Patent number: 8966463Abstract: A computer-implemented method for removing redundant function calls in a computer program includes identifying a first set of equivalent function calls appearing in the computer program. For each of the equivalent function calls, the method identifies whether the function call is partially available or partially anticipable. When a function call is identified as being partially anticipable, a result of the function call is stored in a temporary variable. When a function call is identified as being partially available, the function call is removed and replaced with use of the temporary variable.Type: GrantFiled: November 29, 2011Date of Patent: February 24, 2015Assignee: Microsoft Technology Licensing, LLCInventors: Patrick W. Sathyanathan, Ten Tzen
-
Patent number: 8954943Abstract: A method for analyzing data reordering operations in Single Issue Multiple Data source code and generating executable code therefrom is provided. Input is received. One or more data reordering operations in the input are identified and each data reordering operation in the input is abstracted into a corresponding virtual shuffle operation so that each virtual shuffle operation forms part of an expression tree. One or more virtual shuffle trees are collapsed by combining virtual shuffle operations within at least one of the one or more virtual shuffle trees to form one or more combined virtual shuffle operations, wherein each virtual shuffle tree is a subtree of the expression tree that only contains virtual shuffle operations. Then code is generated for the one or more combined virtual shuffle operations.Type: GrantFiled: January 26, 2006Date of Patent: February 10, 2015Assignee: International Business Machines CorporationInventors: Alexandre E. Eichenberger, Kai-Ting Amy Wang, Peng Wu, Peng Zhao
-
Patent number: 8949786Abstract: A method and system for parallelization of sequential computer program code are described. In one embodiment, an automatic parallelization system includes a syntactic analyzer to analyze the structure of the sequential computer program code to identify the positions to insert SPI to the sequential computer code; a profiler for profiling the sequential computer program code by preparing call graph to determine dependency of each line of the sequential computer program code and the time required for the execution of each function of the sequential computer program code; an analyzer to determine parallelizability of the sequential computer program code from the information obtained by analyzing and profiling of the sequential computer program code; and a code generator to insert SPI to the sequential computer program code upon determination of parallelizability to obtain parallel computer program code, which is further outputted to a parallel computing environment for execution and the method thereof.Type: GrantFiled: December 1, 2009Date of Patent: February 3, 2015Assignee: KPIT Technologies LimitedInventors: Vinay G. Vaidya, Ranadive Priti, Sah Sudhakar
-
Patent number: 8949811Abstract: A method includes constructing a lambda object-oriented scripting language (?JS) model for a software program written in JavaScript; converting the ?JS model to a continuation-passing style (CPS) model for the software program; constructing a control flow graph (CFG) for the software program based on the CPS model; and optimizing the CPS model by merging a sequence of two or more “let” operations. The two or more “let” operations in the CPS model and are generated based on the ?JS model, so that they are represented by a single node in the CFG.Type: GrantFiled: August 26, 2011Date of Patent: February 3, 2015Assignee: Fujitsu LimitedInventor: Praveen K. Murthy
-
Patent number: 8943485Abstract: Detecting localizable native methods may include statically analyzing a native binary file of a native method. For each function call invoked in the native binary, it is checked whether resources accessed through the function call is locally available or not. If all resources accessed though the native method is locally available, the method is annotated as localizable.Type: GrantFiled: September 13, 2012Date of Patent: January 27, 2015Assignee: International Business Machines CorporationInventors: Michael H. Dawson, Yuqing Gao, Megumi Ito, Graeme Johnson, Seetharami R. Seelam
-
Patent number: 8935672Abstract: This description provides tools for lazy evaluation of geometric definitions of objects within procedural programming environments. Computer-based methods provided by these tools may parse input program code that includes statements that are syntactically consistent with a procedural programming language. These statements may also include defined functions that are not syntactically consistent with the procedural programming language. The defined functions may be associated with a given function that is defined according to the procedural programming language. The given function may relate to a geometric design of an object. The methods may identify inputs and outputs to this given function, and may build a dependency graph that relates this given function to other functions, based on the inputs and/or outputs of the given function. The methods may delay evaluating the given function until a triggering event occurs, at which time the methods may evaluate the given function to produce the output.Type: GrantFiled: September 14, 2012Date of Patent: January 13, 2015Assignee: The Boeing CompanyInventors: Paul Zack Thuneman, Thomas A. Grandine, Jan H. Vandenbrande, Gregory Mikel Anderson
-
Patent number: 8930916Abstract: Data is received that includes at least a portion of a program. Thereafter, entry point locations and execution-relevant metadata of the program are identified and retrieved. Regions of code within the program are then identified using static disassembly and based on the identified entry point locations and metadata. In addition, entry points are determined for each of a plurality of functions. Thereafter, a set of possible call sequences are generated for each function based on the identified regions of code and the determined entry points for each of the plurality of functions. Related apparatus, systems, techniques and articles are also described.Type: GrantFiled: January 31, 2014Date of Patent: January 6, 2015Assignee: Cylance Inc.Inventors: Derek A. Soeder, Matt Wolff
-
Patent number: 8924945Abstract: A computer-implemented method for initializing computer programming elements based on dependency graphs is provided. The method includes determining a dependency graph associated with a computer programming element to be initialized. The method also includes traversing the determined dependency graph, so as to obtain thread information associated with each of the one or more computer programming elements of the determined dependency graph, and determining, based on the obtained thread information associated with each of the computer programming elements, an aggregate thread information of all the computer programming elements of the determined dependency graph. The method further includes generating code which initializes the computer programming element to be initialized based at least on the determined aggregate thread information. Systems and machine-readable media are also provided.Type: GrantFiled: October 4, 2012Date of Patent: December 30, 2014Assignee: Google Inc.Inventor: Erik Lewis Wright
-
Patent number: 8910134Abstract: A method for performing a neighbor-flipping transformation is provided. In one embodiment, a graph analysis program for computing a function relating to nodes in a directed graph is obtained and analyzed for neighborhood iterating operations, in which a function is computed over sets of nodes in the graph. For any detected neighborhood iterating operation, the method transforms the iterating operation by reversing the neighbor node relationship between the nodes in the operation. The transformed operation computes the same value for the function as the operation prior to transformation. The method alters the neighbor node relationship automatically, so that a user does not have to recode the graph analysis program. In some cases, the method includes construction of edges in the reverse direction while retaining the original edges in addition to performing the transformation.Type: GrantFiled: January 3, 2013Date of Patent: December 9, 2014Assignee: Oracle International CorporationInventors: Sungpack Hong, Hassan Chafi, Eric Sedlar
-
Patent number: 8898197Abstract: A method and apparatus for generating a data structure. A plurality of entity reference relationship structures is accessed. Each entity reference relationship structure establishes a relationship between a different pair of entity structures of a plurality of entity structures. Each path from a first vertex to a second vertex that corresponds to a second entity structure is determined. For each path, all coupled sets of pairs of entity instance identifiers, wherein each coupled set comprises a pair of entity instance identifiers from each entity reference relationship structure corresponding to the path are identified. For each coupled set, a first entity instance identifier in the each coupled set that refers to the first entity structure and a second entity instance identifier in the each coupled set that refers to the second entity structure are stored in association with one another in a new entity reference relationship structure.Type: GrantFiled: May 23, 2011Date of Patent: November 25, 2014Inventor: Bhargav Senjalia