Abstract: A method, system, and article of manufacture are disclosed for transforming a definition of a process for delivering a service on a specified computing device. This service process definition is comprised of computer readable code. The method comprises the steps of expressing a given set of assumptions in a computer readable code; and transforming the definition by using a processing unit to apply the assumptions to the definition of the process to change the way in which the process operates. The definition of the process may be transformed by using factors relating to the specific context in or for which the definition is executed. Also, the definition may be transformed by identifying, in a flow diagram for the process, flows to which the assumptions apply, and applying program rewriting techniques to those identified flows.

Abstract: An embodiment of the present invention is a technique to hide latency in program traces. Blocks of instructions between start and end of a critical section are associated with color information. The blocks correspond to a program trace and containing a wait instruction. The wait instruction is sunk down the blocks globally to the end of the critical section using the color information and a dependence constraint on the wait instruction.

Abstract: A system and a method are disclosed for efficiently executing database queries using a computing device that includes a central processing unit (CPU) and a processing unit based on single instruction multiple thread (SIMT) architecture, for example, a GPU. A query engine determines a target processing unit to execute a database query based on factors including the type and amount of data processed by the query, the complexity of the query, and the current load on the processing units. An intermediate executable representation generator generates an intermediate executable representation for executing a query on a database virtual machine. If the query engine determines that the database query should be executed on an SIMT based processing unit, a native code generator generates native code from the intermediate executable representation. The native code is optimized for execution using a particular processing unit.

Abstract: A sampling based DBR framework which leverages a separate core for program analysis. The framework includes a hardware performance monitor, a DBR service that executes as a separate process and a lightweight DBR agent that executes within a client process. The DBR service aggregates samples from the hardware performance monitor, performs region selection by deducing the program structure around hot samples, performs transformations on the selected regions (e.g. optimization), and generates replacement code. The DBR agent then patches the client process to use the replacement code.

Abstract: When a wait statement is encountered in an HDL simulation, the simulation kernel executes functions corresponding to other processes while waiting for the wait to mature. However, the preservation of variables and states of each process and procedure in the call chain can be complex and inefficient. An embodiment of the present invention provides a method to suspend procedures in simulation of an HDL circuit design such that processes that call procedures containing wait statements are executed on a secondary runtime stack and can be suspended by saving the state of simulation and switching simulation execution to the primary runtime stack.

Abstract: Disclosed herein are systems, methods, and non-transitory computer-readable storage media for obfuscating branches in computer code. A compiler or a post-compilation tool can obfuscate branches by receiving source code, and compiling the source code to yield computer-executable code. The compiler identifies branches in the computer-executable code, and determines a return address and a destination value for each branch. Then, based on the return address and the destination value for each branch, the compiler constructs a binary tree with nodes and leaf nodes, each node storing a balanced value, and each leaf node storing a destination value. The non-leaf nodes are arranged such that searching the binary tree by return address leads to a corresponding destination value. Then the compiler inserts the binary tree in the computer-executable code and replaces each branch with instructions in the computer-executable code for performing a branching operation based on the binary tree.

Abstract: According to one aspect of the present disclosure, a method and technique for reducing branch misprediction impact for nested loop code is disclosed. The method includes: responsive to identifying code having an outer loop and an inner loop, determining a quantity of iterations of the inner loop for an initial number of iterations of the outer loop; determining a number of processor cycles for executing the quantity of iterations of the inner loop for the initial number of iterations of the outer loop; determining whether the number of processor cycles is less than a threshold; and responsive to determining that the number of processor cycles is less than the threshold, fully unrolling the inner loop for the initial number of iterations of the outer loop.

Abstract: An integrated circuit includes a plurality of tiles. Each tile includes a processor, a switch including switching circuitry to forward data over data paths from other tiles to the processor and to switches of other tiles, and a switch memory that stores instruction streams that are able to operate independently for respective output ports of the switch.

Abstract: A system and method for restoring site collections stored in different content databases of a web application are disclosed. A restoration GUI may be displayed. Displaying the restoration GUI may include determining a plurality of databases used for the web application. For each respective database of the plurality of databases, one or more site collections stored in the database may be determined. Displaying the graphical user interface may further comprise displaying an aggregated view of the site collections stored in each database of the plurality of databases. The aggregated view may enable each site collection to be selected for restoration.

Abstract: Systems and methods for dynamically generating computer executable technical support procedures, as well as updating/augmenting such executable procedures, by tracking and processing sequences of actions (execution traces) that are taken by experts (or users) when performing a procedure or when executing an executable procedure.

Abstract: For a program that is made up of functions in units, each function is divided into instruction code blocks having a size CS where CS is the instruction cache line size of a target processor and an instruction code block that is Xth counting from the top of each function F is expressed as (F, X). Flow information of nodes that take (F, X) as identification names is extracted from an executable file of the function program. For each identification name, as neighborhood weight of each identification name that differs from that identification name, information for which that the frequency of appearance of each identification name is taken into consideration that belongs to a function that differs from that function in the neighborhood of each appearing node in the flow information is found. Based on said neighborhood weight information, the functions are arranged in the memory space such that the number of conflicts of said instruction cache is reduced.

Abstract: According to one embodiment, a first program code including a plurality of variables is converted to a second program code to be executed by a multi-core processor including a plurality of cores. Specifically, an access pattern of each variable in the first program code is decided. All variables in the first program code are classified into a plurality of groups each of which variables belong to the same access pattern. A member structure of each group having variables belonging to the same access pattern is created. Each member structure includes variables of one group. A route-pointer indicating an address (in a memory) of variables of the member structure is created. The variables in the first program code are converted to the member structure and the route-pointer (in the second program code) that indicate the variables. The second program code is outputted to the multi-core processor.

Abstract: A method and system for page preloading using a control flow are provided. The method includes extracting preload page information from one or more pages in a first program code, and generating a second program code including the first program code and the extracted preload page information. The second program code is stored in non-volatile memory. When loading a page from the second program code stored in the non-volatile memory into main memory, preloading one or more pages from the non-volatile memory based on the preload page information stored in the loaded page.

Abstract: Execution control techniques are described for use in a translator that converts subject code into target code. The translator includes a translator trampoline function that is called from a translator run loop and which in turn calls either to a translator code generator to generate target code, or else calls previously generated target code for execution. Control then returns to the translator trampoline function to make a new call, or returns to the translator run loop. Other aspects include making context switches through the trampoline function and setting first and second calling conventions either side of the trampoline function. Jumping directly or indirectly between target code blocks during execution is also described.

Abstract: A tool supports management of engineering project changes using a current design diagram with links to implementation components, a proposed design diagram, and a work list of tasks for transforming the current design into the proposed design. Tasks recite intended changes such as add, remove, or refactor, with reference to implementation components to be changed, and tracking information. Work list tasks may be automatically generated based on design model differences correlated with project code, automatically generated based on tracked user design actions correlated with project code, and/or manually generated by users. Work lists may be exported. Users can mark a relationship for removal and view a corresponding updated work list. Users can trace impact of a work list on project context such as testing coverage, database structures, and user scenarios.

Abstract: A method and apparatus for enabling a Software Transactional Memory (STM) with precompiled binaries is herein described. Upon encountering an access operation in a transaction, an annotation field associated with a memory location referenced by the access is checked. In response to the memory location representing a previous similar access within the transaction, the access is performed without access barriers. However, if the annotation field is in a default state representing no previous access during a pendancy of the transaction, then a mode of the processor is determined. If the processor mode is in implicit mode, an access handler/barrier is asynchronously executed. Conversely, in an explicit mode, a flag is set instead of asynchronously executing the handler. In addition, during compilation convert explicit and convert implicit instructions are inserted to intelligently convert modes for precompiled and newly compiled binaries.

Abstract: An interprocedural exception analysis and transformation framework for computer programming languages such as C++ that (1) captures the control-flow induced by exceptions precisely, and (2) transforms the given computer program into an exception-free program that is amenable for precise static analysis, verification, and optimizations.

Abstract: A compiler and method of optimizing code by partial inlining of a subset of blocks of called blocks of code into calling blocks of code. A restart of the called blocks of code is provided for the case where non-inlined blocks of code are reached at run time. Blocks selected for partial inlining may include global side effects depending on the computer program environment. Global side effects in the selected blocks of code leading to a restart are sanitized in order to defer changes to the global state of the computer program.

Abstract: A novel system, computer program product, and method are disclosed for transforming a program to facilitate points-to analysis. The method begins with accessing at least a portion of program code, such as JavaScript. In one example, a method with at least one dynamic property correlation is identified for extraction. When a method m is identified for extraction with the dynamic property correlation, a body of the loop l in the method m is extracted. A new method mp is created to include the body of the loop l with the variable i as a parameter. The loop l is substituted in the program code of the method m with the new method mp to create a transformed program code.

Abstract: Methods and systems for executing a code stream of non-native binary code on a computing system are disclosed. One method includes parsing the code stream to detect a plurality of elements including one or more branch destinations, and traversing the code stream to detect a plurality of non-native operators. The method also includes executing a pattern matching algorithm against the plurality of non-native operators to find combinations of two or more non-native operators that do not span across a detected branch destination and that correspond to one or more target operators executable by the computing system. The method further includes generating a second code stream executable on the computing system including the one or more target operators.

Abstract: A system and method for optimizing the object codes of a computer program is disclosed. The method includes receiving one or more object code units associated with an executable program; identifying, among the object code units, a first program entity and a first set of operations associated with the first program entity and a second program entity and a second set of operations associated with the second program entity, each program entity having an object code segment and an associated address; updating the object code units by inserting a predefined instruction before the first program entity's object code segment and causing the second set of operations to be associated with the predefined instruction if the first program entity's object code segment is identical to the second program entity's object code segment; and combining the updated object code units into the executable program.

Abstract: A high level shader language compiler incorporates transforms to optimize shader code for graphics processing hardware. An instruction reordering transform determines instruction encapsulations of dependent instructions that reduce concurrent register usage by the shader. A phase pulling transform re-organizes the shader's instructions into phases that reduce a measure of depth of texture loads. A register assigning transform assigns registers to lower register usage by the shader.

Abstract: A method of automatically creating functionally and structurally diverse equivalent copies of software executables using return oriented programming for the purpose of passing through a filter and other purposes includes starting with a program and a target runtime environment, creating a return oriented instruction library having a plurality of code fragments which end in a ‘return’ instruction from the program and chaining fragments together to automatically form diverse equivalent copies of software executables using return oriented programming.

Abstract: Disclosed herein is a method of optimizing an executable program to improve instruction cache hit rate when executed on a processor. A method of predicting instruction cache behavior of an executable program is also disclosed. According to further aspects of the present invention, there is provided a software development tool product comprising code which when executed on a computer will perform the method of optimizing an executable program. A linker product and a computer program are also disclosed.

Abstract: Processing program code can include comparing functions specified in program code to identify a function group including a plurality of matching functions. A generalized function can be generated, using a processor, for the function group that implements an algorithm common to each of the plurality of matching functions. For each function of the function group, a wrapper function associated with the function can be generated, wherein each wrapper function calls the generalized function. A version of the program code including the generalized function and the wrapper function in place of each function of the function group can be created.

Abstract: A compilation method and mechanism for parallelizing program code. A method for compilation includes analyzing source code and identifying candidate code for parallelization. Having identified one or more suitable candidates, the profitability of parallelizing the candidate code is determined. If the profitability determination meets a predetermined criteria, then the candidate code may be parallelized. If, however, the profitability determination does not meet the predetermined criteria, then the candidate code may not be parallelized. Candidate code may comprises a loop, and determining profitability of parallelization may include computing a probability of transaction failure for the loop. Additionally, a determination of an execution time of a parallelized version of the loop is made. If the determined execution time is less than an execution time of a non-parallelized version of said loop by at least a given amount, then the loop may be parallelized.

Abstract: Architectural design intent for software is represented in some type of concrete form. A set of computable rules are inferred from the representation of the architectural design intent. The rules are applied to the codebase at various points in the development process including but not limited to when source code is checked into a project or when a build is run, or when a test run is performed. If the codebase being developed is not consistent with the architectural intent of the designer as captured, feedback concerning non-compliance is provided.

Abstract: Methods and apparatus to data dependence testing for loop fusion, e.g., with code replication, array contraction, and/or loop interchange, are described. In one embodiment, a compiler may optimize code for efficient execution during run-time by testing for dependencies associated with improving memory locality through code replication in loops that enable various loop transformations. Other embodiments are also described.

Abstract: A compiling method compiles an object program to be executed by a processor having a plurality of execution units operable in parallel. In the method a first availability chain is created from a producer instruction (p1), scheduled for execution by a first one of the execution units (20: AGU), to a first consumer instruction (c1), scheduled for execution by a second one of the execution units (22: EXU) and requiring a value produced by the said producer instruction. The first availability chain comprises at least one move instruction (mv1-mv3) for moving the required value from a first point (20: ARF) accessible by the first execution unit to a second point (22: DRF) accessible by the second execution unit.

Abstract: A software installation package includes encrypted source code. An installer receives an encryption key for decrypting the encrypted source code. The installer further causes the establishment of a temporary virtual machine. The encrypted source code is decrypted, using the encryption key, on the temporary virtual machine. A compiler executing on the temporary virtual machine compiles the source code into an application. The application is transferred from the temporary virtual machine to an operating environment. The temporary virtual machine is then destroyed, thereby also destroying any decrypted copies of the source code.

Abstract: A machine-independent representation of computer instructions can serve as a standard for machine instruction description that is suitable for post-link transformation tools, such as post-link optimizers, and for education of users. In one embodiment the instructions are presented as expression trees in a XML file. An optimizer operates on the transformed code representations, after which optimized code is re-transformed into machine-readable code.

Abstract: A cross-logical entity group is created that includes one or more accelerators to be shared by a plurality of logical entities. Instantiated on the accelerators are functions that are common across multiple logical entities. The functions to be instantiated are determined, for instance, dynamically during run-time.

Abstract: Systems and methods disclosed herein uniquely define each type of Fortran type descriptor within an executable file or shared library to allow for a rapid determination of how the dynamic type of one object (e.g., a first polymorphic entity) relates to that of another object (e.g., a second polymorphic entity) while allowing for the lazy loading of shared libraries. In one aspect, type descriptor definitions are instantiated (e.g., during compile-time) in each object file in which polymorphic entities are defined, each type descriptor definition is marked with a singleton attribute, and each group of common type descriptor definitions is associated with a COMDAT group to ensure that only a single copy of each type descriptor is defined in a corresponding executable file at a particular address in memory to which polymorphic entities can reference. Type descriptor addresses can be compared to determine dynamic type relations between polymorphic entities.

Abstract: A method of code execution by a processor including duplicating a first set of instructions to generate a second set of instructions, modifying the second set of instructions, executing the modified set of instructions, and upon exiting the modified set of instructions, loading an updated state of the processor.

Abstract: Embodiments of the present invention address deficiencies of the art in respect to externally stored static elements for a document in a document editor and provide a method, system and computer program product for moving static elements for a document between an external file and the document in a document editor. A data processing system for moving static elements for a document between an external file and the document in a document editor can include an automated de-externalization and re-externalization processor coupled to a document editor. The automated de-externalization and re-externalization processor can include program code enabled both to replace static elements in a subject document with static element references while storing replaced static elements in entries in an external file, and also to replace static element references in the subject document with corresponding static elements stored in the entries in the external file.

Abstract: Dynamic blocking determines which pairs of records in a data set should be examined as potential duplicates. Records are grouped together into blocks by shared properties that are indicators of duplication. Blocks that are too large to be efficiently processed are further subdivided by other properties chosen in a data-driven way. We demonstrate the viability of this algorithm for large data sets. We have scaled this system up to work on billions of records on an 80 node Hadoop cluster.

Abstract: A method and apparatus for optimizing source code for use in a parallel computing environment by compiling an application source code, performing analysis, and optimizing the application source code. At the time of compilation, a compiler adds instrumentation to a prepared executable. An analysis program then analyzes the prepared executable and generates an analysis result. The analysis result is then used by the analysis program to optimize the application source code for parallel processing.

Abstract: The present invention provides a method to optimize object code files produced by a compiler for several different types of target processors. The compiler divides the source code to be compiled into several functional modules. Given a specified set of target processors, each functional module is compiled resulting in a target object version for each target processor. Then, for each functional module, a merging process is performed wherein identical target object versions or target object versions with similar contents are merged by deleting the identical or similar versions. After this merging process, a composite object code file is formed containing all of the non-deleted target object versions of the function modules.

Abstract: System and method for vectorizing combinations of program operations. Program code is received that includes a combination of individually vectorizable program portions that collectively implement a first computation. Each individually vectorizable program portion has at least one array input and at least one array output. The combination of individually vectorizable program portions is transformed into a single vectorizable program portion that is or includes a functional composition of the combination of individually vectorizable program portions. Vectorized executable code implementing the first computation is generated based on the single vectorizable program portion. The generated executable code is directed to SIMD (Single-Instruction-Multiple-Data) computing units of a target processor.

Abstract: A method, medium and apparatus for storing and restoring a register context for a fast context switching between tasks is disclosed. The method, medium and apparatus may improve overall operating speed of a system by increasing the speed of context switching. The method may include adding an update code for updating information of live registers to a task file that includes a code of a task to perform a specified function, converting the task file having the update code added thereto into a run file, updating the information of the live registers with the update code during running of the task using the run file, and storing a live register context according to the updated information of the registers.

Abstract: Technologies are generally described for runtime optimization adjusted dynamically according to changing costs of one or more system resources. Multicore systems may encounter dynamic variations in performance associated with the relative cost of related system resources. Furthermore, multicore systems can experience dramatic variations in resource availability and costs. A dynamic registry of system resource costs can be utilized to guide dynamic optimization. The relative scarcity of each resource can be updated dynamically within the registry of system resource costs. A runtime code generating loader and optimizer may be adapted to adjust optimization according to the resource cost registry. Information regarding system resource costs can support optimization tradeoffs based on resource cost functions.

Abstract: A method, computer program product, and system for memory optimization by partitioning extraneous information from executable virtual machine code or interpreted code. The extraneous information may be stored separately, or accessed from the original code if needed for debugging or servicing the code in the field. This approach optimizes memory usage by reducing memory footprint while maintaining accessibility of the non-executable information for debugging and other processes necessary for servicing code in the field.

Abstract: Technologies are generally described for parallel dynamic optimization using multicore processors. A runtime compiler may be adapted to generate multiple instances of executable code from a portable intermediate software module. The various instances of executable code may be generated with variations of optimization parameters such that the code instances each express different optimization attempts. A multicore processor may be leveraged to simultaneously execute some, or all, of the various code instances. Preferred optimization parameters may be determined from the executable code instances that may correctly complete in the least time, or may use the least amount of memory, or that may prove superior according to some other fitness metric. Preferred optimization parameters may be used to seed future optimization attempts. Output generated from the preferred instances may be used as soon as the first instance correctly completes block.

Abstract: State recovery methods and apparatus for computing platforms are disclosed. An example method includes inserting a first instruction into optimized code to cause a first portion of a register in a first state to be saved to memory before execution of a region of the optimized code; and maintaining a value indicative of a manner in which a second portion of the register in the first state is to be restored in connection with a state recovery from the optimized code.

Abstract: A computer implemented method includes receiving a client programming language input and a server programming language input, processing the client and server programming language inputs, and translating the client programming language input into an executable client application and the server programming language input into an executable server application, the executable client and server applications operable to communicate with each other. Processing the client and server programming language inputs includes identifying any invocations of server procedures of the server programming language input in the client programming language input, producing a combined server procedure in the server programming language input for identified server procedures invoked by the client programming language input, and replacing invocations of the identified server procedures in the client programming language input with an invocation of the combined server procedure.

Abstract: An execution control method is described for use in a translator (19) which converts subject code (17) into target code (21). The translator (19) includes a translator trampoline function (191) which is called from a translator run loop (190) and which in turn calls either to a translator code generator (192) to generate target code, or else calls previously generated target code (212) for execution. Control then returns to the translator trampoline function (191) to make a new call, or returns to the translator run loop (190). Other aspects include making context switches through the trampoline function (191) and setting first and second calling conventions either side of the trampoline function (191). Jumping directly or indirectly between target code blocks (212) during execution is also described.

Abstract: A compiler, which corresponds to a recent processor having a multithread function, that enables execution of efficient instruction scheduling and allows a programmer to control the instruction scheduling includes: an instruction scheduling directive receiving unit which receives, from a programmer, a directive for specifying an instruction scheduling method; and an instruction scheduling unit which executes, conforming to one of instruction scheduling methods, instruction scheduling of rearranging intermediate codes corresponding to the source program. The instruction scheduling unit selects one of instruction scheduling methods according to the directive received by the instruction scheduling directive receiving unit, and executes instruction scheduling conforming to the selected instruction scheduling method.

Abstract: A mechanism for cross-building support using dependency information is disclosed. A method of the invention includes parsing a source code package received for compilation into a binary source code package for a target machine, the parsing to determine a list of dependency packages needed to compile the source code package, for each dependency package in the list of dependency packages determining a type of the dependency package and associating an architecture of at least one of a build machine compiling the source code package or the target machine with the dependency package based on a determined type of the dependency package, downloading each dependency package in the list of dependency packages in a binary form of the build architecture format, and downloading each dependency package that is associated with the target machine in a binary form of the target architecture format.

Abstract: Example embodiments described herein may comprise a transfer of firmware execution within a non-volatile memory device to one or more replacement instructions at least in part in response to a match between a code fetch address and an address stored in a trap address register.

Abstract: Various technologies and techniques are disclosed that provide software transactional protection of managed pointers. A software transactional memory system interacts with and/or includes a compiler. At compile time, the compiler determines that there are one or more reference arguments in one or more code segments being compiled whose source cannot be recovered. The compiler executes a procedure to select one or more appropriate techniques or combinations thereof for communicating the sources of the referenced variables to the called code segments to ensure the referenced variables can be recovered when needed. Some examples of these techniques include a fattened by-ref technique, a static fattening technique, a dynamic ByRefInfo type technique, and others. One or more combinations of these techniques can be used as appropriate.