Abstract: A handle for a trace is provided that is memory indifferent. The handle is created using contents of the trace rather than memory location of the trace. This enables the trace to be easily identified in subsequent runs of an application associated with the trace.

Abstract: A program verification process begins by converting a language of the program from a first language into an intermediate language representation. The loops of the program are eliminated. The program is converted from the intermediate language representation into a passive form. Dominators for the passive form of the program are determined. A verification condition is generated from the passive form of the program. The verification condition is structured according to the computed dominators such that when a theorem prover identifies a potential error, portions of the passive form of the program irrelevant to the potential error are ignored.

Abstract: An illustrative embodiment provides a computer-implemented method for an alternate type system for optimizing the evaluation and use of meta-template instantiations. The computer-implemented method obtains a source code, instantiates an element of the source code to form an instantiated element and identifies a meta-template within the instantiated element to form an identified meta-template. The computer-implemented method creates an entry for the identified meta-template in a first data structure, wherein the entry comprises a set of mapped entries, creates an associated entry in a second data structure linked to the entry comprising the set of mapped entries, wherein the associated entry represents the set of mapped entries, and uses the associated entry of the second data structure in combination with the entry of the first data structure.

Abstract: An XQuery access API is described, for providing access to XML data from a data source, using the XQuery language. A requestor can request, from a server, performance of an operation on XML data, wherein request messages and response messages conform to the Simple Object Access Protocol (SOAP). Request and response messages can be transmitted using Hypertext Transfer Protocol (HTTP) or Hypertext Transfer Protocol over Secure Socket Layer (HTTPS). The format of the request and response messages is specified in a definition of a Web service, where the definition conforms to the Web Service Description Language (WSDL).

Abstract: A single-chip multiprocessor system and operation method of this system based on a static macro-scheduling of parallel streams for multiprocessor parallel execution. The single-chip multiprocessor system has buses for direct exchange between the processor register files and access to their store addresses and data. Each explicit parallelism architecture processor of this system has an interprocessor interface providing the synchronization signals exchange, data exchange at the register file level and access to store addresses and data of other processors. The single-chip multiprocessor system uses ILP to increase the performance. Synchronization of the streams parallel execution is ensured using special operations setting a sequence of streams and stream fragments execution prescribed by the program algorithm.

Abstract: A markup language document (e.g. an XML document) may contain a first instance of a markup language element having an attribute with a first, platform-independent value, a second instance of the element having the attribute with a second, platform-specific value, and an indicator that the second value overrides the first. Executable code may replace both of the first and second instances with a single instance having the attribute with the second value. Alternatively the markup language document may contain a first instance of a markup language element having a first, platform-independent attribute, a second instance of the element having a second, platform-specific attribute different from the first attribute, and an indicator that the second instance extends the first. In this case executable code may replace both instances of the markup language element with a single instance having the first attribute and the second attribute.

Abstract: For a variable accessed at least once in a software-based transactional memory system (STM) defined (STM-defined) critical region of a program, modifying an access to the variable that occurs outside any STM-defined critical region system by starting a hardware based transactional memory based transaction, within the hardware based transactional memory based transaction, checking if the variable is currently owned by a STM transaction, checking if the variable is currently owned by a STM transaction; if the variable is not currently owned by a STM transaction, performing the access and then committing the hardware based transactional memory transaction; and if the variable is currently owned by a STM transaction, performing a responsive action.

Abstract: A “kill” intrinsic that may be used in programs for designating specific data objects as having been “killed” by a preceding action is provided. The concept of a data object being “killed” is that the compiler is informed that no operations (e.g., loads and stores) on that data object, or its aliases, can be moved across the point in the program flow where the data object is designated as having been “killed.” The “kill” intrinsic limits the reordering capability of an optimization scheduler of a compiler with regard to operations performed on “killed” data objects. The “kill” intrinsic may be used with DMA operations. Data objects being DMA'ed from a local store of a processor may be “killed” through use of the “kill” intrinsic prior to submitting the DMA request. Data objects being DMA'ed to the local store of the processor may be “killed” after verifying the transfer completes.

Abstract: A method and apparatus for to blocking nested loops having feedback or feedforward indexing. An embodiment of a method includes receiving a computer code segment, the segment including a first inner loop and a second outer loop, the inner loop being within the outer loop and the inn loops having a one-dimensional iteration space that is independent of the outer loop. The first loop is indexed by a variable I over a contiguous one-dimensional iteration space and addresses one or more data arrays with a shift in the index. The method further includes dividing a two-dimensional iteration space of the first loop and the second loop into multiple contiguous windows, where the second loop uses only one window of the plurality of windows during each iteration and the plurality of windows cover the iteration space. The method includes modifying the computer code segment by adding a third outer loop outside the second loop of the segment, the third loop encompassing the first loop and the second loop.

Abstract: Dynamic optimization of application code is performed by selecting a portion of the application code as a possible transaction. A transaction has a property that when it is executed, it is either atomically committed or atomically aborted. Determining whether to convert the selected portion of the application code to a transaction includes determining whether to apply at least one of a group of code optimizations to the portion of the application code. If it is determined to apply at least one of the code optimizations of the group of optimizations to the portion of application code, then the optimization is applied to the portion of the code and the portion of the code is converted to a transaction.

Abstract: A computer implemented method, system, and computer usable program code for simplifying compiler-generated software code by creating a stub routine for checking storage contiguity. A stub routine is generated for a subroutine. The stub routine is used to determine whether data is contiguous for the subroutine. A subroutine call in the code is replaced with a stub routine call for the stub routine. The subroutine call has at least one argument. The stub routine call includes each argument for the subroutine call. The code is executed. The stub routine is called by the stub routine call to determine whether data is contiguous for the subroutine.

Abstract: Creating a reference to data used to construct a computer-aided design model includes storing model data with tracking data, where the tracking data identifies the model data. A reference is created and the tracking data is associated with the reference to enable the reference to refer to the model data. A modeling operation is executed, which retrieves the tracking data associated with the reference, traverses a data structure defining the computer-aided design model while attempting to match the tracking data associated with the reference to the tracking data stored with the model data, and returns geometric data stored in the model data.

Abstract: An embodiment of the present invention is a system and method relating to shrinking, or optimizing, executable images resulting is a savings of storage space. In at least one embodiment, the present invention removes unnecessary fields, or information, from an executable image header before storing the image on a flash for a target platform. The removal of information that is irrelevant to the target platform allows the executable to take up less space on the flash memory. When loaded, the image is interpreted based on the optimized header information. In an embodiment, the image may be further compressed by known methods, to save additional space. Other embodiments are described and claimed.

Abstract: The present invention discloses a modified computer architecture which enables an applications program to be run simultaneously on a plurality of computers. Shared memory at each computer is updated with amendments and/or overwrites so that all memory read requests are satisfied locally. During initial program loading, or similar, instructions which result in memory being re-written or manipulated are identified. Additional instructions are inserted to cause the equivalent memory locations at all computers to be updated.

Abstract: A method and system for enhancing the execution performance of program code. An analysis of the program code is used to generate code usage information for each code module. For each module, the code usage information is used to determine whether the code module should be separated from its original module container. If so, the code module is migrated to a new module container, and the code module in the original module container is replaced with a reference to the code module in the new module container.

Abstract: Ordering instructions for specifying the execution order of other instructions improve throughput in a pipelined multiprocessor. Memory write operations local to a CPU are allowed to occur in an arbitrary order, and constraints are placed on shared memory operations. Multiple sets of instructions are provided in which order of execution of the instructions is maintained through the use of CPU registers, write buffers in conjunction with assignment of sequence numbers to the instruction, or a hierarchical ordering system. The system ensures that an earlier designated instruction has reach a specified state of execution prior to a latter instruction reaching a specified state of execution. The ordering of operations allows memory operations local to a CPU to occur in conjunction with other memory operations that are not affected by such execution.

Abstract: In a method for reducing code size a replaceable subset of instructions at a first location within a set of instructions and a matching target subset of instructions at a second location within the set of instructions are identified. A base offset and a relative offset are determined. The base offset and the relative offset indicate an absolute offset from the first location to the second location. An instruction to cause a base offset storage element to be loaded with the base offset is inserted prior to the first location. The replaceable subset of instructions is replaced with a second instruction to cause a program counter to be modified based on the relative offset and a value in the base offset register so that the modified program counter indicates the second location.

Abstract: A computer implemented method, data processing system, and computer usable code are provided for generating code to perform scalar computations on a Single-Instruction Multiple-Data (SIMD) Reduced Instruction Set Computer (RISC) architecture. The illustrative embodiments generate code directed at loading at least one scalar value and generate code using at least one vector operation to generate a scalar result, wherein all scalar computation for integer and floating point data is performed in a SIMD vector execution unit.

Abstract: A method and system of managing data access in a shared memory cache of a processor are disclosed. The method includes probing one or more memory addresses that map to a subset of the shared memory cache and sensing a plurality of events in the one or more memory addresses. Cache utilization information is then obtained by reading a hardware performance counter of the processor. The hardware performance counter is incremented based on the occurrence of the plurality of events. Based upon the cache utilization information, an occurrence of one of the plurality of events is reduced.

Abstract: A method for loop reformulation is provided such that a single exit ill-formed loop (SEIFL) can be reformulated into a reformulated code block that contains a transformed well-formed loop (TWFL). A SEIFL loop is a loop that can exit from the loop body of the loop. After the loop reformulation, the TWFL of the reformulated code block can only exit from the end of the loop. The reformulated code block will replace the SEIFL in the compiler's internal representation (IR) such that a more efficient executable machine code can be generated by optimizing the reformulated compiler's IR.

Abstract: A compiler can perform aggressive code motion optimization by respecting value dependence of safety values inserted into the intermediate representation of a computer program. In one embodiment, the present invention includes converting a computer program into an intermediate representation, the intermediate representation containing at least one safety check ensuring the safety of at least one dangerous instruction. In one embodiment, the invention further includes defining a safety value in the intermediate representation as the safety check and including the safety value as a safety argument of the dangerous instruction. In one embodiment, it is determined that the safety check is redundant. In response, in one embodiment, the invention includes updating the safety argument of the dangerous instruction, and eliminating the safety check from the intermediate representation during the safety check elimination optimization. Other embodiments are described and claimed.

Abstract: In a method for the optimisation of compiler-generated program code, the compiler-generated program code is searched for program code fragments which correspond, at least in their effect, to respectively one library code fragment contained in a predefined library. The program code fragments found thereby are replaced by respectively one call of the corresponding library code fragment. A computer program product comprises program instructions for the execution of this method. A portable data carrier contains both the program code optimised according to this method and the library.

Abstract: A program stored in a storage device is read. Partial compression, in the element in an array in a loop nest in the program, is performed by replacing an element local only in the loop nest in the entire program with a scalar variable. Access to an original array is inserted into a program for an non-local element.

Abstract: In embodiments, prior to compilation into machine code, a preprocessor generates directives by processing a source code and/or bytecode representation of a program and/or selecting default directives. The preprocessor embeds the directives in a bytecode representation of the program or a separate stream associated with the bytecode representation of the program. A just-in-time compiler may compile the bytecode representation into machine code directed by the embedded directives in one pass and/or a bytecode interpreter may interpret the bytecode representation of the program. In some embodiments, a computing device generates bytecodes during execution of a program, selects default directives, and embeds the default directives in the bytecodes or a separate stream associated with the bytecodes prior to compilation of the bytecodes into machine code.

Abstract: A method for committing memory transactions in an application that includes executing a plurality of sections of the application in parallel, logging a plurality of memory transactions that occur while executing the plurality of sections to obtain a plurality of logs and a plurality of temporary results, wherein the plurality of memory transactions that includes a plurality of writes to at least one memory location, comparing the plurality of logs to identify an optimal list of writes from the plurality of writes, and committing memory transactions corresponding to a subset of the plurality of temporary results, wherein the subset of the plurality of temporary results is identified by the optimal list of writes.

Abstract: The present invention performs manipulations on the assembly file level. As a compiler outputs an assembly file, the assembly file may be inspected and modified before it is sent to the assembler. One or more of the following modifications may be made to the assembly file: rewrite certain symbols, scramble program symbols, reorganize declarations of global variables so that their layout and default values are known prior to linking, and identify initializer and de-initializer functions in order to make them callable through central initialization and de-initialization functions, respectively.

Abstract: Disclosed is a method, apparatus and a computer program of a virtual execution environment. In one aspect thereof a data processor includes a disk-based storage system and a virtual machine monitor configured to execute a program in a virtual container. The virtual machine monitor is responsive, prior to execution of the application, to record a set of files accessed during a phase change in the disk-based storage system in a manner predetermined to minimize the time needed to retrieve the set of files. The virtual machine monitor is further responsive, at the occurrence of the phase change, or prior to the occurrence of a phase change if the files are prefetched, to retrieve the files from the disk-based storage system.

Abstract: Systems and methods perform affine partitioning on a code stream to produce code segments that may be parallelized. The code segments include copies of the original code stream with conditional inserted that aid in parallelizing code. The conditional is formed by determining the constraints on a processor variable determined by the affine partitioning and applying the constraints to the original code stream.

Abstract: Disclosed is a method, apparatus and a computer program of a virtual execution environment. In one aspect thereof a data processor includes a read-only storage medium and a virtual machine monitor configured to execute a program in a virtual container. Prior to execution of the application a set of application components accessed during a phase change are recorded in the read-only storage medium in a manner predetermined to minimize the time needed to retrieve the set of components. At the occurrence of the phase change, or prior to the occurrence of a phase change if the files are prefetched, the virtual machine monitor retrieves the components from the read-only storage medium. In a further aspect thereof there is provided a packager of an application to be executed in a virtualization environment by a virtual machine monitor.

Abstract: Disclosed is as system for reducing memory and computational requirements of graphics operations. The system provides techniques for combining otherwise individual operations to apply filters to images. The combined filter emerging from the combination spares the processor time and the creation of an entire intermediary image. The system further provides for application of these techniques in many contexts including where the operations are fragment programs in for a programmable GPU.

Abstract: A method and system for enhancing the execution performance of program code. An analysis of the program code is used to generate code usage information for each code module. For each module, the code usage information is used to determine whether the code module should be separated from its original module container. If so, the code module is migrated to a new module container, and the code module in the original module container is replaced with a reference to the code module in the new module container.

Abstract: A computer-implemented system for representing data comprises a position indicator that indicates a position of a datum within a group, a name indicator that optionally names the datum, and a value of the datum. A type to be assigned to the datum is derived from at least one of a name of the datum and the position of the datum within the group. Methods of using the system are also provided.

Abstract: A system, method and program product for optimizing compiled Java code to reduce file size. A system is provided that includes: a first optimization that removes unnecessary exception declarations in the compiled Java code; a second optimization that converts checked exception declarations to unchecked exception declarations in the compiled Java code; and a third optimization that removes exception lists in the compiled Java code.

Abstract: Techniques for reordering the data section of a computer program are provided for improving the run-time performance of the program. A computer program that comprises a data section and a code section is compiled. After the computer program has been compiled, the data section of the computer program is reordered based at least on annotation information that is included in a plurality of object files that represent the object code of the program. A specific binary file that is a specific executable version of the computer program is generated. The specific binary file includes the data section of the computer program that has been reordered. The data section of the computer program may be reordered during the linking of the plurality of the object files. Alternatively, the data section may be reordered after the computer program has been linked into a first binary file by rewriting the first binary file into the specific binary file.

Abstract: In a method for building distributed software, a single computer program may be written which includes distinct sets of routines defining operation at distinct computing devices (or types of computing devices) in a distributed system. Direct calls may be made between routines, even if the routines define operation of distinct computing devices. Through examination and processing of the computer program, multiple computer programs which collectively constitute distributed software for the distributed system are created. Each program defines the operation of a computing device within the system. Direct calls are emulated using instructions for inter-process communication which effect remote routine invocation transparently from the perspective of the developer. In the result, the run-time operation of each output computer program at its respective target computing device is consistent with the operation defined for that computing device within the input computer program.

Abstract: A method includes extracting at least one object file from a library of object files. The method also includes identifying an interprocedural optimization associated with a plurality of object files. The plurality of object files includes the at least one extracted object file. The method further includes invoking recompilation of at least one of the plurality of object files to implement the identified interprocedural optimization. In addition, the method includes generating at least one executable file using the at least one recompiled object file. The plurality of object files could include interprocedural summary information generated by a compiler during a compilation of at least one source file and a compiler internal representation associated with the compiler during the compilation. The interprocedural optimization could be identified using the interprocedural summary information, and the at least one recompiled object file could be generated using the compiler internal representation.

Abstract: A method and apparatus for use in compiling data for a program shader identifies within data representing control flow information an area operator definition instruction statement located outside the data dependent control flow structures. The method identifies within one of the data dependent branches at least one area operator use instruction statement that has the resultant of the area operator definition instruction statement as an operand. After identifying the area operator use instruction statement, the area operator definition instruction statement is placed within the data dependent branch.

Abstract: Various embodiments of the present invention relate to methods and systems for optimizing an intermediate code in a compilation logic. The intermediate code is optimized by performing reassociation in software loops. The intermediate code includes at least one critical recurrence cycle. The performance of reassociation in software loops can reduce a critical recurrence cycle in them, which can speed up their execution. The subject method can include the determination of one or more critical recurrence cycles in a software loop. The method can also include the determination of at least one edge in a critical recurrence cycle, with respect to which reassociation can be performed, if one or more pre-determined criteria are met. The method can further include performing reassociation of a dependee and a dependent of an edge. In an embodiment, when one or more pre-determined criteria are met, the logic of the software loop is maintained after performing reassociation of the dependee and the dependent of the edge.

Abstract: A program optimization device which, when optimizing a program, performs optimization depending on characteristics of data to be processed by the program without having to execute the program before the optimization, includes: an intermediate code conversion unit that converts an input program to be optimized, into an intermediate code; a variable value setting unit that sets a possible value of a variable according to externally provided information; a node value calculation unit that calculates a possible value of a node included in the intermediate code according to the value set by the variable value setting unit; an intermediate code optimization unit that optimizes the intermediate code according to the value calculated by the node value calculation unit; and an output program conversion unit that converts the intermediate code optimized by the intermediate code optimization unit, to an output program.

Abstract: A processing method and apparatus for processing an information is based on a sequence of instructions, where a repeated sub-sequence is detected in the sequence of instructions and an allocation between a processing resource and the repeated sub-sequence is determined based on an index information indicating the repetition frequency of the repeated sub-sequence. Thus, a combination of a scalable signal processor with automatic task distribution is provided, where the number of memory accesses can be reduced, as the repeated sub-sequence can be allocated to external processing units, which are correspondingly programmed or which use their embedded memory.

Abstract: Code is affine partitioned to generate affine partitioning mappings. Parallel code is generated based on the affine partitioning mappings. Generating the parallel code includes coalescing loops in the parallel code generated from the affine partitioning mappings to generate coalesced parallel code and optimizing the coalesced parallel code.

Abstract: A method and apparatus for disambiguating in a dynamic binary translator is described. The method comprises selecting a code segment for load-store memory disambiguation based at least in part on a measure of likelihood of frequency of execution of the code segment; heuristically identifying one or more ambiguous memory dependencies in the code segment for disambiguation by runtime checks; based at least in part on inspecting instructions in the code segment, and using a pointer analysis of the code segment to identify all other ambiguous memory dependencies that can be removed by the runtime checks.

Abstract: Various embodiments that may be used in performing speculative code motion for memory latency hiding are disclosed. One embodiment comprises extracting an asynchronous signal from a memory access instruction in a program to represent a latency of the memory access instruction, and generating a wait instruction to wait the asynchronous signal.

Abstract: In transactional memory systems, transactional aborts due to conflicts between concurrent threads may cause system performance degradation. A compiler may attempt to minimize runtime abort rates by performing one or more code transformations and/or other optimizations on a transactional memory program in an attempt to minimize one or more store-commit intervals. The compiler may employ store deferral, hoisting of long-latency operations from within a transaction body and/or store-commit interval, speculative hoisting of long-latency operations, and/or redundant store squashing optimizations. The compiler may perform optimizing transformations on source code and/or on any intermediate representation of the source code (e.g., parse trees, un-optimized assembly code, etc.). In some embodiments, the compiler may preemptively avoid naïve target code constructions.

Abstract: Methods and apparatus to create software basic block layouts are disclosed. In one example, a method identifies branch data associated with a plurality of machine accessible instructions and identifies a plurality of basic blocks associated with the branch data. The method generates a partial layout from the plurality of basic blocks and generates a substantial layout from the partial layout based on a cost metric.

Abstract: A compiling method compiles an object program to be executed by a processor having a plurality of execution units operable in parallel. A first availability chain is created from a producer instruction (p1) to a first consumer instruction (c1), when the execution of the instruction requires a value produced by the producer instruction. The first availability chain includes at least one move instruction (mv1-mv3) for moving the required value from a first point (20: ARF) accessible by the producer execution unit to a second point (22: DRF) accessible by a first consumer execution unit. When a second consumer instruction (c2), also requiring the same value, is scheduled for execution by an execution unit (23: EXU) other than the first consumer execution unit, at least part of the first availability chain is reused to move the required value to a point (23: DRF) accessible by that other execution unit.

Abstract: A method of ordering instructions. The method can include placing a first instruction that consumes a value of an object before a second instruction that produces the value of the object such that the first instruction is processed before the second instruction and a physical location is allocated to the value of the object upon processing the first instruction.

Abstract: Optimizing program code in a static compiler by determining the live ranges of variables and determining which live ranges are candidates for moving code from the use site to the definition site of source code. Live ranges for variables in a flow graph are determined. Selected live ranges are determined as candidates in which code will be moved from a use site within the source code to a definition site within the source code. Optimization opportunities within the source code are identified based on the code motion.

Abstract: A method is described that comprises receiving from a classfile registration information. The registration information comprises a class name and a different method name for each of the class's methods. Each of the methods are modified with at least one additional byte code instruction to cause, for its respective method, a plug-in module's handler method to provide output function treatment for the respective method. Also, a plug-in pattern is referred to in order to determine which of a plurality of plug-in modules are appropriate for each of the class's methods. The plug-in pattern lists for each of the plug-in modules those of the methods that are to be handled with its corresponding output function treatment.

Abstract: In a method for reducing code size, replaceable subsets of instructions at first locations in areas of infrequently executed instructions in a set of instructions and target subsets of instructions at second locations in the set of instructions are identified, wherein each replaceable subset matches at least one target subset. If multiple target subsets of instructions match one replaceable subset of instructions, one of the multiple matching target subsets is chosen as the matching target subset for the one replaceable subset based on whether the multiple target subsets are located in regions of frequently executed code. For each of at least some of the replaceable subsets of instructions, the replaceable subset of instructions is replaced with an instruction to cause the matching target subset of instructions at the second location to be executed.