Patents Examined by Jung Kim
  • Patent number: 11637551
    Abstract: A multiple operating-mode comparator system can be useful for high bandwidth and low power automated testing. The system can include a gain stage configured to drive a high impedance input of a comparator output stage, wherein the gain stage includes a differential switching stage coupled to an adjustable impedance circuit, and an impedance magnitude characteristic of the adjustable impedance circuit corresponds to a bandwidth characteristic of the gain stage. The comparator output stage can include a buffer circuit coupled to a low impedance comparator output node. The buffer circuit can provide a reference voltage for a switched output signal at the output node in a higher speed mode, and the buffer circuit can provide the switched output signal at the output node in a lower power mode.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: April 25, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Christopher C. McQuilkin, Andrew Nathan Mort
  • Patent number: 11632091
    Abstract: A differential pair for an input stage includes two identical branches in parallel, each branch including a first MOS transistor and a second MOS transistor arranged in series, wherein the first transistor and the second transistor have a channel of the same type, and wherein each of the first transistor and the second transistor has a gate coupled to the same corresponding input of the differential pair and a circuit configured to apply to each of the first transistors a potential difference between a source and a channel-forming region of the first transistor.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: April 18, 2023
    Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Philippe Pignolo, Pawel Fiedorow, Vincent Rabary
  • Patent number: 11630665
    Abstract: A method executes instructions, each corresponding to switching a signal, a delay, and a condition selected among first, second, or third conditions. Each execution includes performing, after the delay, switching the signal if the condition is the first condition, if the condition is the second condition and a flag is in an active state, or if the condition is the third condition and the flag is in an inactive state, or not switching the signal if the condition is the second condition and the flag is in the inactive state, or if the condition is the third condition and the flag is in the active state. A first instruction represents a first switching of a first signal, a first delay, and the second condition, and is immediately followed by a second instruction representing the first switching of the first signal, a second delay, and the third condition.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: April 18, 2023
    Assignee: STMicroelectronics (Grand Ouest) SAS
    Inventor: Lionel Cimaz
  • Patent number: 11627885
    Abstract: There is provided a technique configured to measure blood pressure with high accuracy. A pulse wave is acquired from each of a plurality of regions on a body surface of a subject, at least two regions are selected from among the plurality of regions in accordance with signal quality of the acquired pulse wave of each region, and blood pressure information is calculated with reference to pulse wave propagation information indicating pulse wave propagation between the at least two regions selected.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: April 18, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Rieko Ogawa, Yoshihisa Adachi, Yuki Edo, Ryota Tomizawa
  • Patent number: 11630134
    Abstract: A rapid sensing value estimation circuit and a method thereof are provided. The circuit includes a first sensing unit, an integration sensing circuit and a rapid estimation circuit. The rapid estimation circuit includes a clock generator, a second counter, a first digital comparator, an arithmetic module and a remainder calculation module. The clock generator generates a clock signal with a first frequency. The second counter counts the clock signal within the integration time to generate a second count value. The first digital comparator determines whether the second count value exceeds a first predetermined count value when the first count value increases. The arithmetic module calculates an estimated count value result and a remainder, and the remainder calculation module can further calculate and estimate values of decimal places of this signal based on the remainder.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: April 18, 2023
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventor: Jia-Hua Hong
  • Patent number: 11623105
    Abstract: Methods, apparatus, and systems for medical procedures are disclosed herein and include applying an ablation electrode of a catheter to a surface of a tissue area, providing a first energy to the ablation electrode applied on the surface of the tissue area to ablate the tissue area, inserting a catheter needle of the catheter to a first distance into the tissue area, through the surface of the tissue area, depositing, via the catheter needle, a first radioactive seed at the first distance, and damaging a second portion of the tissue area based on depositing the first radioactive seed at the first distance.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: April 11, 2023
    Assignee: Biosense Webster (Israel) Ltd.
    Inventors: Israel Zilberman, Assaf Govari, Gili Attias
  • Patent number: 11626826
    Abstract: A driver may comprise a first node, a second node, and processing circuitry. The first node is configured to receive a command from controller circuitry. The second node is configured to receive a commutation signal for activating or deactivating a switch. The processing circuitry is configured to determine, based on the received command, an activation setting for an activation characteristic for the switch and a deactivation setting for a deactivation characteristic for the switch and drive the switch based on the commutation signal. To drive the switch, the processing circuitry is configured to change, at a first time, the deactivation characteristic for the switch from a previous deactivation setting to the determined deactivation setting and change, at a second time that is different from the first time, the activation characteristic for the switch from a previous activation setting to the determined activation setting.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: April 11, 2023
    Assignee: Infineon Technologies AG
    Inventors: Jens Barrenscheen, Michael Krug
  • Patent number: 11617529
    Abstract: Apparatus and methods remove a voltage offset from an electrical signal, specifically a biomedical signal. A signal is received at a first operational amplifier and is amplified by a gain. An amplitude of the signal is monitored, by a first pair of diode stages coupled to an output of the first operational amplifier, for the voltage offset. The amplitude of the signal is then attenuated by the first pair of diode stages and a plurality of timing banks. The attenuating includes limiting charging, by the first pair of diode stages, of the plurality of timing banks and setting a time constant based on the charging. The attenuating removes the voltage offset persisting at a threshold for a duration of at least the time constant. Saturation of the signal is limited to a saturation recovery time while the saturated signal is gradually pulled into monitoring range over the saturation recovery time.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: April 4, 2023
    Assignee: BioSig Technologies, Inc.
    Inventors: Budimir S. Drakulic, Sina Fakhar, Thomas G. Foxall, Branislav Vlajinic
  • Patent number: 11621668
    Abstract: Solar array fault detection, classification, and localization using deep neural nets is provided. A fault-identifying neural network uses a cyber-physical system (CPS) approach to fault detection in photovoltaic (PV) arrays. Customized neural network algorithms are deployed in feedforward neural networks for fault detection and identification from monitoring devices that sense data and actuate each individual module in a PV array. This approach improves efficiency by detecting and classifying a wide variety of faults and commonly occurring conditions (e.g., eight faults/conditions concurrently) that affect power output in utility scale PV arrays.
    Type: Grant
    Filed: May 6, 2020
    Date of Patent: April 4, 2023
    Assignee: Arizona Board of Regents on behalf of Arizona State University
    Inventors: Sunil Srinivasa Manjanbail Rao, Andreas Spanias, Cihan Tepedelenlioglu
  • Patent number: 11617530
    Abstract: Apparatus and methods remove a voltage offset from an electrical signal, specifically a biomedical signal. A signal is received at a first operational amplifier and is amplified by a gain. An amplitude of the signal is monitored, by a first pair of diode stages coupled to an output of the first operational amplifier, for the voltage offset. The amplitude of the signal is then attenuated by the first pair of diode stages and a plurality of timing banks. The attenuating includes limiting charging, by the first pair of diode stages, of the plurality of timing banks and setting a time constant based on the charging. The attenuating removes the voltage offset persisting at a threshold for a duration of at least the time constant. Saturation of the signal is limited to a saturation recovery time while the saturated signal is gradually pulled into monitoring range over the saturation recovery time.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: April 4, 2023
    Assignee: BioSig Technologies, Inc.
    Inventors: Budimir S. Drakulic, Sina Fakhar, Thomas G. Foxall, Branislav Vlajinic
  • Patent number: 11616498
    Abstract: A system comprises pulse program compiler circuitry operable to analyze a pulse program that includes a pulse operation statement, and to generate, based on the pulse program, machine code that, if loaded into a pulse generation and measurement circuit, configures the pulse generation and measurement circuit to generate one or more pulses and/or process one or more received pulses. The pulse operation statement may specify a first pulse to be generated, and a target of the first pulse. The pulse operation statement may specify parameters to be used for processing of a return signal resulting from transmission of the first pulse. The pulse operation statement may specify an expression to be used for processing of the first pulse by the pulse generation and measurement circuit before the pulse generation and measurement circuit sends the first pulse to the target.
    Type: Grant
    Filed: January 14, 2022
    Date of Patent: March 28, 2023
    Inventors: Yonatan Cohen, Nissim Ofek, Itamar Sivan, Tal Shani
  • Patent number: 11612334
    Abstract: A system and method measures impedance across a plurality of electrodes and assesses proximity or contact between electrodes of a medical device and patient tissue. Contact is assessed between individual electrodes and cardiac tissue using bipolar electrode complex impedance measurements. Initially, baseline impedance values are established for each of the individual electrodes based on the responses of the electrodes to the applied drive signals. After establishing the baseline impedance values a series of subsequent impedance values are measured for each electrode. For each electrode, each subsequent impedance value may be compared to a previous baseline impedance value for that electrode. If a subsequent impedance value is less than the baseline impedance value for a given electrode, the baseline impedance value may be reset to the subsequent impedance value. Such systems and method are particularly applicable to medical devices having numerous electrodes.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: March 28, 2023
    Assignee: ST. JUDE MEDICAL, CARDIOLOGY DIVISION, INC.
    Inventors: Artem Mosesov, Timothy G. Curran
  • Patent number: 11612335
    Abstract: A system and method measures impedance across a plurality of electrodes and assesses proximity or contact between electrodes of a medical device and patient tissue. Contact is assessed between individual electrodes and cardiac tissue using bipolar electrode complex impedance measurements. Initially, baseline impedance values are established for each of the individual electrodes based on the responses of the electrodes to the applied drive signals. After establishing the baseline impedance values a series of subsequent impedance values are measured for each electrode. For each electrode, each subsequent impedance value may be compared to a previous baseline impedance value for that electrode. If a subsequent impedance value is less than the baseline impedance value for a given electrode, the baseline impedance value may be reset to the subsequent impedance value. Such systems and method are particularly applicable to medical devices having numerous electrodes.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: March 28, 2023
    Assignee: ST. JUDE MEDICAL, CARDIOLOGY DIVISION, INC.
    Inventors: Artem Mosesov, Timothy G. Curran
  • Patent number: 11616497
    Abstract: A system comprises pulse program compiler circuitry operable to analyze a pulse program that includes a pulse operation statement, and to generate, based on the pulse program, machine code that, if loaded into a pulse generation and measurement circuit, configures the pulse generation and measurement circuit to generate one or more pulses and/or process one or more received pulses. The pulse operation statement may specify a first pulse to be generated, and a target of the first pulse. The pulse operation statement may specify parameters to be used for processing of a return signal resulting from transmission of the first pulse. The pulse operation statement may specify an expression to be used for processing of the first pulse by the pulse generation and measurement circuit before the pulse generation and measurement circuit sends the first pulse to the target.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: March 28, 2023
    Assignee: Quantum Machines
    Inventors: Yonatan Cohen, Nissim Ofek, Itamar Sivan, Tal Shani
  • Patent number: 11609590
    Abstract: A power supply device may include a connector configured to electrically couple the power supply device to a conductor of the underground power lines; a voltage divider configured to receive an input voltage from the conductor, the voltage divider comprising a capacitor and divider voltage control electronics in series with the capacitor; and, a surge resistor in series with the capacitor and configured to provide impulse protection from surge events. The divider voltage control electronics may be configured to regulate an output voltage of the voltage divider to support variable loads on the voltage divider.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: March 21, 2023
    Assignee: SENTIENT TECHNOLOGY HOLDINGS, LLC
    Inventor: Dennis Allen Saxby
  • Patent number: 11606083
    Abstract: A PWM signal generator circuit includes a multiphase clock generator that generates a number n of phase-shifted clock phases having the same clock period and being phase shifted by a time corresponding to a fraction 1/n of the clock period. The PWM signal generator circuit determines for each switch-on duration first and second integer numbers, and for each switch-off duration third and fourth integer numbers. The first integer number is indicative of the integer number of clock periods of the switch-on duration and the second integer number is indicative of the integer number of the additional fractions 1/n of the clock period of the switch-on duration. The third integer number is indicative of the integer number of clock periods of the switch-off duration, and the fourth integer number is indicative of the integer number of the additional fractions 1/n of the clock period of the switch-off duration.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: March 14, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Domenico Tripodi, Luca Giussani, Simone Ludwig Dalla Stella
  • Patent number: 11596337
    Abstract: Methods and systems for conditioning a signal indicative of electrosurgical unit activity are described. A hardware circuit acquires AC current from an electrosurgical unit on patient isolated circuitry and conditions the signal in either of two alternate processing methods. The processed signal is routed as input to an analog to digital converter circuit. A method for determining saturation on referential inputs and recovering inputs to an unsaturated state is also described.
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: March 7, 2023
    Inventors: Ivan Amaya, Michael Batdorf, Ross Delvin, Jason McCann, John A. Cadwell, Ethan Rhodes, Richard A. Villarreal
  • Patent number: 11598802
    Abstract: A circuit includes a gain stage, first and second amplifiers, and a comparison circuit. The gain stage has an input and an output. The first amplifier has an input and an output. The input of the first amplifier is coupled to the input of the gain stage. The second amplifier has an input and an output. The input of the second amplifier is coupled to the output of the gain stage. The comparison circuit is coupled to the outputs of the first and second amplifiers. The comparison circuit is configured to compare signals on the outputs of the first and second amplifiers and to generate a fault flag signal responsive to the output signal from the first amplifier being different than the output signal from the second amplifier.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: March 7, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Kemal Safak Demirci, Shanmuganand Chellamuthu, Qunying Li
  • Patent number: 11601126
    Abstract: Methods and devices to address body leakage current generation and bias voltage distribution associated with body leakage current in an OFF state of a FET switch stack are disclosed. The devices include charge redistribution arrangements and bridge networks to perform coupling/decoupling to/from the FET switch stack. Detailed structures of such bridge networks are also described.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: March 7, 2023
    Assignee: PSEMI CORPORATION
    Inventor: Simon Edward Willard
  • Patent number: 11595035
    Abstract: A method is provided for driving a half bridge circuit that includes a first transistor and a second transistor that are switched in a complementary manner. The method includes generating an off-current during a plurality of turn-off switching events to control a gate voltage of the second transistor; measuring a transistor parameter of the second transistor during a first turn-off switching event during which the second transistor is transitioned to an off state, wherein the transistor parameter is indicative of an oscillation at the first transistor during a corresponding turn-on switching event during which the first transistor is transitioned to an on state; and activating a portion of the off-current for the second turn-off switching event, including regulating an interval length of the second portion for the second turn-off switching event based on the measured transistor parameter measured during the first turn-off switching event.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: February 28, 2023
    Assignee: Infineon Technologies AG
    Inventors: Zheming Li, Mark-Matthias Bakran, Daniel Domes, Robert Maier, Franz-Josef Niedernostheide