Abstract: A method for preparing a VCSEL can use MBE for: growing a first conduction region over a first mirror region; growing an active region over the first conduction region opposite of the first mirror region, including: (a) growing a quantum well barrier having In1-xGaxP(As); (b) growing an transitional layer having one or more of GaP, GaAsP, or GaAs; (c) growing a quantum well layer having In1-zGazAsyP1-y; (d) growing another transitional layer have one or more of GaP, GaAsP, or GaAs; (e) repeating processes (a) through (d) over a plurality of cycles; and (f) growing a quantum well barrier having In1-xGaxP(As); growing a second conduction region over the active region opposite of the first conduction region, wherein: x ranges from 0.77 to 0.50; y ranges from 0.7 to 1; and z ranges from 0.7 to 0.99.

Abstract: A manufacturing method for an encapsulated micromechanical component has the following steps: creating an intermediate substrate having a plurality of perforations; laminating an encapsulation substrate onto a front side of the intermediate substrate, which closes the perforations on the front side; laminating an MEMS functional wafer onto a rear side of the intermediate substrate; the MEMS functional wafer being aligned with the intermediate substrate in such a way that the perforations form cavities over the corresponding functional areas of the MEMS functional wafer.

Abstract: A semiconductor device includes a semiconductor substrate and a semiconductor mass element configured to move in response to an applied acceleration. The mass element is defined by trenches etched into the semiconductor substrate and a cavity below the mass element. The semiconductor device includes a sensing element configured to sense movement of the mass element and a complementary metal-oxide-semiconductor (CMOS) circuit formed on the substrate.

Abstract: A method for fabricating a micro electromechanical device includes providing a first substrate including control circuitry. The first substrate has a top surface and a bottom surface. The method also includes forming an insulating layer on the top surface of the first substrate, removing a first portion of the insulating layer so as to form a plurality of standoff structures, and bonding a second substrate to the first substrate. The method further includes thinning the second substrate to a predetermined thickness and forming a plurality of trenches in the second substrate. Each of the plurality of trenches extends to the top surface of the first substrate. Moreover, the method includes filling at least a portion of each of the plurality of trenches with a conductive material, forming the micro electromechanical device in the second substrate, and bonding a third substrate to the second substrate.

Abstract: According to one embodiment, a MEMS includes a first electrode, a first auxiliary structure and a second electrode. The first electrode is provided on a substrate. The first auxiliary structure is provided on the substrate and adjacent to the first electrode. The first auxiliary structure is in an electrically floating state.

Abstract: A method of a general biological approach to synthesizing compact nanotubes using a biological template is described.

Abstract: Some embodiments include methods for fabricating memory cell constructions. A memory cell may be formed to have a programmable material directly against a material having a different coefficient of expansion than the programmable material. A retaining shell may be formed adjacent the programmable material. The memory cell may be thermally processed to increase a temperature of the memory cell to at least about 300° C., causing thermally-induced stress within the memory cell. The retaining shell may provide a stress which substantially balances the thermally-induced stress. Some embodiments include memory cell constructions. The constructions may include programmable material directly against silicon nitride that has an internal stress of less than or equal to about 200 megapascals. The constructions may also include a retaining shell silicon nitride that has an internal stress of at least about 500 megapascals.

Abstract: There is provided a solid-state imaging device including a semiconductor substrate having an effective region in which a photodiode performing a photoelectric conversion is formed and, an optical black region shielded by a light shielding film; a first film which is formed on the effective region and in which at least one layer or more of layers having a negative fixed charge are laminated; and a second film which is formed on the light shielding region and in which at least one layer or more of layers having a negative fixed charge are laminated, in which the number of layers formed in the first film is different from the number of layers formed in the second film.

Abstract: Quantitative understanding of neural and biological activity at a sub-millimeter scale requires an integrated probe platform that combines biomarker sensors together with electrical stimulus/recording sites. Optically addressed biomarker sensors within such an integrated probe platform allows remote interrogation from the activity being measured. Monolithic or hybrid integrated silicon probe platforms would beneficially allow for accurate control of neural prosthetics, brain machine interfaces, etc as well as helping with complex brain diseases and disorders. According to the invention a silicon probe platform is provided employing ultra-thin silicon in conjunction with optical waveguides, optoelectronic interfaces, porous filter elements, and integrated CMOS circuitry. Such probes allowing simultaneously analysis of both neural electrical activities along with chemical activity derived from multiple biomolecular sensors with porous membrane filters.

Abstract: A biochemical sensor and a method of manufacturing the same are disclosed. The biochemical sensor includes a substrate, a gate arranged on one side of the substrate, a gate insulating layer arranged on one side of the gate opposite to the substrate, an active layer arranged on one side of the gate insulating layer opposite to the gate, a source and a drain arranged on one side of the active layer opposite to the gate insulating layer, and a biochemical sensing layer arranged on one side of the active layer opposite to the gate insulating layer and between the source and the drain.

Abstract: A thin-film semiconductor component includes a carrier and a semiconductor body with a semiconductor layer sequence including an active region provided to generate radiation. The semiconductor body is externally electrically contactable by a first contact and a second contact. The carrier includes a protection diode structure connected electrically in parallel to the semiconductor body. The protection diode structure includes a first diode and a second diode. The first diode and the second diode are electrically connected in series in mutually opposing directions with regard to their forward direction.

Abstract: A MEMS sensor includes a substrate and a MEMS structure coupled to the substrate. The MEMS structure has a mass movable with respect to the substrate. The MEMS sensor also includes a reference structure electrically coupled to the mass of the MEMS sensor. The reference structure is used to provide a reference to offset any environmental changes that may affect the MEMS sensor in order to increase the accuracy of its measurement.

Abstract: A wafer having a plurality of dies (also called array chips) on the wafer, the die having an electrode to generate a deprotecting reagent, a working electrode to electrochemically synthesize a material, a confinement electrode adjacent to the working electrode to confine reactive reagents, and a die pad, wherein die pads of the plurality of dies are interconnected on the wafer to electrochemically synthesize the material in parallel on a plurality of working electrodes is disclosed. Also, a method for wafer-scale manufacturing of a plurality of dies and a method for electrochemically synthesizing a material in parallel on a plurality of dies on a wafer are disclosed.

Abstract: A method for preparing a multilayer of nanocrystals. The method includes the steps of (i) coating nanocrystals surface-coordinated by a photosensitive compound, or a mixed solution of a photosensitive compound and nanocrystals surface-coordinated by a material miscible with the photosensitive compound, on a substrate, drying the coated substrate, and exposing the dried substrate to UV light to form a first monolayer of nanocrystals, and (ii) repeating the procedure of step (i) to form one or more monolayers of nanocrystals on the first monolayer of nanocrystals. Further, an organic-inorganic hybrid electroluminescence device using a multilayer of nanocrystals prepared by the method as a luminescent layer.

Abstract: According to one embodiment, a manufacturing method of semiconductor device includes forming plural elements on a substrate, forming a silicon compound film so as to bury between a plurality of elements, and modifying the silicon compound film to a silicon dioxide film by radiating microwaves.

Abstract: A MEMS IR sensor, with a cavity in a substrate underlapping an overlying layer and a temperature sensing component disposed in the overlying layer over the cavity, may be formed by forming an IR-absorbing sealing layer on the overlying layer so as to cover access holes to the cavity. The sealing layer is may include a photosensitive material, and the sealing layer may be patterned using a photolithographic process to form an IR-absorbing seal. Alternately, the sealing layer may be patterned using a mask and etch process to form the IR-absorbing seal.

Abstract: A MEMS device having a device cavity in a substrate has a cavity etch monitor proximate to the device cavity. An overlying layer including dielectric material is formed over the substrate. A monitor scale is formed in or on the overlying layer. Access holes are etched through the overlying layer and a cavity etch process forms the device cavity and a monitor cavity. The monitor scale is located over a lateral edge of the monitor cavity. The cavity etch monitor includes the monitor scale and monitor cavity, which allows visual measurement of a lateral width of the monitor cavity; the lateral dimensions of the monitor cavity being related to lateral dimensions of the device cavity.

Abstract: In one embodiment, a system comprises a semiconductor gamma detector material and a hole blocking layer adjacent the gamma detector material, the hole blocking layer resisting passage of holes therethrough. In another embodiment, a system comprises a semiconductor gamma detector material, and an electron blocking layer adjacent the gamma detector material, the electron blocking layer resisting passage of electrons therethrough, wherein the electron blocking layer comprises undoped HgCdTe. In another embodiment, a method comprises forming a hole blocking layer adjacent a semiconductor gamma detector material, the hole blocking layer resisting passage of holes therethrough. Additional systems and methods are also presented.

Abstract: A semiconductor device includes a stacked body with a recessed gas passage formed therein, a heater disposed in the stacked body, the heater being exposed on a bottom surface of the gas passage, and a plurality of thermal sensors disposed in the stacked body in such a manner that the plurality of thermal sensors sandwich the heater therebetween in an extending direction of the gas passage, the plurality of thermal sensors being exposed on the bottom surface of the gas passage. An acceleration sensor having a high affinity to the ordinary semiconductor manufacturing process can be provided.

Abstract: A multi-chip module (MCM) is described. This MCM includes at least two substrates that are remateably mechanically coupled by positive and negative features on facing surfaces of the substrates. These positive and negative features mate with each other. In particular, a positive feature may mate with a given pair of negative features, which includes negative features on each of the substrates. Furthermore, at least one of the negative features in the given pair may include a hard magnetic material, and the positive feature and the other negative feature in the given pair may include a soft magnetic material that provide a flux-return path to the hard magnetic material. In this way, the hard magnetic material may facilitate the remateable mechanical coupling of the substrates.

Abstract: Provided is a process for producing a liquid ejection head including an ejection orifice member having a plurality of ejection orifices for ejecting liquid provided along an arrangement direction, the process including preparing a substrate provided with a resin layer which contains a photocurable resin;carrying out a first exposure treatment and a second exposure treatment which are each of an exposure treatment of subjecting the resin layer to exposure; and forming the ejection orifices of the resin layer subjected to the first exposure treatment and the second exposure treatment. An inclination angle of a side wall of the ejection orifices formed by the first exposure treatment with respect to the substrate differs from an inclination angle of a side wall of the ejection orifices formed by the second exposure treatment with respect to the substrate.

Abstract: A STTMRAM element includes a magnetization layer made of a first free layer and a second free layer, separated by a non-magnetic separation layer (NMSL), with the first and second free layers each having in-plane magnetizations that act on each other through anti-parallel coupling. The direction of the magnetization of the first and second free layers each is in-plane prior to the application of electrical current to the STTMRAM element and thereafter, the direction of magnetization of the second free layer becomes substantially titled out-of-plane and the direction of magnetization of the first free layer switches. Upon electrical current being discontinued to the STTMRAM element, the direction of magnetization of the second free layer remains in a direction that is substantially opposite to that of the first free layer.

Abstract: A magnetic tunnel junction includes a first magnetic layer, a tunnel insulating layer and a second magnetic layer. The first magnetic layer is formed on a substrate. The tunnel insulating layer is formed on the first magnetic layer. The second magnetic layer is formed on the tunnel insulating layer, where the second magnetic layer is shaped to be narrower at a center than at ends.

Abstract: A mechanical quantity sensor includes a first structure having a fixed portion with an opening, a displaceable portion arranged in the opening and displaceable relative to the fixed portion, and a connection portion connecting the fixed portion and the displaceable portion, a second structure having a weight portion joined to the displaceable portion and a pedestal joined to the fixed portion, and arranged and stacked on the first structure, and a base having a driving electrode and a detection electrode arranged on a face facing the weight portion, connected to the pedestal, and arranged and stacked on the second structure. The second structure has a recessed portion arranged in an area on a face of the weight portion facing the second base, the area corresponding to an area where the driving electrode and the detection electrode are not arranged.

Abstract: Disclosed is an integrated circuit comprising a substrate (10) carrying a plurality of circuit elements; a metallization stack (12, 14, 16) interconnecting said circuit elements, said metallization stack comprising a patterned upper metallization layer comprising a first metal portion (20); a passivation stack (24, 26, 28) covering the metallization stack; and a sensor including a sensing material (40) on the passivation stack, said sensor being coupled to the first metal portion by a via (34) extending through the passivation stack. A method of manufacturing such an IC is also disclosed.

Abstract: Provided is a substrate holder pair comprising a first substrate holder that has a first holding portion holding a first substrate; a second substrate holder that has a second holding portion holding a second substrate to be bonded with the first substrate and that, together with the first substrate holder, sandwiches the first substrate and the second substrate; an engaging member that causes the first substrate holder to engage with the second substrate holder; and a dust inhibiting section inhibits dust generated by the engaging of the engaging member from entering between the first holding portion and the second holding portion.

Abstract: Embodiments relate to MEMS devices, particularly MEMS devices integrated with related electrical devices on a single wafer. Embodiments utilize a modular process flow concept as part of a MEMS-first approach, enabling use of a novel cavity sealing process. The impact and potential detrimental effects on the electrical devices by the MEMS processing are thereby reduced or eliminated. At the same time, a highly flexible solution is provided that enables implementation of a variety of measurement principles, including capacitive and piezoresistive. A variety of sensor applications can therefore be addressed with improved performance and quality while remaining cost-effective.

Abstract: There is provided a plasma processing apparatus capable of optimizing a plasma process in response to various requirements of a micro processing by effectively controlling a RF bias function. In this plasma processing apparatus, a high frequency power RFH suitable for generating plasma of a capacitively coupling type is applied to an upper electrode 48 (or lower electrode 16) from a third high frequency power supply 66, and two high frequency powers RFL1 (0.8 MHz) and RFL2 (13 MHz) suitable for attracting ions are applied to the susceptor 16 from first and second high frequency power supplies 36 and 38, respectively, in order to control energy of ions incident onto a semiconductor wafer W from the plasma. A control unit 88 controls a total power and a power ratio of the first and second high frequency powers RFL1 and RFL2 depending on specifications, conditions or recipes of an etching process.

Abstract: Metal nanoplates are grown on n-type and p-type semiconductor wafer substrates through galvanic reactions between substantially pure aqueous metal solutions and the substrates. The morphology of the resulting metal nanoplates that protrude from the substrate can be tuned by controlling the concentration of the metal solution and the reaction time of the solution with the semiconductor wafer. Nanoplate size gradually increases with prolonged growth time and the nanoplate thicknesses increases in a unique stepwise fashion due to polymerization and fusion of adjacent nanoplates. Further, the roughness of the nanoplates can also be controlled. In a particular embodiment, Ag nanoplates are grown on a GaAs substrate through reaction with a solution of AgNO3 with the substrate.

Abstract: A pressure sensor 1 comprises a semiconductor substrate 10, insulating layers 21, 22, 23 formed on the semiconductor substrate 10, a semiconductor layer 30 formed on the semiconductor substrate 10 with the insulating layers 21, 23 intervening therebetween, and a cavity portion 13 provided between the semiconductor substrate 10 and the semiconductor layer 30. The portion of the semiconductor layer 30 which overlaps the cavity portion 13 as viewed in a lamination direction serves as a movable portion 31. The cavity portion 13 is surrounded by the insulating layers 22, 23. With this arrangement, the pressure sensor 1 can be manufactured easily with high precision.

Abstract: Disclosed is a method of manufacturing an electromechanical transducer layer on a surface of a substrate, including discharging a solution including a source material to form the electromechanical transducer layer from a nozzle of a nozzle plate to coat the solution on the surface of the substrate while applying voltage between the nozzle plate and the substrate to charge the nozzle plate at a first polarity and the substrate at a second polarity opposite to the first polarity such that a split droplet split from a main droplet which is coated on the surface of the substrate becomes charged at the second polarity and is attracted and collected by the nozzle plate; and applying a heat treatment to the substrate on which the solution is coated to crystallize the solution to form the electromechanical transducer layer.

Abstract: Methods and apparatus for shielding a shielding a non-volatile memory, such as shielding a magnetic tunnel junction (MTJ) device from a magnetic flux are provided. In an example, a shielding layer is formed adjacent to an electrode of an MTJ device, such that the shielding layer substantially surrounds a surface of the electrode, and a metal line is coupled to the shielding layer. The metal line can be coupled to the shielding layer by a via.

Abstract: A nonvolatile memory device includes via holes (12) formed at cross sections where first wires (11) cross second wires (14), respectively, and current control elements (13) each including a current control layer (13b), a first electrode layer (13a) and a second electrode layer (13c) such that the current control layer (13b) is sandwiched between the first electrode layer (13a) and the second electrode layer (13c), in which resistance variable elements (15) are provided inside the via holes (12), respectively, the first electrode layer (13a) is disposed so as to cover the via hole (12), the current control layer (13b) is disposed so as to cover the first electrode layer (13a), the second electrode layer (13c) is disposed on the current control layer (13b), a wire layer (14a) of the second wire is disposed on the second electrode layer (13c), and the second wires (14) each includes the current control layer (13b), the second electrode layer (13c) and the wire layer (14a) of the second wire.

Abstract: A mechanical quantity sensor includes a first structure having a fixed portion with an opening, a displaceable portion arranged in the opening and displaceable relative to the fixed portion, and a connection portion connecting the fixed portion and the displaceable portion, a second structure having a weight portion joined to the displaceable portion and a pedestal joined to the fixed portion, and arranged and stacked on the first structure, and a base having a driving electrode and a detection electrode arranged on a face facing the weight portion, connected to the pedestal, and arranged and stacked on the second structure. The second structure has a projection arranged in an area on a face of the weight portion facing the base, the area corresponding to an area where the driving electrode and the detection electrode are not arranged, the projection having a thickness larger than thicknesses of the driving electrode and the detection electrode.

Abstract: An array substrate includes a base substrate, a gate line, a gate insulation layer, a data line, a thin-film transistor (“TFT”) and a pixel electrode. The gate line includes a gate covering line formed in a first direction on the base substrate and a gate main line protruded from the gate covering line. The gate insulation layer is formed on the base substrate to cover the gate line. The data line is formed on the gate insulation layer in a second direction crossing the first direction. The TFT is electrically connected to the gate line and the data line. The pixel electrode is electrically connected to the TFT. Therefore, a gate line is thicker than a gate covering line and a gate main line having a low resistance is further formed, so that a gate signal may be quickly transferred along the gate line without a signal delay.

Abstract: In an embodiment, a phase shifting device may be provided. The phase shifting device may include a supporting layer and a semiconducting layer disposed above the supporting layer. The semiconducting layer may include a first doped region doped with doping atoms of a first conductivity type and arranged on the supporting layer; and a second doped region doped with doping atoms of a second conductivity type being different from the first conductivity type; wherein the second doped region may be disposed over the first doped region such that a first doped regions junction may be formed in a direction substantially parallel to a surface of the supporting layer and a second doped regions junction may be formed in a direction substantially perpendicular to the surface of the supporting layer. A method of forming a phase shifting device and an electro-optic device may also be provided.

Abstract: The present invention relates to process for recycling a source substrate that has a surface region and regions in relief on the surface region, with the regions in relief corresponding to residual regions of a layer of the source substrate that were not being separated from the rest of the source substrate during a prior removal step. The process includes selective electromagnetic irradiation of the source substrate at a wavelength such that the damaged material of the surface region absorbs the electromagnetic irradiation. The present invention also relates to a recycled source substrate and to a process for transferring a layer from a source substrate recycled for this purpose.

Abstract: Methods of forming diode structures for use in memory cells and memory arrays, such as resistive random access memory (RRAM). The methods include forming a first electrode by chemisorbing a graphite material (e.g., graphene) on a conductive material. A low-k dielectric material may be formed over surfaces of the first electrode exposed through an opening in a dielectric material overlying the first electrode, followed by formation of a high-k dielectric material over the low-k dielectric material. A remaining portion of the opening may be filled with another conductive material to form a second electrode. The first and second electrodes of the resulting diode structure have different work functions and, thus, provide a low thermal budget, a low contact resistance, a high forward-bias current and a low reverse-bias current. A memory cell and a memory array including such a diode structure are also disclosed.

Abstract: Disclosed are an MEMS type semiconductor gas sensor using a microheater having many holes and a method for manufacturing the same. The MEMS type semiconductor gas sensor includes: a substrate of which a central region is etched with a predetermined thickness; a second membrane formed at an upper portion of the central region of the substrate and having many holes; a heat emitting resistor formed on the second membrane and having many holes; a first membrane formed on the second membrane including the heat emitting resistor and having many holes; a sensing electrode formed on the first membrane and having many holes; and a sensing material formed on the sensing electrode.

Abstract: Efficient cleaning is possible although the film qualities and thicknesses of a reaction tube and a gas supply nozzle are different. There is provided a method of manufacturing a semiconductor device. The method includes forming a film on a substrate, performing a first cleaning process to remove a first deposition substance attached to an inner wall of a gas introducing part, and performing a second cleaning process to remove a second deposition substance attached to an inside of a process chamber and having a chemical composition different from that of the first deposition substance. In the first cleaning process, cleaning conditions are set according to the accumulated supply time of a first source gas supplied to the inside of the process chamber through the gas introducing part, and in the second cleaning process, cleaning conditions are set according to the accumulated thickness of a film formed on the substrate.

Abstract: A magnetic sensor includes a plurality of groups, each group comprising a plurality of magnetic tunnel junction (MTJ) devices having a plurality of conductors configured to couple the MTJ devices within one group in parallel and the groups in series enabling independent optimization of the material resistance area (RA) of the MTJ and setting total device resistance so that the total bridge resistance is not so high that Johnson noise becomes a signal limiting concern, and yet not so low that CMOS elements may diminish the read signal. Alternatively, the magnetic tunnel junction devices within each of at least two groups in series and the at least two groups in parallel resulting in the individual configuration of the electrical connection path and the magnetic reference direction of the reference layer, leading to independent optimization of both functions, and more freedom in device design and layout.

Abstract: A stress sensor is disclosed herein. The stress sensor includes a plurality of carbon nanotubes in a substrate, and first and second contacts electrically connectable with the plurality of carbon nanotubes. Methods of making and using the stress sensor are also disclosed.

Abstract: A radio frequency microelectromechanical (RF MEMS) device can comprise an actuation p-n junction and a sensing p-n junction formed within a semiconductor substrate. The RF MEMS device can be configured to operate in a mode in which an excitation voltage is applied across the actuation p-n junction varying a non-mobile charge within the actuation p-n junction to modulate an electric field acting upon dopant ions and creating electrostatic forces. The electrostatic forces can create a mechanical motion within the actuation p-n junction. The mechanical motion can modulate a depletion capacitance of the sensing p-n junction, thereby creating a motional current. At least one of the p-n junctions can be located at an optimal location to maximize the efficiency of the RF MEMS device at high resonant frequencies.

Abstract: A magnetoresistive device includes a carrier, an xMR-sensor, a magnetic layer formed above an active xMR-region of the xMR-sensor and an insulating layer arranged between the xMR-sensor and the magnetic layer.

Abstract: Systems and methods for manufacturing a chip comprising a plurality of MEMS devices arranged in an integrated circuit are provided. In one aspect, the systems and methods provide for a chip including electronic elements formed on a semiconductor material substrate. The chip further includes a stack of interconnection layers including layers of conductor material separated by layers of dielectric material. MEMS devices are formed within the stack of interconnection layers by applying gaseous HF to a first layer of dielectric material positioned highest in the stack of interconnection layers. The stack of interconnection layers includes at least one unetched layer of dielectric material, and at least one layer of conductor material for routing connections to and from the electronic elements.

Abstract: Such a device is disclosed that includes: redundancy circuits for replacing defective memory cells included in a memory cell array; an electrical fuse circuit that stores addresses of the defective memory cells; a data determination circuit that generates a determination signal by determining whether test data read from the memory cell array is correct or incorrect; and an analysis circuit that supplies, in a first operation mode, the electrical fuse circuit with an address signal supplied when the determination signal is activated, and supplies, in a second operation mode, the electrical fuse circuit with an address signal supplied when a data mask signal supplied from outside is activated irrespective of the determination signal.

Abstract: Provided herein are a gas sensor element in which deformation of a sensitive portion due to stress may be reduced and a method of manufacturing the gas sensor element. A base insulating layer 9 including a heater wiring pattern 19 is formed on a front surface 3A of a support 3. The base insulating layer 9 includes a fixed portion 15 fixed to the front surface 3A of the support 3, and a nonfixed portion 17 located over an opening portion 5. A cavity portion 7 having the opening portion 5 is formed in the support 3. An electrode wiring pattern 27 and a sensitive film 31 are formed over a central portion 21 of the nonfixed portion 17 of the base insulating layer 9. The nonfixed portion 17 includes the central portion 21 and a plurality of connecting portions 23 connecting the central portion 21 and the fixed portion 15. Four connecting portions 23 each include a base portion 33 and an extended portion 35.

Abstract: When letters are written with a ballpoint pen, pen pressure is greater than or equal to 10 MPa. The IC tag embedded in the paper base material is required to withstand such pen pressure. An integrated circuit including a functional circuit which transmits and receive, performs arithmetic of, and stores information is thinned, and also, when the integrated circuit and a structural body provided with an antenna or a wiring are attached, a second structural body formed of ceramics or the like is also attached to at the same time. When the second structural body formed of ceramics or the like is used, resistance to pressing pressure or bending stress applied externally can be realized. Further, a part of passive elements included in the integrated circuit can be transferred to the second structural body, which leads to reduction in area of the semiconductor device.

Abstract: A semiconductor device includes a photodiode formed using a silicon substrate, a wide-bandgap semiconductor layer formed on the silicon substrate and having a bandgap larger than that of silicon, and a switching element formed using the wide-bandgap semiconductor layer. The switching element is electrically connected to the photodiode so as to be on/off-controlled by a control signal from the photodiode.

Abstract: According to one embodiment, there is disclosed a magnetic random access memory comprising: a semiconductor substrate; a selective transistor formed at the surface region of the semiconductor substrate and having a gate electrode, a gate insulating film, a source and a drain; and a magnetoresistive element formed on the drain including a magnetic storage layer in which a magnetization direction is variable, a magnetic reference layer in which a magnetization direction is fixed, and a nonmagnetic layer sandwiched between the magnetic storage layer and the magnetic reference layer.