Abstract: Provided are a constant voltage circuit configured to, when a power supply voltage is low, detect a leakage current to output a stable voltage at a power supply voltage level, and a crystal oscillation circuit using the constant voltage circuit. The constant voltage circuit includes a leakage current detection circuit including a PMOS transistor for monitoring a leakage current, which has a gate and a source being grounded. When a leakage current is detected, even with a constant voltage power supply, a voltage sufficient for turning on an output transistor of the constant voltage circuit can be applied to a gate of the output transistor.

Abstract: A semiconductor device includes a first die, a second die coupled to the first die through a Through-Silicon-Via (TSV), and a test circuit suitable for measuring a resistance of the TSV by controlling an amount of current flowing through the TSV.

Abstract: Bandgap Voltage Reference circuits configured to produce reference voltages with both voltage offset and a voltage temperature slope are disclosed. By generating the voltage offset from a temperature-independent current, the voltage offset of the reference voltage may be temperature-independent, while generating the voltage temperature slope from a temperature-dependent current allows the voltage temperature slope to vary with temperature. To ensure that the voltage offset remains independent from the voltage temperature slope, an apparatus is disclosed for orthogonal trimming of voltage offset and voltage temperature slope.

Abstract: Measurement circuits which are configured to measure wide ranges of the input voltage using a sensed input voltage of the driver circuits for solid state lighting (SSL) devices are presented. The measurement circuit comprises a first resistor which is coupled at a first side to the input voltage. The measurement circuit comprises current mirror circuitry coupled at an input to a second side of the first resistor, and which translates an input current at the input of the current mirror circuitry into an output current at an output of the current mirror circuitry, such that the output current is proportional to the input current by a current mirror ratio. The measurement circuit comprises a second resistor coupled to the output of the current mirror circuitry and to provide the sensed input voltage, when the input voltage is coupled to the first side of the first resistor.

Abstract: A current mirror circuit includes: a reference current circuit including a reference transistor and a constant current source coupled between a high potential source and a low potential source; a first proportional current circuit, including a first transistor that forms a first current mirror circuit with the reference transistor, to generate a first current having a first ratio to a reference current of the reference current circuit; a second proportional current circuit, including a second transistor that forms a second current mirror circuit with the reference transistor, to generate a second current having a second ratio to the reference current; a comparison circuit to output a difference between a drain voltage of the first transistor and a drain voltage of the second transistor; and a current adjustment transistor coupled to a drain of the second transistor and including a gate to which an output of the comparison circuit is applied.

Abstract: A low-power bandgap reference voltage generator using a leakage current may include: a medium voltage generation unit configured to generate a medium voltage based on the absolute temperature, using a leakage current; a low power amplifier configured to amplify the medium voltage and outputting an operational amplification voltage; and a reference voltage output unit configured to output a reference voltage based on the operational amplification voltage at a target level.

Abstract: A start-up circuit for a reference circuit such as a bandgap reference circuit. The start-up circuit includes a diode-connected metal-oxide-semiconductor (MOS) transistor connected between a power supply node and a start-up node that is connected in turn to the gate of a current control MOS transistor in the reference circuit. The diode-connected MOS transistor and the current control MOS transistor are matched with one another. To start up the reference circuit, current is conducted through the diode-connected MOS transistor to set the gate voltage of the current control transistor at a threshold voltage below the power supply voltage. Current conducted by the current control transistor initiates operation of the bandgap reference circuit, and disables the start-up circuit.

Abstract: An electrical circuit arranged in a half bridge topology. The electrical circuit includes a high side transistor; a low side transistor; a gate driver and level shifter electrically coupled to a gate of the high side transistor; a gate driver electrically coupled to a gate of the low side transistor; a capacitor electrically coupled in parallel with the gate driver and level shifter; a voltage source electrically coupled to an input of the gate driver and level shifter and an input of the gate driver; and, a bootstrap transistor electrically coupled between the voltage source and the capacitor. A GaN field-effect transistor is synchronously switched with a low side device of the half bridge circuit.

Abstract: Methods and apparatuses for applying different voltages to an I/O interface (such as to the pads of the I/O interface) and determining the data integrity of communicating data (either transmitting to or receiving data from) to another device is disclosed. Data integrity may be measured in one of several ways, such as the window (or timing) at which data can be transmitted correctly using the different voltages. The determined data integrity may be compared with a minimum data integrity, such as a minimum window. In the event that the determined data integrity is greater or better than the minimum data integrity, then the voltage may be reduced and the data integrity determination may be performed again. In this way, the voltage applied to the I/O interface may be reduced while still meeting the minimum data integrity requirements.

Abstract: The present disclosure describes apparatuses and techniques of fast transient response for switching power regulators. In some aspects, a detection is made of a switching regulator's transition to a continuous mode of operation to provide current to a load. In response to the transition, a predefined current limit of the switching regulator's current-limit circuitry is increased effective to enable the switching regulator to draw an amount of input current that exceeds the predefined current limit. The switching regulator is then permitted to operate with the increased current limit for a predetermined number of cycles, which can be effective to enable the switching regulator to provide the current to the load more quickly.

Abstract: Voltage control in integrated circuits include a first voltage divider coupled to receive a reference voltage and having an output providing an adjusted reference voltage; an operational amplifier having a first input coupled to receive the output of the first voltage divider, a second input coupled to receive a feedback voltage, and an output; a voltage generation circuit responsive to the output of the operational amplifier and having an output providing an output voltage; and a second voltage divider coupled to receive the output voltage and having an output providing the feedback voltage. The first voltage divider is responsive to first control signals to adjust a voltage level of the adjusted reference voltage. The second voltage divider is responsive to second control signals to adjust a voltage level of the feedback voltage.

Abstract: A bandgap reference voltage generator includes a first and a second bipolar junction transistor, which is biased at a lower current per unit emitter area than that of the first transistor. Accordingly, the base to emitter voltage of first transistor is higher than that of the second transistor and a delta VBE is generated at the base of the first transistor with respect to the base of the second transistor. A first voltage divider generates a divided voltage of a VBE (fractional VBE) at a first center node. The fractional VBE is added to the VBE of the first transistor and subtracted from the VBE of the second transistor by closed loop feedback action to generate a temperature compensated reference voltage at the base of second transistor. The reference voltage can be amplified to higher voltage levels by using a resistor divider at the base of second transistor.

Abstract: A resistor-less amplifying circuit includes a plurality of resistor-less cells. Each cell includes a plurality of MOS transistors. Each cell generates a differential output equal to ?VGS of two MOS transistors with a magnitude of the differential output controlled by a control voltage generated by a differential amplifier coupled to a feedback loop around a cell. In one embodiment, the resistor-less amplifying circuit is a part of a bandgap voltage reference circuit. In another embodiment, the resistor-less amplifying circuit is part of a temperature sensor circuit.

Abstract: A pull-up resistor circuit is provided for an IC, including a voltage source, a voltage output for providing a first voltage to supply power for providing a second voltage for an input/output (I/O) port of the IC, a first PMOS transistor, a second PMOS transistor and a control signal generator. The first PMOS transistor and the second PMOS transistor are connected in series to provide pull-up resistance, where the first PMOS transistor is coupled to a first control signal to control a pull-up function of the pull-up resistor circuit in a normal mode. Further, the control signal generator is for generating a second control signal coupled to the second PMOS transistor to control a bias voltage of the pull-up resistor circuit to prevent a reverse current from the voltage output to the voltage source under a high-voltage-tolerant mode when the second voltage is higher than the first voltage.

Abstract: Embodiments are provided for biasing circuits with compensation of process variation without band-gap referenced current or voltage. In an embodiment, a circuit for biasing a field-effect transistor (FET) passive mixer comprises a series of diode-connected FETs, and a series of first resistors connected to a voltage source and the series of diode-connected FETs. Additionally, one or more second resistors are connected to the series of diode-connected FETs and to ground. In an embodiment method, the total number of the diode-connected FETs and the total number of the resistors, including the first and second series of resistors, are selected. The total number of the second resistors is then determined according to a defined relation between the selected total number of diode-connected FETs and the total number of resistors.

Abstract: A current generator circuit includes at least one current generation component arranged to generate an output current of the current generator circuit, at least one absolute current calibration component arranged to enable calibration of an absolute current value of the output current, and at least one temperature coefficient calibration component arranged to enable calibration of a temperature coefficient characteristic of the output current. The at least one temperature coefficient calibration component is further arranged to be in a passive state at a reference temperature.

Abstract: Provided is a voltage regulator capable of keeping the accuracy of an output voltage thereof even at high temperature. The voltage regulator includes: a reference voltage circuit configured to output a reference voltage; an output transistor configured to output an output voltage; a voltage divider circuit configured to divide the output voltage to output a divided voltage; an error amplifier circuit configured to amplify a difference between the reference voltage and the divided voltage, and output the amplified difference to control a gate of the output transistor; a switching circuit configured to switch the divided voltage of the voltage divider circuit; and a temperature detection circuit configured to output a signal in accordance with temperature to control the switching circuit.

Abstract: A converter including: an amplifier having first and second input terminals and an output terminal, the first input terminal configured to receive a reference voltage; an array of resistors configured to generate a tuning voltage; and a first plurality of switches coupled to the second input terminal of the amplifier and the array of resistors, the first plurality of switches configured to adjust a gain of the amplifier by selecting at least one resistor in the array of resistors to connect to the second input terminal of the amplifier.

Abstract: A bandgap reference circuit incorporates first, second, and third current sources, first and second operational amplifiers, first and second bipolar transistors, a feedback device, a voltage divider, and a first resistor. The voltage divider divides a voltage difference between the third current source and the base of the second bipolar transistor to provide a reference voltage whose value is smaller than a silicon bandgap voltage.

Abstract: The present disclosure relates to a method and apparatus for generating a voltage reference. More particularly the present disclosure relates to a methodology and circuitry configured to provide an output signal that combines a proportional to absolute temperature component with a complimentary to absolute temperature component to generate a stable output which is not temperature dependent.

Abstract: In accordance with an embodiment, a method of compensating for the temperature coefficient of a reference voltage includes generating a reference voltage that varies over temperature. A temperature compensated reference voltage is generated that compensates for a temperature variation in the voltage value of the reference voltage. In accordance with another embodiment, a temperature compensation circuit that compensates for temperature variation of a reference voltage is includes a reference voltage generator circuit having an output. A first impedance branch is coupled to the output of the reference voltage generator circuit and a second impedance branch is coupled to the output of the reference voltage generator circuit. A transconductance generation circuit having a first terminal connected to the first impedance branch and a second terminal connected to the second impedance branch.

Abstract: A power gating circuit and a control method for power gating switch thereof are provided. The power gating circuit includes a first switch, the power gating switch, a pre-charge circuit, and a control circuit. A first terminal and a second terminal of the first switch are coupled to a first voltage and the control terminal of the power gating switch, respectively. A first terminal and a second terminal of the power gating switch are coupled to a second voltage and a function circuit, respectively. An input signal defines a powered period of the function circuit. According to the input signal, the pre-charge circuit pre-charges the control terminal of the power gating switch during the first sub-period of the powered period, and the control circuit controls the first switch to charge the control terminal of the power gating switch by the first voltage during the second sub-period of the powered period.

Abstract: Reference circuits for biasing radio frequency electronics are provided herein. In certain implementations, a gallium arsenide die includes a power amplifier configured to provide amplification to a signal, a reference voltage circuit including an output terminal that provides a reference voltage, and a mirror circuit configured to bias the power amplifier based on the reference voltage. The reference voltage circuit includes a bipolar transistor, a field effect transistor, and a circuit portion that generates a voltage that is proportional to absolute temperature. The reference voltage circuit generates the reference voltage based on a sum of a base-to-emitter voltage of the bipolar transistor, a turn-on voltage of the field effect transistor, and the voltage that is proportional to absolute temperature.

Abstract: A low power bandgap circuit device that generates temperature independent reference voltages and/or zero temperature coefficient currents is disclosed. The circuit comprises a first pair of transistors, an amplifier, a star connected resistive network, and a second pair of transistors, wherein zero temperature coefficient currents are generated through mirroring and reuse of current from the star connected resistive network.

Abstract: The present invention provides a gamma voltage supply circuit capable of stably supplying a gamma voltage in response to the change of external voltage and a power management IC including the same. The gamma voltage supply circuit generates a regulating voltage using an internal voltage which is not influenced by the variation in load of a source driver IC, and generates a gamma voltage using the regulating voltage.

Abstract: A semiconductor device which occupies a small area is provided. A semiconductor device includes a resistor. The resistor includes a transistor. The increase rate of a drain current of the transistor with a 0.1 V change in drain voltage is preferably higher than or equal to 1% when the drain voltage is higher than a difference between a gate voltage and a threshold voltage of the transistor. The semiconductor device has a function of generating a voltage based on the resistance of the resistor.

Abstract: Disclosed is a method for enhancing temperature efficiency, used to enhance a temperature efficiency resulted from temperature changes in regard to an oscillating period of an oscillator. The method for enhancing temperature efficiency comprises the steps as follows: generating a PTAT current by using a bandgap circuit; generating a CTAT current by using a bandgap circuit; generating an output current, wherein the output current equals to PTAT current minus CTAT current; and providing the output current to an oscillator for generating an oscillating frequency.

Abstract: Provided is a reference voltage circuit with improved temperature characteristics. A current based on a current flowing through a first depletion transistor whose gate and source are connected to each other is caused to flow through a third depletion transistor having the same threshold, to thereby generate a voltage between a gate and a source of the third depletion transistor. A current based on a current flowing through a second depletion transistor whose gate and source are connected to each other is caused to flow through a fourth depletion transistor having the same threshold, to thereby generate a voltage between a gate and a source of the fourth depletion transistor. A reference voltage is generated based on a difference voltage of the two voltages, to thereby obtain a reference voltage having less voltage fluctuations with respect to a temperature change.

Abstract: A current-mode, digital-to-analog converter (DAC) configured to convert a digital word input having j bits to an analog signal. The DAC has 2j current sources, an output node, a current divider, a first switch, and a second switch. Each of the 2j current sources is configured to produce a current having a value I0. The current divider has a programmable divide ratio, d, where 1/d is between 0 and 1. The first switch is configured to selectively couple 2j?1 of the 2j current sources to the output node. One of the 2j current sources is not coupled to the output node. The second switch is configured to selectively couple each of the 2j current sources to the current divider. This architecture ensures that the fundamental transform of input code to output current always has a slope that does not change from positive to negative or from negative to positive.

Abstract: A MEMS microphone package is described that includes a first node and a second node having nearly equivalent 3D parasitic capacitances relative to a preamplifier of the microphone package, such that any noise generated on the first node is equivalent to any noise generated on the second node. An external power supply is connected to the first node and provides a bias voltage signal to the MEMS microphone package via the first node. An inverting amplifier is connected between the power supply and the second node. A third node is connected to the first node through a packaging parasitic capacitor, while the second node is connected to the third node through either an intended parasitic capacitor or an explicit capacitor. The noise coupled from the external power supply to the third node is then cancelled by summing the inverted power supply noise into the third node.

Abstract: An exemplary power distribution system includes multiple power modules and a controller. The multiple power modules are coupled in parallel to supply power to a load. The controller is configured to provide a total number of the power modules and unique numbers to each member of the power modules. At least a member of the multiple power modules is set up to independently determine its own ON status and OFF status based on the total number and the unique numbers when the power distribution system is in operation, wherein an ONthreshold in association with a corresponding unique number is determined to decide its own ON status. A method for operating the power distribution and an energy distribution system are also described.

Abstract: According to one embodiment, a temperature sensing circuit is described comprising a multiplicity of transistor circuits having a multiplicity of different temperature characteristics and a circuit configured to determine a plurality of mismatch values comprising, for each transistor circuit, a mismatch value representing the temperature characteristic of the transistor circuit and to determine a temperature value using the determined plurality of mismatch values.

Abstract: The present invention provides a bandgap reference circuit. The bandgap reference circuit includes a first bipolar junction transistor, a first resistor, for generating a proportional to absolute temperature current, a second resistor, for generating a complementary to absolute temperature current, a first operational amplifier, coupled with the first bipolar junction transistor and the first resistor, a second operational amplifier, coupled with the first bipolar junction transistor and the second resistor, and a zero temperature correlated current generator, for summing the proportional to absolute temperature current and the complementary to absolute temperature current, to generate a zero temperature correlated current.

Abstract: There is provided a semiconductor device including: a current generation circuit that generates a current; a voltage generation circuit that, using the current generated by the current generation circuit, generates and outputs a predetermined voltage from a reference voltage, with an internal capacitor element that is connected to output of the voltage generation circuit, the internal capacitor element being provided within an integrated circuit on which the device itself is mounted; a storage section that stores a flag indicating a connection state between the output of the voltage generation circuit and an external capacitor element provided externally to the integrated circuit; and a controller that, based on the flag, controls a current amount of the current used by the voltage generation circuit to generate the predetermined voltage.

Abstract: According to an embodiment, generating an adjustable bandgap reference voltage includes generating a current proportional to absolute temperature (PTAT). Generating the PTAT current includes equalizing voltages across the terminals of a core that is designed to be traversed by the PTAT current. Generating the adjustable bandgap reference also includes generating a current inversely proportional to absolute temperature (CTAT), summing the PTAT and the CTAT currents and generating the bandgap reference voltage based on the sum of the currents. Equalizing includes connecting-across the terminals of the core a first fed-back amplifier with at least one first stage arranged as a folded setup and including first PMOS transistors arranged according to a common-gate setup. Equalizing also includes biasing the first stage based on the CTAT current. The summation of the PTAT and CTAT currents is performed in the feedback stage of the first amplifier.

Abstract: Methods and systems to control an output frequency relative to a reference frequency. A frequency control system includes a dual-input bias generator to separately receive management and operational controls. The bias generator includes a first bias generator circuit to generate a bias control based on a difference between the management control and a bias feedback reference during a first mode of operation, a second bias generator circuit to generate the bias control based on a difference between the operational control and the bias feedback reference during a second mode of operation, and a bias feedback reference circuit to generate the bias feedback reference based on the bias control. The first mode may include a characterization and/or a start-up mode. The second mode may include an operational mode, such as a feedback-controlled mode.

Abstract: A reference current path carries a reference current. A first transistor is coupled to the reference current path. A second transistor is also coupled to the reference current path. The first and second transistors are connected in parallel to carry the reference current. The first transistor is biased by a first voltage (which is a bandgap voltage plus a threshold voltage). The second transistor is biased by a second voltage (which is a PTAT voltage plus a threshold voltage). The first and second transistors are thus biased by voltages having different and opposite temperature coefficients with a result that the temperature coefficients of the currents flowing in the first and second transistors are opposite and the reference current accordingly has a low temperature coefficient.

Abstract: A switching converter and a load regulation compensation module for improving load regulation accuracy of the switching converter. The switching converter regulates its output voltage through controlling a switch module to switch on and off based on a first reference signal and a feedback signal indicative of the output voltage. The on and off switching of the switch module generates a switching current, resulting in an average offset voltage between an internal reference ground and a package ground pin of the switching converter. The load regulation compensation module is configured to monitor the switching current, and to compensate a second reference signal having a bandgap reference voltage referenced to the internal reference ground based on the monitored switching current to generate the first reference signal, so that the average offset voltage is substantially cancelled out from the first reference signal with respect to the package ground pin.

Abstract: Provided is a reference voltage circuit capable of forming optimal circuits for various modes of an electronic device. The reference voltage circuit includes, between respective transistors forming the reference voltage circuit and between the transistors and a power supply terminal, switching elements configured to switch a circuit configuration of the reference voltage circuit.

Abstract: An adaptive channel tracking algorithm performed by a flash memory system obtains disparity metrics and derivative metrics and uses a combination of the disparity and derivative metrics to estimate an optimal read reference voltage. The estimation of the optimal read reference voltage does not rely on assumptions about the underlying cell voltage distributions and results in a good estimate of the read reference voltage even if the standard deviations of the cell voltage distributions are different. In addition, the algorithm is relatively simple and less computationally intensive to perform than the known tracking algorithms.

Abstract: A voltage reference circuit is provided. A voltage reference circuit includes a bridge circuit having a first branch, a second branch, and an amplifier. The bridge circuit is coupled between a precision voltage reference (PVR) node and a ground node. The first branch includes a first resistor of value R1 coupled to a reference resistor of value Rref at a first intermediate node. The second branch includes a second resistor of value R1 coupled to a variable resistor of value Rvar at a second intermediate node. Rvar is non-linearly tunable based on the PVR. The amplifier includes a positive input terminal coupled to the second intermediate node and a negative input terminal coupled to the first intermediate node. The amplifier is configured to generate the PVR.

Abstract: A negative reference voltage generating circuit generating a negative reference voltage is provided, including a differential amplifier, a first diode, second diodes, and a third resistor. The differential amplifier includes a non-inverting input terminal, an inverting input terminal, and an output terminal, and is driven by a positive and a negative power voltages. The output terminal is connected with the non-inverting input terminal via a first resistor and connected with the inverting input terminal via a second resistor. The first diode includes a cathode connected with the non-inverting input terminal of the differential amplifier and an anode connected with a ground. The second diodes respectively include a cathode connected with a predetermined connection point and an anode connected with the ground, and are connected in parallel. The third resistor is connected between the connection point and the inverting input terminal of the differential amplifier.

Abstract: Timer circuitry completely formable in an integrated circuit (IC) for generating a clock signal in an implantable medical device is disclosed. The timer circuitry can be formed on the same Application Specific Integrated Circuit typically used in the implant, and requires no external components. The timer circuitry comprises modification to a traditional astable timer circuit. A resistance in the disclosed timer circuit can be trimmed to adjust the frequency of the clock signal produced, thus allowing that frequency to be set to a precise value during manufacturing. Precision components are not needed in the RC circuit, which instead are used to set the rough value of the frequency of the clock signal. A regulator produces a power supply for the timer circuitry from a main power supply (Vcc), producing a clock signal with a frequency that is generally independent of temperature and Vcc fluctuations.

Abstract: In an example, a temperature-corrected voltage reference circuit for use in an integrated circuit (IC) includes a voltage reference circuit, a programmable gain amplifier, and a digital control circuit. The programmable gain amplifier includes a first input coupled to the voltage reference circuit, a second input coupled to receive a control signal, and an output coupled to provide a temperature-corrected voltage reference. The digital control circuit includes an input coupled to receive a temperature signal indicative of temperature of the IC and an output coupled to the second input of the programmable gain amplifier, the digital control circuit generating the control signal in response to the temperature signal.

Abstract: A semiconductor integrated circuit that includes: a capacitive element that has a first end connected to a first node and a second end connected to a second node of higher electrical potential than the first node; and a semiconductor element that has a source electrode, a drain electrode and a gate electrode respectively formed in a second conducting region, the second conducting region being formed with a different conducting type to a first conducting region, and the first conducting region formed on a substrate, with the source electrode and the second conducting region connected to the first node, and the first conducting region connected to the second node.

Abstract: Exemplary embodiments of the present invention relate to an under-voltage lockout circuit, and a switching control circuit and a power supply including the same. The under-voltage lockout circuit according to an embodiment of the invention includes a first under-voltage lockout circuit comparing a driving voltage with a first reference voltage and a second under-voltage lockout circuit generating an under-voltage lockout signal based on a result of the comparison between the driving voltage and the second reference voltage. The first under-voltage lockout circuit stops operation of the second under-voltage lockout circuit when the driving voltage is lower than the first reference voltage and operates the second under-voltage lockout circuit when the driving voltage is higher than the first reference voltage. Power consumption of the first under-voltage lockout circuit is limited by a first current that generates the first reference voltage.

Abstract: A bandgap reference circuit is provided and which includes an operating voltage, a current mirror, a first p-channel metal-oxide semiconductor (PMOS) transistor and an amplifier. The current mirror is coupled to the operating voltage. The first PMOS transistor is coupled to the operating voltage and the current mirror. The amplifier is coupled to the current mirror and the first PMOS transistor. When the bandgap reference circuit is activated, the operating voltage starts to supply voltage such that the first PMOS transistor is turned on first. When the operating voltage is higher than a preset voltage level, the first PMOS transistor is turned off, in order to complete an start-up process.

Abstract: An electronic device includes a power supply, a ground, and an intermediate ground having a voltage less than a voltage of the power supply and greater than a voltage of the ground. The electronic device also includes an error amplifier having an input stage coupled between the power supply and the ground, and an output stage coupled between the power supply and the intermediate ground. A ballast transistor is coupled to receive an output from the error amplifier. A feedback circuit is coupled to an output of the ballast transistor to generate feedback signals, and the error amplifier operates in response to the feedback signals.

Abstract: Reference circuit arrangement according to this invention comprises a branched current path (BE) connecting a first and second terminal (T+, T?) via an intermediate terminal (TN). The intermediate terminal (TN) is connected to a reference terminal (GND). A current path (PTAT) is coupled between the first and second terminal (T+, T?) via the reference terminal (GND). A feedback loop (FB) is connected to the first and second terminal (T+, T?) and designed to control, at the first and second terminal (T+, T?), a virtual ground potential. A reference path (REF) is connected to the feedback loop (FB) having a reference input for receiving from the feedback loop a reference current (Iref) and reference output (Vref) to provide a reference voltage.

Abstract: A reference voltage circuit and method making same, the reference voltage circuit including: a first sub-circuit for generating first and second temperature-compensated voltages; a second sub-circuit configured to receive the first and second temperature-compensated voltages and generate first and second reference voltages based on the first and second temperature-compensated voltages, respectively; and a third sub-circuit configured to receive and change voltage levels of the first and second reference voltages, and output a third reference voltage.