Fault Detecting In Electric Circuits And Of Electric Components Patents (Class 324/500)
  • Patent number: 8294482
    Abstract: Systems and methods for testing a peripheral in accordance with a high-speed serial interface protocol are provided. A test system can test a peripheral by providing user-specified control over a test processor (which is substantially the same processor the peripheral will interface with when installed) to test, calibrate, or both test and calibrate the peripheral. The test processor can communicate with the peripheral according to the high-speed serial interface protocol, thereby effectively providing an actual “in-device” environment for testing and/or calibrating the peripheral.
    Type: Grant
    Filed: September 16, 2008
    Date of Patent: October 23, 2012
    Assignee: Apple Inc.
    Inventors: Shawn Gettemy, Wei Yao, Ahmad Al-Dahle
  • Patent number: 8283929
    Abstract: An electrically isolated high-voltage direct-current electric circuit is monitored. Electrical signals are periodically sampled, and ground isolation indexes are calculated. A trend corresponding to trend elements is characterized. The characterized trend is compared with an expected trend with deviations indicative of potential faults.
    Type: Grant
    Filed: June 1, 2010
    Date of Patent: October 9, 2012
    Assignee: GM Global Technology Operations LLC
    Inventor: Konking (Michael) Wang
  • Patent number: 8278964
    Abstract: A method and apparatus for testing and characterizing circuits is provided. In one embodiment, a high-speed interface of a semiconductor component includes high-speed test circuitry. The high-speed test circuitry obviates the need for an external high-speed testing system for testing and characterization. In one embodiment, the high-speed test circuitry includes a test pattern generation circuit, and various differential comparators to compare low bandwidth reference signals with interface signals during testing and characterization. In one embodiment, an interface that includes the test circuitry can test itself or another interface. In one embodiment, a timing reference signal decouples the individual parameters of two interfaces testing each other to avoid any errors introduced by the combination of individual interface circuit parameters, such as receiver parameters and transmitter parameters. The testing can be performed at the wafer stage, at the component stage, and in a system.
    Type: Grant
    Filed: September 4, 2009
    Date of Patent: October 2, 2012
    Assignee: Rambus Inc.
    Inventors: Frederick Ware, Scott Best, Timothy Chang, Richard Perego, Ely Tsern, Jeff Mitchell
  • Patent number: 8269507
    Abstract: This invention describes a device for testing a surface mounted connector using a test probe assembly that utilizes a vacuum to force the test wires and the test probe's wire array into intimate contact with the connector to be tested. The wires are directed through a wire module assembly and have a wide spacing at one end, and a narrow spacing corresponding to the spacing required for the specific units to be tested at the opposite end. The wires are kept in contact with the unit under test by the use of spring loaded test connectors and vacuum.
    Type: Grant
    Filed: May 29, 2010
    Date of Patent: September 18, 2012
    Inventor: James Hall
  • Patent number: 8264236
    Abstract: A method for testing electronic devices involves receiving a stimulus signal for testing a device; changing an operating temperature of at least a component of an electrical filter while maintaining settings of the electrical filter, thereby altering the stimulus signal as the stimulus signal passes through the electrical filter, to create an altered stimulus signal; and outputting the altered stimulus signal.
    Type: Grant
    Filed: November 28, 2007
    Date of Patent: September 11, 2012
    Assignee: Advantest (Singapore) Pte Ltd
    Inventors: Jose Moreira, Markus Rottacker
  • Patent number: 8263934
    Abstract: In a method and apparatus for measuring a potential on a surface of a sample using a charged particle beam while restraining a change in the potential on the sample induced by the charged particle beam application, or detecting a compensation value for a change in a condition for the apparatus caused by the sample being electrically charged, a voltage is applied to a sample such that a charged particle beam does not reach the sample (referred to as “mirror state”) when the charged particle beam is applied toward the sample. Information is detected, relating to a potential on the sample using signals obtained by the voltage application.
    Type: Grant
    Filed: December 18, 2007
    Date of Patent: September 11, 2012
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Minoru Yamazaki, Akira Ikegami, Hideyuki Kazumi, Osamu Nasu
  • Patent number: 8265366
    Abstract: An ultrasonic diagnostic imaging system is described which records expert review of a 3D image data set, including image plane and view manipulation, annotation, and measurements, for the purpose of generating automated review protocols for 3D ultrasound image acquisitions. The ability to provide a standardized 3D review protocol has benefits such as guiding reviewers of all experience levels through the required steps to extract key images and measurements from 3D image data, enabling automation to improve 3D review workflow and reduce review time, monitoring growth or therapy, and standardizing review presentations for easy comparison with prior examination results.
    Type: Grant
    Filed: September 11, 2009
    Date of Patent: September 11, 2012
    Assignee: Koninklijke Philips Electronic N.V.
    Inventors: Alisdair Dow, James Jago, Antoine Collet-Billon, Lisa Pumphrey
  • Publication number: 20120223719
    Abstract: A fault detection device includes an interface electrically connected to an electrical instrument to transfer commercial power to the electrical instrument, transmit a command for driving one of a plurality of loads included in the electrical instrument to the electrical instrument, and detect current flowing in one of the plurality of loads of the electrical instrument; and a terminal configured to receive a current signal corresponding to the current flowing in one of the plurality of loads from the interface, determine whether the one load has a fault on the basis of the received current signal and display whether the load has a fault. A faulty load is determined by detecting current of only a load suspected to have a fault when a fault is generated in the electrical instrument so as to improve fault detection accuracy.
    Type: Application
    Filed: January 24, 2012
    Publication date: September 6, 2012
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Se Jin JO, Myung Chul KIM, Yoon Sup KIM, Ki Hong NOH
  • Patent number: 8248099
    Abstract: In a semiconductor integrated circuit wherein low-threshold-voltage and high-threshold-voltage transistors are disposed mixedly, the operating speed of each transistor can be properly controlled in speed control execution through regulation of a power supply voltage VDD. The semiconductor integrated circuit comprises an internal circuit and measuring circuits. The internal circuit comprises a low-threshold-voltage MOS transistor and a high-threshold-voltage MOS transistor, and the degree of threshold voltage variation of the low-threshold-voltage MOS transistor is larger than the degree of threshold voltage variation of the high-threshold-voltage MOS transistor. The measuring circuit detects which one of fast, typical, and slow states is taken by both the low-threshold-voltage MOS transistor and the high-threshold-voltage MOS transistor.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: August 21, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Kazuo Otsuga, Yusuke Kanno
  • Patent number: 8249830
    Abstract: A method and system for automatically determining an optimal re-training interval for a fault diagnoser based on online monitoring of the performance of a classifier are disclosed. The classifier generates a soft measure of membership in association with a class based on a training data. The output of the classifier can be utilized to assign a label to new data and then the members associated with each class can be clustered into one or more core members and potential outliers. A statistical measure can be utilized to determine if the distribution of the outliers is sufficiently different than the core members after enough outliers have been accumulated. If the outliers are different with respect to the core members, then the diagnoser can be re-trained; otherwise, the output of the classifier can be fed to the fault diagnoser.
    Type: Grant
    Filed: June 19, 2009
    Date of Patent: August 21, 2012
    Assignee: Xerox Corporation
    Inventors: Rajinderjeet Singh Minhas, Vishal Monga, Wencheng Wu, Divyanshu Vats
  • Patent number: 8242797
    Abstract: According to the present invention, allowable displacement can be increased from an excellent stress relaxation effect achieved by applying a hinge structure while adopting advantages of a dual beam cantilever-type probe that can reduce scrub. Since the hinge structure is a structure that does not receive a moment, an effect that is the same as eliminating a moment in a conventional prove can be achieved so that stress can be evenly applied and the allowable displacement of the probe can be increased.
    Type: Grant
    Filed: February 24, 2009
    Date of Patent: August 14, 2012
    Assignee: Korea Institute of Machinery & Materials
    Inventors: Jung-Yup Kim, Hak-Joo Lee, Kyung-Shik Kim
  • Patent number: 8242787
    Abstract: The present invention relates to a method for determining a status and/or condition of an LED/OLED device 10, comprising the steps of: applying at least one time varying signal 22 to the LED/OLED device, acquiring the response 24 to said at least one time varying signal, correlating said response with predetermined values 30, and determining the status/condition 32 on the basis of the correlation result. Further, the present invention relates to a device adapted to carry out the inventive method.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: August 14, 2012
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Dirk Hente, Joseph Hendrik Anna Maria Jacobs
  • Patent number: 8228092
    Abstract: A device and method for dc isolation and level shifting includes a driver circuit powered by a first voltage range, a capacitor connected to the driver circuit, and a latching circuit connected to the capacitor. The latching circuit is powered by a second voltage range and is configured to restore and/or minimize charge loss of the capacitor during a voltage transition at the capacitor. A device and method for analog isolation and measurement configured to measure an analog voltage at a second potential without requiring analog circuits at the second potential.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: July 24, 2012
    Assignee: Texas Instruments Northern Virginia Incorporated
    Inventors: Gary Stirk, Jong-Dii Jiang, John Houldsworth
  • Patent number: 8228648
    Abstract: A compressor monitoring system includes current and voltage monitors, current and voltage averaging modules, a control module, and a switch. The current monitor measures a current drawn by a motor of a compressor. The current averaging module generates first and second average current values based on the current measured by the current monitor. The voltage monitor measures a utility power voltage. The voltage averaging module generates first and second average voltage values based on the voltage measured by the voltage monitor. The control module selectively generates a fault signal when a first ratio is greater than a first predetermined threshold and a second ratio is less than a second predetermined threshold. The first ratio is based on the first and second average current values. The second ratio is based on the first and second average voltage values. The switch deactivates the motor when the fault signal is generated.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: July 24, 2012
    Assignee: Emerson Climate Technologies, Inc.
    Inventors: Nagaraj B. Jayanth, George Ramayya
  • Patent number: 8229077
    Abstract: Telephone test sets include a telephone test set housing and at least one lead that extends away from the telephone test set housing. The lead is configured to be coupled to a telephone line. A light source, a data port and/or a display are integrated with the telephone test set housing. The light source is configured to project light away from the telephone test set to illuminate an area adjacent the telephone test set. The data port is configured to receive a data jack operatively associated with a communications device. The display is configured to display identification information associated with the telephone line. Related methods and systems are also provided.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: July 24, 2012
    Assignee: AT&T Intellectual Property I, L.P.
    Inventors: Blake R. Urban, Jorge Cobas
  • Publication number: 20120176141
    Abstract: A signal input circuit includes: a signal input device having a signal input terminal; an inspection capacitor connected between the signal input terminal and a reference potential; a connection unit connecting/disconnecting an inspection path between the inspection capacitor and the signal input terminal; a charge and discharge unit charging/discharging the inspection capacitor; and a determination processing unit carrying out a terminal failure detection processing. The determination processing unit controls the connection unit to disconnect the inspection path and controls the charge and discharge unit to set the voltage of the inspection capacitor to a terminal inspection voltage in a charge and discharge procedure, controls the connection unit to connect the inspection path in a continuity establishing procedure, and detects the terminal failure at the signal input terminal or a communication path from the signal input terminal based on a voltage of the inspection path.
    Type: Application
    Filed: November 28, 2011
    Publication date: July 12, 2012
    Applicant: DENSO CORPORATION
    Inventors: Yuuki MIKAMI, Toru Itabashi, Yoshiharu Takeuchi, Kenji Mochizuki, Naoya Tsuchiya
  • Patent number: 8217658
    Abstract: An object of the present invention is to easily detect a short circuit failure in a current collector of a prismatic battery and prevent a short circuit caused by an existence of a burr generated while cutting or a spatter generated while welding the current collector to an electrode plate. A battery unit is housed in a metallic battery case. In the battery unit, current collectors having bent portions on both sides are fixed to face surfaces of an electrode plate group of a prismatic battery. The portions of the battery case, which correspond to the bent portions, are pressed in a thickness direction. Under the pressure, a short circuit inspection for a short circuit between the battery case and the current collectors of the battery unit is executed. When a projected object exists on the bent portion, a short circuit is generated between the battery case and the current collector by pressing so that a short circuit failure caused by a shape of the current collector can be detected.
    Type: Grant
    Filed: December 12, 2007
    Date of Patent: July 10, 2012
    Assignee: Panasonic EV Energy Co., Ltd.
    Inventors: Masato Onishi, Shinichi Sakai, Masaru Doutai, Masaru Kobayashi, Hiroaki Arai
  • Patent number: 8217660
    Abstract: An open terminal detection device that detects an open terminal, including: a transistor that is supplied with a base current from a current source in which an amount of current supply decreases corresponding to an increase in an external impedance of the terminal; a diode that limits discharge of a base charge of the transistor; and an output circuit that outputs an output signal in coordination with on/off switching of the transistor.
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: July 10, 2012
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventor: Hideo Yamawaki
  • Patent number: 8211538
    Abstract: A security coating on an electronic circuit assembly comprises a mesh coating that may have a unique signature pattern and comprise materials that easily produce an image of the signature so that it is possible to determine if reverse engineering has been attempted. Spaces in the mesh may include electrical components to erase circuit codes to destroy the functionality and value of the protected die if the mesh coated is disturbed. The voids may include compositions to enhance the mesh signature and abrade the circuit if tampering takes place.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: July 3, 2012
    Assignee: Honeywell International Inc.
    Inventor: Kenneth H. Heffner
  • Patent number: 8206775
    Abstract: The pattern defect repairing apparatus comprises an application head, a waste ejection board, a waste ejection vessel, a waste ejection board moving stage, a head lifting stage, and an application unit base. The application head comprises an ink-jet head and a head holder. An ink jet head has an ejection nozzle, and is attached to the head holder and able to be moved up and down by the head lifting stage. The waste ejection vessel is provided to the waste ejection board and able to be moved between a waste ejection position and a retreated position by the waste ejection board moving stage. Repairing material is ejected for waste onto the waste ejection board set in the vicinity of the nozzle immediately before application to repair the defect. The tip end of the nozzle is prevented from being dried.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: June 26, 2012
    Assignees: Hitachi Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Nobuaki Nakasu, Tadao Edamura, Hirofumi Sunaoshi, Takemi Igeta, Kazuhiro Fukuchi
  • Patent number: 8195990
    Abstract: In a proximity communication system, transmit elements on one chip are aligned with receive elements on a second chip juxtaposed with the first chip. However, if the elements are misaligned, either statically or dynamically, the coupling between chips is degraded. The misalignment may be compensated by controllably degrading performance of the system. For example, the transmit signal strength may be increased. The bit period or the time period for biasing each bit may be increased, thereby decreasing the bandwidth. Multiple coupling elements, such as capacitors, may be ganged together, thereby decreasing the number of channels. The granularity of symbols, such as images, may be increased by decreasing the number of bits per symbol. Multiple coupling elements, such as capacitors, may be ganged together, thereby decreasing the number of channels.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: June 5, 2012
    Assignee: Oracle America, Inc.
    Inventors: Ronald Ho, Ashok V. Krishnamoorthy, John E. Cunningham, Robert J. Drost
  • Patent number: 8193827
    Abstract: An inspection method which simplifies an inspection step by eliminating the need to set probes on wiring or probe terminals, and an inspection device for performing the inspection step. A voltage is applied to each of inspected circuits or circuit elements to operate the same. Signal processing is performed on an output from each inspected circuit or circuit element during operation to form a signal (operation information signal) including information on the operating condition of the circuit or the circuit element. The operation information signal is amplified and the amplitude of an alternating current voltage separately input is modulated with the amplified operation information signal. The voltage of the modulated alternating current is read in a non-contact manner to determine whether the corresponding circuit or circuit element is non-defective or defective.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: June 5, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Masaaki Hiroki
  • Patent number: 8193817
    Abstract: Input channel diagnostics for an industrial process control system that provides improved apparatus and methods relating to fault containment, overload protection and input channel diagnostics. The input circuit includes one or more series resistors that have a total resistance that is at least two orders of magnitude greater than the magnitude of the resistance of a conditioned sensor signal source.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: June 5, 2012
    Assignee: Rockwell Automation Limited
    Inventors: Thomas Bruce Meagher, Gerald Robert Creech
  • Patent number: 8183877
    Abstract: Probe pins related to the present invention are formed from a material which consists essentially of one or more elements selected from the group consisting of platinum, iridium, ruthenium, osmium, palladium and rhodium. A material obtained by adding one or more elements selected from the group consisting of tungsten, nickel and cobalt to this metal may also be used.
    Type: Grant
    Filed: September 28, 2005
    Date of Patent: May 22, 2012
    Assignee: Tanaka Kikinzoku Kogyo K.K.
    Inventor: Kunihiro Tanaka
  • Patent number: 8178227
    Abstract: A method for detecting cell failure within a battery pack based on variations in the measured electrical isolation resistance of the battery pack is provided. The method includes the steps of monitoring the isolation resistance; determining when the isolation resistance falls below a first preset value; determining how long it takes for the electrical isolation resistance to recover to greater than a second preset value; determining when the isolation resistance falls below a third preset value; and performing a predetermined response after the electrical isolation resistance falls below the first preset resistance value and recovers to greater than the second resistance value and then falls below the third preset resistance value and if the time period is within a preset time range.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: May 15, 2012
    Assignee: Tesla Motors, Inc.
    Inventor: Weston Arthur Hermann
  • Patent number: 8168315
    Abstract: A method for detecting cell failure within a battery pack based on variations in the measured electrical isolation resistance of the battery pack is provided. The method includes the steps of monitoring the isolation resistance; determining when the isolation resistance falls below a preset value; and performing a predetermined response when the isolation resistance falls below the preset value. The method may include additional steps such as (i) determining how long the isolation resistance remains below the preset value; (ii) determining the rate of change in the isolation resistance; (iii) determining how long it takes for the electrical isolation resistance to recover; (iv) determining when the isolation resistance falls below a third preset value, wherein this step is performed after the isolation resistance recovers to greater than the second preset value; and (v) monitoring for a secondary effect associated with cell failure.
    Type: Grant
    Filed: August 23, 2011
    Date of Patent: May 1, 2012
    Assignee: Tesla Motors, Inc.
    Inventor: Weston Arthur Hermann
  • Patent number: 8164342
    Abstract: Information handling system manufacture through a burn rake that burns images and tests information handling systems is managed with a cascade first-in-first-out manufacture by allowing a predetermined burn time for each information handling system at each burn location. The predetermined burn time includes a projected burn time, a burn variation buffer and a standard repair time buffer that ensures a complete burn for substantially all information handling systems. Increasing the number of systems having a complete burn supports first-in-first out loading and unloading of information handling systems at burn locations so that the burn manufacture process occurs in a consistent cascade that proceeds down the length of the burn rack from a first end to a second end.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: April 24, 2012
    Assignee: Dell Products L.P.
    Inventors: Nathan Henrichsen, Doug Meek, Jack P. Ramsey, Jr., John D'Andrea, Matthew Alan Schultz, Widodo Sulistyono
  • Patent number: 8159256
    Abstract: A method for manufacturing a probe needle having beams and a contactor placed on tips of the beams comprises preparing a Si wafer 20, forming a seed layer 21 on the Si wafer 20, and forming grooves in a desired shape of the beams on the seed layer 21 by patterning a photoresist 23. Subsequently, the grooves are filled up with metal-plated layers 24a, 24b to form the desired shape of beams.
    Type: Grant
    Filed: October 8, 2009
    Date of Patent: April 17, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Tomohisa Hoshino, Hiroyuki Hashimoto, Muneo Harada
  • Patent number: 8159248
    Abstract: Flexible and rigid interposers for use in the semiconductor industry and methods for manufacturing the same are described. Auto-catalytic processes are used to minimize the costs associated with the production of flexible interposers, while increasing the yield and lifetime. Electrical contact regions are easily isolated and the risk of corrosion is reduced because all portions of the interposer are plated at once. Leads projecting from the flexible portion of the interposers accommodate a greater variety of components to be tested. Rigid interposers include a pin projecting from a probe pad affixed to a substrate. The rigidity of the pin penetrates oxides on a contact pad to be tested. Readily available semiconductor materials and processes are used to manufacture the flexible and rigid interposers according to the invention. The flexible and rigid interposers can accommodate pitches down to 25 ?m.
    Type: Grant
    Filed: August 18, 2009
    Date of Patent: April 17, 2012
    Assignee: International Business Machines Corporation
    Inventors: Steven A. Cordes, Matthew J. Farinelli, Sherif A. Goma
  • Patent number: 8149008
    Abstract: A probe card includes a probe head that holds a plurality of probes; a flat wiring board that has a wiring pattern corresponding to a circuit structure; an interposer that is stacked on the wiring board and relays wirings of the wiring board; a space transformer that is placed between the interposer and the probe head, transforms a space between the wirings relayed by the interposer, and leads the transformed wirings out to a surface facing the probe head; and a plurality of post members that are formed in a substantially columnar shape with a height larger than a sum of a thickness of the wiring board and a thickness of the interposer, and embedded to pierce through the wiring board and the interposer in a thickness direction such that one of end surfaces of each post member comes into contact with the space transformer.
    Type: Grant
    Filed: July 16, 2008
    Date of Patent: April 3, 2012
    Assignee: NHK Spring Co., Ltd.
    Inventors: Yoshio Yamada, Hiroshi Nakayama, Tsuyoshi Inuma, Takashi Akao
  • Publication number: 20120068546
    Abstract: A control device is provided that includes a power supply unit. First and second MOSFETs are serially connected to a sub power supply line in the power supply unit by connecting their respective drains to one another. Third and fourth MOSFETs are serially connected to a sub power supply in a control unit by connecting their respective drains to one another. By controlling these MOSFETs, power of the sub power supply is supplied to a load. The drain voltage of each MOSFET, and the voltage between the second MOSFET and the third MOSFET are monitored to determine a short-circuit fault and an open-circuit fault of the MOSFET, and a ground fault in the sub power supply line between the power supply unit and the control unit.
    Type: Application
    Filed: September 21, 2011
    Publication date: March 22, 2012
    Inventors: Yuichi KURAMOCHI, Hiroyuki SAITO
  • Patent number: 8135551
    Abstract: A system and method for identifying turn faults in a stator of a motor are provided. The method includes determining a normalized cross-coupled impedance from the symmetrical components of measured voltages and currents of the motor. Additionally, the normalized cross-coupled impedance may be normalized to a negative sequence impedance. The negative sequence impedance may be determined through a regression analysis using parameters of the motor, such as line-to-line voltage, horsepower, and number of poles. A system is provided that includes a device having a memory and processor configured to determine a normalized cross-coupled impedance, compare the normalized cross-coupled impedance to one or more thresholds, and trigger and alarm and/or trip the motor.
    Type: Grant
    Filed: February 3, 2009
    Date of Patent: March 13, 2012
    Assignee: General Electric Company
    Inventors: Arvind Kumar Tiwari, William James Premerlani, Somakumar Ramachandrapanicker, Bhaskar Sen, Bogdan Z. Kasztenny, Arijit Banerjee
  • Patent number: 8125234
    Abstract: The invention relates to a probe card assembly comprising a stiffener (1), comprising a PCB (2) disposed in the stiffener (1), and comprising a spider (3) supported by the stiffener and the PCB (2), said spider comprising at least one probe (30) to test a wafer (5). This probe card assembly of the PCB (2) is supported in a loosely decoupled manner in the stiffener (1) to prevent transmission of high thermally-induced warping effects.
    Type: Grant
    Filed: June 10, 2008
    Date of Patent: February 28, 2012
    Assignee: Micronas GmbH
    Inventors: Günter Stiefvater, Wolfgang Hauser
  • Patent number: 8125747
    Abstract: A drive system for a multi-phase electric machine with a permanent magnet rotor, the drive system may comprise conduction paths for each phase. Detectors on each of the conduction paths may determine electrical condition of the conduction path. At least one selectable interconnection path may be present between all of the conduction paths and at least one selectable interconnection path may be operable to connect all of the conduction paths together responsively to at least one of the detectors determining that the electrical condition of its respective electrical path is representative of a predetermined electrical fault condition so that heating of the rotor during continued rotation of the rotor is prevented.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: February 28, 2012
    Assignee: Honeywell International Inc.
    Inventors: Evgeni Ganev, Leroy Allen Fizer, Cuong Nguyen, Thay Chau
  • Patent number: 8126664
    Abstract: In order to detect, localize and interpret a partial discharge occurring in a partial discharge site along an electrical equipment, two measurement probes and a synchronization probe are installed along the electrical equipment. The measurement probes detect pulses travelling in the electrical equipment while the synchronization probe detects a phase angle in the electrical equipment and is usable for calibration purposes. A control unit receives the signals sensed by the probes and conditions them. Digital processing applied on the conditioned signals, involving their correlation, a time-frequency distribution and a form factor estimation, allows establishing a diagnosis indicating a detection of a partial discharge and its localization along the electrical equipment. A wideband magnetic probe may be provided for detecting the pulses traveling in the electrical equipment.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: February 28, 2012
    Assignee: Hydro-Québec
    Inventors: Daniel Fournier, Bruno Cantin, Jean-Marc Bourgeois, François Léonard, Yvan Roy
  • Patent number: 8120379
    Abstract: A device includes an integrated circuit device having a sensor to measure an operating characteristic of the device. The sensor provides information based on the measured operating characteristic to a trigger module. In response to the information indicating the measured operating characteristic meets a threshold associated with a device failure, the trigger module provides an indication to a storage element, which stores information indicating the threshold has been met. In the event of a failure of the integrated circuit device, the storage element can be accessed by a device analyzer to retrieve the stored information to determine the cause of the device failure.
    Type: Grant
    Filed: April 14, 2010
    Date of Patent: February 21, 2012
    Inventor: B. Andrew Cahoon
  • Patent number: 8120367
    Abstract: An analog input device including a scanning circuit including a first insulation transformer insulating an analog signal inputted from a thermocouple, a power supply section charging a test voltage used for disconnection detection of the thermocouple, a second insulation transformer in which the scanning circuit and the power supply section are connected in parallel, and a control circuit for outputting a pulse signal to be inputted to the second insulation transformer. The second insulation transformer insulates and transfers a drive pulse for switching the scanning circuit and a power supply pulse for feeding power to the power supply section. The control circuit carries out a timing control so that the drive pulse and the power supply pulse are not outputted at the same time. Accordingly, an insulation transformer for application of a test voltage is not required, and thus the total number of the components is reduced to a great extent and reductions in costs and size thereof are realized.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: February 21, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoshihiro Akeboshi, Seiichi Saito, Tetsuya Nagakawa
  • Patent number: 8120378
    Abstract: Systems, methods, and computer readable media storing instructions for such methods relate to generating test vectors that can be used for exercising a particular area of interest in an integrated circuit. The test vectors generally include a non-overlapping repeating and/or predictable sequence of care bits (a care bit pattern) that can be used by a tester to cause the exercise of the area and collect emissions caused by exercising the area. Such emissions can be used for analysis and debugging of the circuit and/or a portion of it. Aspects can include providing a synchronization signal that can be used by a tester to allow sensor activation at appropriate times.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: February 21, 2012
    Assignee: Cadence Design Systems, Inc.
    Inventors: Joseph Swenton, Thomas Bartenstein, Richard Schoonover, David Sliwinski
  • Patent number: 8114265
    Abstract: There is described a method and a system for evaluating damage of a plurality of cells in an electrolyser. The method comprises acquiring a voltage for each one of the cells; comparing the voltage to at least two threshold voltage levels; classifying the cells as one of: severely damaged cells, non-severely damaged cells and undamaged cells, based on the comparison of the voltage with the at least two threshold voltage levels; and deactivating the cells classified as severely damaged cells from the electrolyser.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: February 14, 2012
    Assignee: Recherche 2000 Inc.
    Inventors: Said Berriah, Michel Veillette, Gilles J. Tremblay
  • Patent number: 8111389
    Abstract: Disclosed herein is a method of inspecting defects in a circuit pattern of a substrate. At least one laser beam radiation unit for radiating a laser beam onto an inspection target circuit pattern of a substrate in a non-contact manner is prepared. A probe beam radiation unit for radiating a probe beam onto a connection circuit pattern to be electrically connected to the inspection target circuit pattern in a non-contact manner is prepared. The laser beam is radiated onto the inspection target circuit pattern using the laser beam radiation unit. The probe beam is radiated onto the connection circuit pattern using the probe beam radiation unit, thus measuring information about whether the probe beam is diffracted, and a diffraction angle. Accordingly, the method can solve problems such as erroneous measurements caused by contact pressure and can reduce the time required for measurements.
    Type: Grant
    Filed: March 4, 2010
    Date of Patent: February 7, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seung Seoup Lee, Tak Gyum Kim, Jin Won Park
  • Publication number: 20120023994
    Abstract: A surge protector, an HVAC unit including the surge protector and a method of testing electrical equipment employing the surge protector is disclosed. In one embodiment, the surge protector includes: (1) a first lead, a second lead and a third lead and (2) a protective network having three surge protection units with one of the three surge protection units coupled between each distinct combination of the first, second and third leads, the protective network configured to provide simultaneous surge protection between each of the distinct combinations.
    Type: Application
    Filed: July 29, 2010
    Publication date: February 2, 2012
    Applicant: Lennox Industries, Incorporated
    Inventor: Joe Ray Powell
  • Patent number: 8089294
    Abstract: A Micro-Electro-Mechanical-Systems (MEMS) probe is fabricated on a substrate for use in a probe card. The probe has a bonding surface to be attached to an application platform of the probe card. The bonding surface is formed on a plane perpendicular to a surface of the substrate. An undercut is formed beneath the probe for detachment of the probe from the substrate.
    Type: Grant
    Filed: August 5, 2008
    Date of Patent: January 3, 2012
    Assignee: WinMENS Technologies Co., Ltd.
    Inventors: Tseng-Yang Hsu, Cao Ngoc Lam
  • Publication number: 20110316553
    Abstract: The abnormality detection system is provided for detecting an abnormality of an object. The abnormality detection system includes a high-frequency power source, a primary coil, a secondary coil and a controller. The high-frequency power source supplies power. The primary coil receives the power supplied from the high-frequency power source. The secondary coil is mounted to the object in noncontact with the primary coil for receiving power supplied from the primary coil. The controller is operable to detect the power received by the secondary coil and also to determine whether or not an abnormality is present in the object based on the detected power.
    Type: Application
    Filed: July 25, 2011
    Publication date: December 29, 2011
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Yuichi Taguchi, Tsuyoshi Koike, Atsushi Yamaguchi
  • Patent number: 8058892
    Abstract: A radiofrequency contactor includes a testing circuit board having a dielectric substrate, a lower ground conductor on a lower surface of the dielectric substrate, and a radiofrequency signal wiring conductor on an upper surface of the dielectric substrate, a radiofrequency signal pin contactor located on the upper surface of the dielectric substrate and connected to the radiofrequency signal wiring conductor, a ground block located on the upper surface of the dielectric substrate and spaced apart from the radiofrequency signal wiring conductor and the radiofrequency signal pin contactor, and a first side ground conductor and a second side ground conductor provided on the upper surface of the dielectric substrate and spaced apart from the radiofrequency signal wiring conductor and the radiofrequency signal pin contactor.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: November 15, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kunihiro Satou, Tomoyuki Kamiyama
  • Patent number: 8058887
    Abstract: A probe test card assembly for testing a device under test includes interposer probes to connect a printed circuit board to a substrate. The probe test card assembly includes a printed circuit board, a substrate and a substrate holder. A plurality of test probes is connected to the substrate for making electrical contact with the device under test. A plurality of interposer probes is attached to the substrate for providing electrical connections between the substrate and the printed circuit board. The substrate holder holds the substrate in position with respect to the printed circuit board so that the interposer probes contact the printed circuit board. The interposer probes may be arranged in interposer probe groups to facilitate maintenance and replacement of the interposer probes. Hardstop elements may also be used to protect the interposer probes.
    Type: Grant
    Filed: January 23, 2008
    Date of Patent: November 15, 2011
    Assignee: SV Probe Pte. Ltd.
    Inventor: Bahadir Tunaboylu
  • Patent number: 8049524
    Abstract: A method for detecting component defects of an analog signal processing circuit, especially for a measurement transmitter. A test signal TS is generated at a first test point TP1 and an associated response signal RS tapped at a second test point TP2 and evaluated in a digital unit. In the evaluation, individual amplitude values of the response signal RS are compared with predetermined, desired values. In the case of significant deviations, a defect report is generated.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: November 1, 2011
    Assignee: Endress + Hauser Conducta Gesellschaft für Mess-und Regeltechnik mbH + Co. KG
    Inventors: Martin Gehrke, Friedrich Füβ
  • Patent number: 8049510
    Abstract: Multiple embodiments relate to a method for detecting a fault on a data line in a bus system in a two-line data network having at least two control units. A data signal is emitted by a transmitter-receiver unit on the two data lines as a differential voltage signal that includes a defined quiescent current. The data lines are mutually connected through a resistance bridge for detecting the middle voltage. The middle voltage is detected directly by a microcontroller after a low-pass filter or as a digital value after an analog-to-digital conversion. The result is displayed and/or stored. A circuit arrangement for implementing the method is also provided.
    Type: Grant
    Filed: July 14, 2009
    Date of Patent: November 1, 2011
    Assignee: Lear Corporation GmbH
    Inventor: Matthias Queck
  • Patent number: 8049455
    Abstract: Specific anomalies and details of failures as well as measures thereagainst are described that might possibly occur in electric power converters that drive and control permanent-magnet synchronous motors. An electric power converter capable of stable operation has a protective function of taking proper measures against such failures that might possibly occur.
    Type: Grant
    Filed: October 19, 2006
    Date of Patent: November 1, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventor: Hidetoshi Kitanaka
  • Patent number: 8045302
    Abstract: A compressor monitoring system includes current and voltage monitors, current and voltage averaging modules, a control module, and a switch. The current monitor measures a current drawn by a motor of a compressor. The current averaging module generates first and second average current values based on the current measured by the current monitor. The voltage monitor measures a utility power voltage. The voltage averaging module generates first and second average voltage values based on the voltage measured by the voltage monitor. The control module selectively generates a fault signal when a first ratio is greater than a first predetermined threshold and a second ratio is less than a second predetermined threshold. The first ratio is based on the first and second average current values. The second ratio is based on the first and second average voltage values. The switch deactivates the motor when the fault signal is generated.
    Type: Grant
    Filed: February 19, 2009
    Date of Patent: October 25, 2011
    Assignee: Emerson Climate Technologies, Inc.
    Inventors: Nagaraj Jayanth, George Ramayya
  • Patent number: 8040096
    Abstract: In a rotary electric system, a switch member includes at least one of a first switch and a second switch. The first switch is connected between a neutral point of multiphase stator windings and a high-side electrode of a direct current power source. The second switch is connected between the neutral point and a low-side electrode of the direct current power source. A controller works to turn the switch member off and on thereby switching control of the multiphase inverter between full-wave driving mode and half-wave driving mode. The full-wave driving mode allows the controller to drive all of the high-side and low-side switching elements per phase of the multiphase stator windings. The half-wave driving mode allows the controller to drive any one of the high-side switching element and the low-side switching element per phase of the multiphase stator windings.
    Type: Grant
    Filed: October 10, 2008
    Date of Patent: October 18, 2011
    Assignee: Denso Corporation
    Inventor: Makoto Taniguchi