Amplitude Control Patents (Class 327/306)
  • Patent number: 8816746
    Abstract: An integrated circuit with multi-functional parameter setting and a multi-functional parameter setting method of the integrated circuit are provided. The multi-functional parameter setting method includes following steps: providing the integrated circuit which includes a switch unit and a multi-functional pin that is coupled to an external setting unit, sensing a programmable reference voltage of the external setting unit through one operation of the switch unit and executing a first function setting according to the programmable reference voltage, and sensing a programmable reference current of the external setting unit through another operation of the switch unit and executing a second function setting according to the programmable reference current.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: August 26, 2014
    Assignee: uPI Semiconductor Corp.
    Inventors: Wei-Jhih Wen, Ting-Hung Wang, Sheng-Hsuan Wang, Wei-Ling Chen
  • Patent number: 8816745
    Abstract: An equalizer circuitry that includes both inductor based and non-inductor based equalizer stages is provided. In one implementation, the equalizer circuitry includes a first equalizer circuitry including a first inductor based equalizer stage and a first non-inductor based equalizer stage coupled to the first inductor based equalizer stage. In one implementation, the equalizer circuitry further includes a second equalizer circuitry including a plurality of inductor based equalizer stages, where the plurality of inductor based equalizer stages includes the first inductor based equalizer stage. In one implementation, the first equalizer circuitry further includes a second inductor based equalizer stage coupled to the first inductor based equalizer stage and the first non-inductor based equalize stage.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: August 26, 2014
    Assignee: Altera Corporation
    Inventors: Sangeeta Raman, Tim Tri Hoang
  • Patent number: 8818005
    Abstract: A switch controller is provided that uses one or more capacitors to generate a slow turn on/slow turn off switch control signals to suppress audible switching noise in an audio switch. In some embodiments, an analog inverter and a capacitor are used to generate the switch control signals, while in other embodiments two capacitors are used to generate the switch control signals. To conserve power between switching states, routing logic is provided that ties the switch control signals to respective voltage rails and disables selected portions of the switch controller.
    Type: Grant
    Filed: May 17, 2011
    Date of Patent: August 26, 2014
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Tyler Daigle, Julie Stultz
  • Patent number: 8811919
    Abstract: Apparatus for generating a first signal (e.g., a pulse) including a current source adapted to generate a current based on a second signal that defines an amplitude of the current and a third signal that defines the timing of an amplitude change of the current, and an impedance element through which the current flows to generate the first signal. The impedance element may comprise a resonator having a resonant frequency approximate the center of the first signal frequency spectrum. An LO may be used to generate the third signal to control the timing of the amplitude change of the current. A detector may enable the current source in response to detecting a defined steady-state condition of the LO clock signal, and may disable the current source in response to the completion of the first signal. A controller may generate the second signal to control the current amplitude so as to perform power control and/or other functions.
    Type: Grant
    Filed: September 11, 2009
    Date of Patent: August 19, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Anthony F. Segoria, Jorge A. Garcia
  • Patent number: 8803563
    Abstract: Disclosed are driving control methods and circuits for quasi-resonant control of a main power switch of a switching power supply. In one embodiment, a driving control circuit can include: (i) a clamp circuit coupled to a gate of the main power switch, where the clamp circuit is configured to clamp a voltage of the gate to a clamping voltage that is greater than a threshold voltage of the main power switch; (ii) a valley voltage detection circuit configured to activate a valley control signal when a drain-source voltage of the main power switch is at a resonance valley level; and (iii) a source voltage control circuit configured to reduce a voltage of a source of the main power switch to turn on the main power switch in response to the valley control signal being activated.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: August 12, 2014
    Assignee: Silergy Semiconductor Technology (Hangzhou) Ltd.
    Inventors: Jian Deng, Chen Zhao, Qiukai Huang
  • Publication number: 20140218095
    Abstract: The present disclosure presents a signal regulation device for an oxygen sensor which features a voltage regulation module connected between an automobile system and an oxygen sensor in series through an input module and an output module, changing initial voltage generated by the oxygen sensor, transmitting regulated voltage to the automobile system via the output module, and interfering with a catalytic converter for processed oxygen content to be detected by the oxygen sensor.
    Type: Application
    Filed: January 28, 2014
    Publication date: August 7, 2014
    Applicant: JIM TECHNOLOGY CO., LTD.
    Inventor: CHENG HSING CHIEN
  • Patent number: 8797084
    Abstract: A method and system are disclosed for calibrating a mid-voltage node in an integrated circuit including an input-output circuit having charge-recycling stacked voltage domains including at least first and second voltage domains. In one embodiment, the method comprises transmitting data through the input-output circuit, including transmitting a first portion of the data across the first voltage domain, and transmitting a second portion of the data across the second voltage domain. The method further comprises measuring a specified characteristic of the data transmitted through the input-output circuit; and based on the measured specified characteristic, adjusting a voltage of said mid-voltage node to a defined value. The voltage of the mid-voltage node may be adjusted to accomplish a number of objectives, for example, to achieve a desired trade-off between power and performance, or so that the two voltage domains have the same performance.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: August 5, 2014
    Assignee: International Business Machines Corporation
    Inventors: Daniel Friedman, Yong Liu, Jose A. Tierno
  • Publication number: 20140210537
    Abstract: An electronic device is powered by a first power supply and connected to an external device powered by a second power supply. The electronic device comprises a master controller, a conversion module, and a detection module. The master controller outputs first information. The conversion module converts the first information into second information based on a first voltage from the first power supply and a second voltage from the second power supply to control the external device to execute corresponding functions. The detection module is connected with the first power supply and the conversion module, and generates a pull-up voltage when the voltage of the second power supply is in an abnormal state. The conversion module further converts the first information into a second information based on the voltage of the first power supply and the pull-up voltage. The pull-up voltage is larger than the first voltage.
    Type: Application
    Filed: September 6, 2013
    Publication date: July 31, 2014
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.
    Inventors: ZHI-GANG LIU, YI-HSIANG KAO
  • Patent number: 8791652
    Abstract: A signal shaping circuit that shapes a drive signal and includes a main-signal amplifying circuit that amplifies the drive signal; a preemphasis generating circuit that symmetrically emphasizes a rising portion and a falling portion of the drive signal; a current source that is provided in the main-signal amplifying circuit; and a condenser that couples the main-signal amplifying circuit and the preemphasis generating circuit.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: July 29, 2014
    Assignee: Fujitsu Limited
    Inventors: Hideki Oku, Yukito Tsunoda
  • Patent number: 8779826
    Abstract: An electronic device is described, the device including a first circuit arranged to transfer a signal with a first predetermined phase shift, a second circuit, connected in series with the first circuit, arranged to transfer a signal with a second predetermined phase shift, and a resistance connected in parallel with the first and second circuits, wherein the first circuit includes a first capacitance connected between a first pair of nodes, a second capacitance connected between a second pair of nodes, and a first transformer having a first winding connected between the first pair of nodes and a second winding connected between the second pair of nodes.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: July 15, 2014
    Assignee: Cambridge Silicon Radio Limited
    Inventors: Simon Chang, Philip Macphail
  • Patent number: 8766939
    Abstract: A mode-configurable amplifier comprises a single-ended input for receiving a received signal from a capacitive touch panel, a differential output operable to carry a differential processed signal to a subsequent processing stage, and processing circuitry in communication with the single ended input and the differential output. The processing circuitry comprises mode selection inputs and mode selection circuitry in communication with the mode selection inputs. The mode selection circuitry is operable to configure the processing circuitry into a current operating mode selected from a high-pass filter mode, bandpass filter mode, and a trans-capacitive gain mode. The high-pass filter mode is operable to high-pass filter the received signal to obtain the differential processed signal. The bandpass filter mode is operable to bandpass filter the received signal to obtain the differential processed signal. The wideband gain mode is operable to amplify the received signal to obtain the differential processed signal.
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: July 1, 2014
    Assignee: Broadcom Corporation
    Inventors: David Amory Sobel, Sumant Ranganathan, Xin Dai, Fang Lin
  • Publication number: 20140159794
    Abstract: A method for utilizing heat includes steps: converting heat to electrical power, and converting the electrical power to a PWM voltage signal to power a function module. Obtaining an input voltage of the function module and comparing the input voltage with a reference voltage. Increasing a duty cycle of the PWM voltage signal when comparing the input voltage is grater than the reference voltage. And decreasing a duty cycle of the PWM voltage signal when comparing the input voltage is less than the reference voltage.
    Type: Application
    Filed: October 25, 2013
    Publication date: June 12, 2014
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: SEN-LUNG HUANG
  • Patent number: 8736343
    Abstract: A logic signal isolator comprising a transformer having a primary winding and a secondary winding; a transmitter circuit which drives said primary winding in response to a received logic signal, such that in response to a first type of edge in the logic signal, a signal of a first predetermined type is supplied to the primary winding and in response to a second type of edge in the logic signal, a signal of a second predetermined type is supplied to said primary winding, the primary winding and the transmitter being referenced to a first ground; and the secondary winding being referenced to a second ground which is galvanically isolated from the first ground and said secondary winding supplying to a receiver circuit signals received in correspondence to the signals provided to the primary winding, the receiver reconstructing the received logic signal from the received signals.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: May 27, 2014
    Assignee: Analog Devices, Inc.
    Inventors: Baoxing Chen, Geoffrey Haigh
  • Patent number: 8736344
    Abstract: Voltage controlled variable attenuators are described that are configured to be coupled to a transmission path to furnish variable attenuation of a signal, such as a radio frequency signal. In one or more implementations, the voltage controlled variable attenuator includes at least one transistor. The transistor has an open configuration for at least substantially preventing the flow of current through the transistor, and a closed configuration for at least partially allowing the flow of current through the transistor. The variable attenuator also includes a resistive component coupled to the transistor, and configured to couple to the transmission path. The resistive component is configured to at least partially mitigate non-linear effect when the transistor transitions from the open configuration to the closed configuration.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: May 27, 2014
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Joel D. Birkeland, Robert G. Meyer
  • Publication number: 20140132325
    Abstract: A control circuit for use with a four terminal sensor, the sensor having first and second drive terminals and first and second measurement terminals, the control circuit arranged to drive at least one of the first and second drive terminals with an excitation signal, to sense a voltage difference between the first and second measurement terminals, and control the excitation signal such that the voltage difference between the first and second measurement terminals is within a target range of voltages, and wherein the control circuit includes N poles in its transfer characteristic and N?1 zeros in its transfer characteristic such that when a loop gain falls to unity the phase shift around a closed loop is not substantially 2? radians or a multiple thereof, where N is greater than 1.
    Type: Application
    Filed: January 17, 2014
    Publication date: May 15, 2014
    Applicant: ANALOG DEVICES, INC.
    Inventors: Colin LYDEN, Donal BOURKE, Dennis A. DEMPSEY, Dermot G. O'KEEFFE, Patrick KIRBY
  • Publication number: 20140132324
    Abstract: An integrated circuit with multi-functional parameter setting and a multi-functional parameter setting method of the integrated circuit are provided. The multi-functional parameter setting method includes following steps: providing the integrated circuit which includes a switch unit and a multi-functional pin that is coupled to an external setting unit, sensing a programmable reference voltage of the external setting unit through one operation of the switch unit and executing a first function setting according to the programmable reference voltage, and sensing a programmable reference current of the external setting unit through another operation of the switch unit and executing a second function setting according to the programmable reference current.
    Type: Application
    Filed: March 1, 2013
    Publication date: May 15, 2014
    Applicant: uPI Semiconductor Corp.
    Inventors: Wei-Jhih Wen, Ting-Hung Wang, Sheng-Hsuan Wang, Wei-Ling Chen
  • Publication number: 20140125395
    Abstract: A communication circuit facilitating communication between a first equipment and a second equipment including a conversion circuit, an input port, an output port, and a communication port is disclosed. The conversion circuit converts an input signal to a first intermediate signal, and converts a second intermediate signal to an output signal. The input port inputs the input signal to the first conversion circuit. The output port outputs the output signal to the control unit. The communication port inputs the second intermediate signal to the conversion circuit, and outputs the first intermediate signal to the second equipment. A voltage of the first intermediate signal is determined based on a voltage of a power source if the first intermediate signal is logic high, and a voltage of the second intermediate signal is determined based on the voltage of the power source if the second intermediate signal is logic high.
    Type: Application
    Filed: January 10, 2014
    Publication date: May 8, 2014
    Applicant: O2MICRO INC.
    Inventors: Wei Zhang, Jiulian Dai, Wenhua Cui
  • Patent number: 8717207
    Abstract: A system for processing signals includes an original wave outputting module, a signal sampling module and a signal processing module. The signal processing module includes an SCM, an FGPA chip and an amplifier electrically connected to the SCM. The original wave outputting module outputs an originating wave. The signal sampling module samples the wave, and outputs a plurality of signals. The signal processing module receives the plurality of signals, and outputs an amplified wave. The SCM has a predetermined wave frequency value and a predetermined wave amplitude value. The FGPA chip generates digital signals according to the predetermined wave frequency value. The amplifier amplifies the digital signals according to the predetermined wave amplitude value.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: May 6, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventor: Kang-Bin Wang
  • Patent number: 8710867
    Abstract: An auto-mute control circuit is disclosed. The auto-mute control circuit includes an analog amplifier, a detecting circuit and a direct-current (DC) level adjusting circuit. The analog amplifier receives an input signal and outputs a sensing voltage signal accordingly. The detecting circuit compares a common-mode voltage received with the sensing voltage signal received and outputs a comparison signal accordingly. The DC adjusting circuit receives the comparison signal and outputs an Up-Down digital signal, a fine tune digital signal and a rough tune digital signal, so that a sensing DC level is equal to the common-mode voltage.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: April 29, 2014
    Assignee: Anpec Electronics Corporation
    Inventor: Ming-Huang Chang
  • Publication number: 20140103894
    Abstract: A maximum power point tracking controller includes an input port for electrically coupling to an electric power source, an output port for electrically coupling to a load, a control switching device, and a control subsystem. The control switching device is adapted to repeatedly switch between its conductive and non-conductive states to transfer power from the input port to the output port. The control subsystem is adapted to control switching of the control switching device to regulate a voltage across the input port, based at least in part on a signal representing current flowing out of the output port, to maximize a signal representing power out of the output port.
    Type: Application
    Filed: October 16, 2012
    Publication date: April 17, 2014
    Applicant: VOLTERRA SEMICONDUCTOR CORPORATION
    Inventors: Michael D. McJimsey, Anthony J. Stratakos, Ilija Jergovic, Xin Zhang, Kaiwei Yao, Vincent W. Ng, Phong T. Nguyen, Artin Der Minassians
  • Patent number: 8686781
    Abstract: A circuit includes a first node, a second node, a pull-up circuit selectively coupled to the first node or the second node, a pull-down circuit selectively coupled to the first node or the second node, and a resistive circuit. The circuit is configured to operate in a full-swing mode or in a de-emphasis mode based on an electrical coupling of the resistive circuit between the first node and the second node.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: April 1, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Tsung-Hsin Yu
  • Patent number: 8686779
    Abstract: The invention concerns in general measurement of the transfer function of linear time invariant systems, more particular the calibration of such systems based on a measured transfer function. According to a first aspect the present invention an arrangement for measuring the transfer function of a linear time-invariant system is disclosed. According to a second aspect of the present invention the arrangement is implemented into a linear time-invariant circuitry having a transfer function representing the amplitude and phase characteristic of the circuitry, where by means of the arrangement for measuring the transfer function the transfer function can be optimized in accordance with certain criteria on-the-fly, i.e. in or before operation of the circuit. Finally, an effective and simple method for measuring of the transfer function of a linear time-invariant system together with the use or application of the method is shown.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: April 1, 2014
    Assignee: NXP, B.V.
    Inventors: Dennis Jeurissen, Gerben Willem De Jong, Jan Van Sinderen
  • Publication number: 20140084982
    Abstract: Various embodiments of circuits configured to improve second order harmonic distortion of Metal Oxide Semiconductor (MOS) transistors operating in linear region are provided. In one embodiment, a circuit includes an averaging circuit configured to average signals at a drain and a source of a MOS transistor and provide the averaged signal to a gate of the MOS transistor, and one or more current sources coupled with the gate; the circuit is configured to vary voltage at the gate so as to vary a resistance of the MOS transistor. The averaging circuit comprises a first MOS circuit coupled between the drain and the gate, a first capacitor coupled in parallel to the first MOS circuit between the drain and the gate, a second MOS circuit coupled between the source and the gate, and a second capacitor coupled in parallel to the second MOS circuit between the source and the gate.
    Type: Application
    Filed: September 26, 2012
    Publication date: March 27, 2014
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Shagun Dusad, Visvesvaraya Pentakota
  • Patent number: 8674743
    Abstract: In one embodiment, an apparatus includes an amplifier configured to receive an asymmetric signal. A first resistance is coupled between an input node and an output node of the amplifier. A second resistance is coupled to the input node of the amplifier. A first switch is configured to be controlled during a first interval to couple the second resistance to a positive resistance to increase a gain of the amplifier to correct the asymmetric signal. The gain is a function of the first resistance and a combination of the second resistance and the positive resistance. A second switch is configured to be controlled during a second interval to couple the second resistance to a negative resistance to decrease the gain of the amplifier to correct the asymmetric signal. The gain is a function of the first resistance and a combination of the second resistance and the negative resistance.
    Type: Grant
    Filed: February 15, 2013
    Date of Patent: March 18, 2014
    Assignee: Marvell International Ltd.
    Inventors: Qiang Tang, Bo Wang
  • Patent number: 8674742
    Abstract: A second driver is provided in addition to a first driver outputting an output signal in accordance with a voltage of an input signal. When the output signal changes from a first voltage level to a second voltage level in accordance with a voltage change of the input signal, a control part controls the second driver to assist the signal change during a period from a change start time until the output signal exceeds a third voltage level. The control part controls the second driver to suppress the signal change during a period from the time when the output signal exceeds the third voltage level until it reaches the second voltage level.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: March 18, 2014
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Atsuya Ohashi, Koji Kimura
  • Patent number: 8670335
    Abstract: Reduced power transmission is described. In embodiments, networked devices communicate via a network connection. A characteristic of the network connection between the networked devices can be determined, and an output amplitude of a signal that is indicative of the communications between the network devices can be adjusted based on the characteristic of the network connection. Power consumption that is utilized for the communications between the network devices is reduced based on the adjustment of the output amplitude of the signal.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: March 11, 2014
    Assignee: Marvell World Trade Ltd.
    Inventors: Ozdal Barkan, Tak-Lap Tsui
  • Publication number: 20140062568
    Abstract: A differential output buffer includes first and third switches and second and fourth switches which are connected in series respectively between a first voltage source and a current source, and a replica circuit includes a second voltage source which is equivalent to a first voltage source. A current control circuit controls a current flowing to the current source in such a manner that a voltage of a third node between two resistive elements connected in series between a first node between the first and third switches and a second node between the second and fourth switches and having an equal resistance value is equal to a reference voltage, for example, and a voltage control circuit generates a control signal in such a manner that a voltage of any node excluding an output terminal of the second voltage source in the current path is equal to a second reference voltage.
    Type: Application
    Filed: August 29, 2013
    Publication date: March 6, 2014
    Applicant: MegaChips Corporation
    Inventor: Yuuki NISHIZAWA
  • Publication number: 20140062567
    Abstract: A method for increasing the accuracy of a time-domain apparatus comprising the following steps: initiating a periodic oscillation with the time-domain apparatus; measuring time intervals between trigger events during each oscillation, wherein the trigger events correspond to the oscillation passing known values; detecting a perturbation to the oscillation by monitoring changes in the time intervals between trigger events; and adjusting a parameter of the oscillation based on the perturbation such that measurement error is reduced.
    Type: Application
    Filed: June 18, 2013
    Publication date: March 6, 2014
    Inventors: Richard L. Waters, Paul David Swanson
  • Publication number: 20140063982
    Abstract: Described herein is an apparatus for dynamically adjusting a voltage reference level for optimizing an I/O system to achieve a certain performance metric. The apparatus comprises: a voltage reference generator to generate a voltage reference; and a dynamic voltage reference control unit, coupled with the voltage reference generator, to dynamically adjust a level of the voltage reference in response to an event. The apparatus is used to perform the method comprising: generating a voltage reference for an input/output (I/O) system; determining a worst case voltage level of the voltage reference; dynamically adjusting, via a dynamic voltage reference control unit, the voltage reference level based on determining the worst case voltage level; and computing a center of an asymmetrical eye based on the dynamically adjusted voltage reference level.
    Type: Application
    Filed: November 5, 2013
    Publication date: March 6, 2014
    Inventors: Christopher P. MOZAK, Kevin B. MOORE, John V. LOVELACE, Theodore Z. SCHOENBORN, Bryan L. SPRY, Christopher E. YUNKER
  • Publication number: 20140055187
    Abstract: The clock circuit of an integrated circuit operates with variations such as temperature, ground noise, and power noise. Various aspects of an improved clock integrated circuit address one or more of the variations in temperature, ground noise, and power noise.
    Type: Application
    Filed: November 1, 2013
    Publication date: February 27, 2014
    Applicant: Macronix International Co., Ltd.
    Inventors: Chung-Kuang Chen, Chun-Hsiung Hung, Han-Sung Chen
  • Patent number: 8659015
    Abstract: A semiconductor device includes an antenna functioning as a coil, a capacitor electrically connected to the antenna in parallel, a passive element forming a resonance circuit with the antenna and the capacitor by being electrically connected to the antenna and the capacitor in parallel, a first field effect transistor controlling whether the passive element is electrically connected to the antenna and the capacitor in parallel or not, and a memory circuit. The memory circuit includes a second field effect transistor which includes an oxide semiconductor layer where a channel is formed and in which a data signal is input to one of a source and a drain. The gate voltage of the first field effect transistor is set depending on the voltage of the other of the source and the drain of the second field effect transistor.
    Type: Grant
    Filed: February 23, 2012
    Date of Patent: February 25, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Seiichi Yoneda
  • Publication number: 20140043084
    Abstract: In a signal electric potential conversion circuit, a capacitor has one end receiving an input signal CIN, and the other end connected to a termination node N1. A conversion circuit receives a potential IN of the termination node N1. A connection element is provided between a power supply VDDH and the termination node N1, and an impedance of the connection element is reduced when the potential IN is lower than a first potential. Another connection element is provided between the termination node N1 and a ground power supply, and an impedance of the connection element is reduced when the potential IN is higher than a second potential.
    Type: Application
    Filed: October 17, 2013
    Publication date: February 13, 2014
    Applicant: PANASONIC CORPORATION
    Inventor: Toru IWATA
  • Patent number: 8643425
    Abstract: An embedded system includes a level shifter circuit for generating a forward supply voltage level in a predefined range. A sense circuit senses a core supply voltage level of the embedded system and compares the sensed core supply voltage level with a predetermined minimum core supply voltage level needed to generate the forward supply voltage. A reset circuit maintains one or more input nodes and one or more internal nodes of the level shifter circuit at a predetermined voltage level when the core supply voltage level is less than the predetermined minimum core supply voltage level.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: February 4, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Nidhi Chaudhry, Parul K. Sharma, Amit K. Srivastava
  • Patent number: 8643423
    Abstract: A communication circuit facilitating communication between a first equipment and a second equipment including a conversion circuit, an input port, an output port, and a communication port is disclosed. The conversion circuit converts an input signal to a first intermediate signal, and converts a second intermediate signal to an output signal. The input port inputs the input signal to the first conversion circuit. The output port outputs the output signal to the control unit. The communication port inputs the second intermediate signal to the conversion circuit, and outputs the first intermediate signal to the second equipment. A voltage of the first intermediate signal is determined based on a voltage of a power source if the first intermediate signal is logic high, and a voltage of the second intermediate signal is determined based on the voltage of the power source if the second intermediate signal is logic high.
    Type: Grant
    Filed: August 6, 2012
    Date of Patent: February 4, 2014
    Assignee: O2Micro Inc.
    Inventors: Wei Zhang, Jiulian Dai, Wenhua Cui
  • Publication number: 20140028248
    Abstract: A trimming circuit, installed in a semiconductor integrated circuit that has multiple different target values, the trimming circuit to adjusts circuit characteristics of the semiconductor integrated circuit to make output values of the semiconductor integrated circuit correspond to multiple desired target values and includes a setting-value table memory to store multiple setting value groups respectively containing different combinations of multiple setting values related to the multiple target values; a trimming cell circuit to store first selection information indicating one group of the multiple setting-value groups stored in the setting-value table memory; and a selector to select one group from the multiple setting-value group stored in the setting-value table memory based on the first selection information, and select one setting value from multiple setting values in the selected setting-value group based on external second selection information to output the selected setting value.
    Type: Application
    Filed: July 23, 2013
    Publication date: January 30, 2014
    Applicant: Ricoh Company, Ltd
    Inventor: Tatsuya Irisawa
  • Patent number: 8629521
    Abstract: A semiconductor device includes a Hall element, which is switched between a first and second mode. In the first mode, connection A between a first and second resistor and connection C between a third and fourth resistor are set to Vcc or GND. Connection D between the first and fourth resistor and connection B between the second and third resistor are set as output terminals. In the second mode, D and B are set to Vcc or GND and A and C are set as output terminals. When a first line placed along the second resistor and connected to A is set at Vcc in the first mode, a second line placed along the fourth resistor and connected to D is set at Vcc in the second mode. When the first line is set at GND in first mode, the second line is set at GND in the second mode.
    Type: Grant
    Filed: August 23, 2011
    Date of Patent: January 14, 2014
    Assignee: ON Semiconductor Trading, Ltd.
    Inventors: Takashi Ogawa, Hironori Terazawa, Akihiro Hasegawa, Takashi Naruse, Yuuhei Mouri
  • Publication number: 20140002171
    Abstract: Embodiments include an apparatus, system, and method related to a body-contacted partially depleted silicon on insulator (PDSOI) transistor that may be used in a switch circuit. In some embodiments, the switch circuit may include a discharge transistor to provide a discharge path for a body of a switch transistor. Other embodiments may be described and claimed.
    Type: Application
    Filed: June 27, 2012
    Publication date: January 2, 2014
    Applicant: TRIQUINT SEMICONDUCTOR, INC.
    Inventor: George Nohra
  • Patent number: 8587372
    Abstract: A multi-input differential amplifying device of the present invention includes: a differential amplifier having an inverting input terminal and a non-inverting input terminal; and an input portion configured to apply a first input voltage to a first input terminal that is one of the inverting input terminal and the non-inverting input terminal and apply a second input voltage to a second input terminal that is the other input terminal, the first input voltage corresponding to first input signals that are a plurality of input signals for the first input terminal, the second input voltage corresponding to a second input signal that is one input signal for the second input terminal. The input portion is configured to correct an offset voltage between the first input voltage and the second input voltage.
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: November 19, 2013
    Assignee: Panasonic Corporation
    Inventors: Kazuhito Kimura, Yasunori Yamamoto
  • Publication number: 20130293276
    Abstract: Aspects of the disclosure provide an integrated circuit (IC). The IC includes an input interface and a controller. The input interface is configured to receive an input signal providing information for controlling a supply voltage based on a performance characteristic of another IC. The controller is configured to generate an output signal for controlling the supply voltage based on a combination of the input signal and a performance characteristic of the IC.
    Type: Application
    Filed: May 1, 2013
    Publication date: November 7, 2013
    Inventors: Michael MOSHE, Reuven Ecker, Ido Bourstein
  • Patent number: 8570090
    Abstract: Electronic component protection power supply clamp circuits comprising a plurality of p-type channel metal-oxide-semiconductor (PMOS) and n-type channel metal-oxide-semiconductor (NMOS) transistors are described. These clamp circuits use a feedback latching circuit to retain an electrostatic discharge (ESD)-triggered state and efficiently conduct ESD current that has been diverted into the power supply, in order to dissipate ESD energy. The feedback latching circuit also maintains a clamp transistor in its off state if the clamp circuit powers up untriggered, thus enhancing the clamp circuit's immunity to noise during normal operation. Passive resistance initialization of key nodes to an untriggered state, as well as passive resistance gate input loading of a large ESD clamping transistor, further enhances the clamp circuit's immunity to false triggering.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: October 29, 2013
    Assignee: Advanced Micro Devices, Inc.
    Inventors: William B. Gist, III, Warren Anderson
  • Patent number: 8570089
    Abstract: An embodiment of a circuit for driving an under-damped system comprises first and second signal generators. The first generator is operable to generate a first drive signal. And the second generator is operable to receive the first drive signal and a second drive signal, and to generate from the first and second drive signals a system drive signal having a first amplitude for a first duration and having a second amplitude after the first duration, the system drive signal operable to cause the under-damped system to operate in a substantially damped manner. Either or both of the first and second generators may be programmable such that one may adjust the response of any under-damped system by generating an appropriate drive signal instead of by physically modifying the system itself.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: October 29, 2013
    Assignee: STMicroelectronics R&D Co. Ltd. (Shanghai)
    Inventors: Sarah Gao, Jianhua Zhao, Wadeo Ou
  • Publication number: 20130241620
    Abstract: Provided is a semiconductor device with an output circuit in which a variation of a common voltage is suppressed in an idling mode and in a normal mode. The output circuit provided in the semiconductor device includes a first termination resistor and a second termination resistor and a drive circuit which flows current through the termination resistors. The output circuit is configured so as to be able to adjust the value of current which flows through the first termination resistor and the second termination resistor or the value of resistance of the first termination resistor and the second termination resistor.
    Type: Application
    Filed: December 20, 2012
    Publication date: September 19, 2013
    Applicant: Renesas Electronics Corporation
    Inventors: Shigeyuki Suzuki, Masato Suzuki
  • Publication number: 20130207710
    Abstract: This invention describes a method by which the output power of a circuit or system at any point can be efficiently and cost effectively sampled in a simple and broadband fashion for processing in a closed loop system for applications such as power level control in very broadband circuits. A divider circuit consisting of a selection of passive lumped elements is used to create a very broadband means of sampling the RF power level at any point in a transmission line. Unlike prior art schemes of this nature, this circuit does not rely upon extremely accurate element values and minimization of parasitic reactances. Used in conjunction with a balanced detector-logarithmic or other amplifier combination this invention result in a very broadband low cost simplified realization of the traditional costly bandwidth limited directional coupler-detector combination.
    Type: Application
    Filed: February 11, 2012
    Publication date: August 15, 2013
    Inventor: Anand Ganesh Basawapatna
  • Publication number: 20130176269
    Abstract: A mode-configurable amplifier comprises a single-ended input for receiving a received signal from a capacitive touch panel, a differential output operable to carry a differential processed signal to a subsequent processing stage, and processing circuitry in communication with the single ended input and the differential output. The processing circuitry comprises mode selection inputs and mode selection circuitry in communication with the mode selection inputs. The mode selection circuitry is operable to configure the processing circuitry into a current operating mode selected from a high-pass filter mode, bandpass filter mode, and a trans-capacitive gain mode. The high-pass filter mode is operable to high-pass filter the received signal to obtain the differential processed signal. The bandpass filter mode is operable to bandpass filter the received signal to obtain the differential processed signal. The wideband gain mode is operable to amplify the received signal to obtain the differential processed signal.
    Type: Application
    Filed: March 2, 2012
    Publication date: July 11, 2013
    Applicant: Broadcom Corporation
    Inventors: David Amory Sobel, Sumant Ranganathan, Xin Dai, Fang Lin
  • Publication number: 20130163123
    Abstract: A circuit device includes a linear driver circuit, a pulse-width modulation driver circuit, an oscillator circuit having an output coupled to the pulse-width modulation circuit, and a feed-forward circuit coupled to the oscillator circuit, the feed-forward circuit being configured to adjust an output of the oscillator circuit so that an output of the PWM circuit substantially matches an output of the linear driver circuit.
    Type: Application
    Filed: December 23, 2011
    Publication date: June 27, 2013
    Inventor: Yoshito Otaguro
  • Publication number: 20130162317
    Abstract: A system for processing signals includes an original wave outputting module, a signal sampling module and a signal processing module. The signal processing module includes an SCM, an FGPA chip and an amplifier electrically connected to the SCM. The original wave outputting module outputs an originating wave. The signal sampling module samples the wave, and outputs a plurality of signals. The signal processing module receives the plurality of signals, and outputs an amplified wave. The SCM has a predetermined wave frequency value and a predetermined wave amplitude value. The FGPA chip generates digital signals according to the predetermined wave frequency value. The amplifier amplifies the digital signals according to the predetermined wave amplitude value.
    Type: Application
    Filed: August 20, 2012
    Publication date: June 27, 2013
    Applicants: Hon Hai Precision Industry Co., Ltd., Hong Fu Jin Precision Industy (ShenZhen) Co., Ltd.
    Inventor: KANG-BIN WANG
  • Patent number: 8457246
    Abstract: An apparatus and method for amplifying a Transmit (Tx) signal according to an Envelope Tacking (ET) scheme in a wireless communication system are provided. A transmitting end apparatus includes an envelope gain controller for controlling a gain of a digital baseband Tx signal in accordance with power control, a detector for detecting an envelope signal from the digital baseband Tx signal whose gain is controlled, and for shaping on the envelope signal, a first Digital to Analog Converter (DAC) for converting the shaped envelope signal into an analog signal, and an envelope modulator for generating a drain bias of a power amplifier that amplifies a Radio Frequency (RF) Tx signal by using the analog envelope signal. Accordingly, a digital-based ET scheme is implemented, and by using a plurality of shaping tables, efficiency of the ET scheme can be maximized in a transmitting end that uses power control.
    Type: Grant
    Filed: September 7, 2010
    Date of Patent: June 4, 2013
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Shin-Ho Kim, Hyung-Weon Park
  • Publication number: 20130135025
    Abstract: In accordance with some embodiments, the present disclosure relates to a dual mode control interface that can be used to provide both a radio frequency front end (RFFE) serial interface and a two-mode general purpose input/output (GPIO) interface within a single digital control interface die. In certain embodiments, the dual mode control interface, or digital control interface, can communicate with a power amplifier. Further, the dual mode control interface can be used to set the mode of the power amplifier.
    Type: Application
    Filed: October 23, 2012
    Publication date: May 30, 2013
    Applicant: SKYWORKS SOLUTIONS, INC.
    Inventor: Skyworks Solutions, Inc.
  • Publication number: 20130135026
    Abstract: A quasi-translator for economically producing pure, smooth translational motion with broad arcuate or error-free motion regardless of orientation, which is useful in numerous interferometer applications including spectroscopy, a Fourier modulator and a Fourier spectrometer are provided. The quasi-translator utilizes a support, an arm including a driving magnet on a first end and a driven element on a second end, an axis for rotation of the arm, a bearing system that controls the rotation of the arm about the axis, a drive coil and a drive amplifier to drive the arm in the arcuate motion. The quasi-translator may be employed in a Fourier modulator to change the optical path difference of the interferometer/quasi-translator at a substantially constant rate of change. The quasi-translator and/or Fourier modulator may be used in a Fourier spectrometer to create an optical spectrum from a light beam and/or electrical signal created from the light beam.
    Type: Application
    Filed: November 21, 2012
    Publication date: May 30, 2013
    Applicant: FTRX LLC
    Inventor: FTRX LLC
  • Publication number: 20130127512
    Abstract: Aspects of the instant disclosure are directed toward apparatuses that generate a power-related adjustment signal in response to the power signal. Digital-input-signal pads are included to communicate digital signals with a circuit external to the apparatus. Further, digital-input processing circuitry receives the digital signals from the digital-input-signal pad, and processes the received digital signals. Additionally, configuration circuitry applies the power-related adjustment signal to signals received at the digital-input-signal pad and, in response, detects the digital signals received.
    Type: Application
    Filed: May 11, 2012
    Publication date: May 23, 2013
    Inventor: Sharad Murari