Having Diverse Electrical Device Patents (Class 438/59)
  • Publication number: 20100277630
    Abstract: Pixels including a photoelectric conversion element 1, a signal transfer TFT (thin film transistor) 2 electrically connected to the photoelectric conversion element, and a reset TFT 3 electrically connected to the photoelectric conversion element and for applying a bias to the photoelectric conversion element are two-dimensionally disposed on the insulating substrate, and the photoelectric conversion element 1, signal transfer TFT 2, and reset TFT 3 are electrically connected through a common contact hole 9. A source or drain electrode of the signal transfer TFT 2 and the source or drain electrode of the reset TFT 3 are formed from a common electroconductive layer.
    Type: Application
    Filed: January 11, 2007
    Publication date: November 4, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Takamasa Ishii, Chiori Mochizuki, Minoru Watanabe
  • Patent number: 7824949
    Abstract: A method of forming a sensor array. The method includes depositing a source/drain contact layer; depositing a semiconductor layer on the source/drain contact layer; and patterning the source/drain contact layer and the semiconductor layer substantially simultaneously, wherein the patterned semiconductor layer forms part of a sensor of the sensor array.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: November 2, 2010
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Sanjiv Sambandan, William S. Wong, Rene A. Lujan, Scott J. Limb
  • Publication number: 20100264428
    Abstract: A silicon biosensor and a method of manufacturing the same are provided. The silicon biosensor includes: a light emitting layer emitting light according to injected electrons and holes and changing a wavelength of the light depending on whether a biomaterial is absorbed by the light emitting layer; an electron injection layer injecting the electrons into the light emitting layer; and a hole injection layer injecting the holes into the light emitting layer. Accordingly, it is possible to produce low price biosensors in large quantities.
    Type: Application
    Filed: May 21, 2008
    Publication date: October 21, 2010
    Inventors: Chul Huh, Kyung Hyun Kim, Jong Cheol Hong, Hyun Sung Ko, Wan Joong Kim, Gun Yong Sung, Seon Hee Park
  • Publication number: 20100267185
    Abstract: A back-illuminated type solid-state image pickup device (1041) includes read circuits (Tr1, Tr2) formed on one surface of a semiconductor substrate (1042) to read a signal from a photo-electric conversion element (PD) formed on the semiconductor substrate (1042), in which electric charges (e) generated in a photo-electric conversion region (1052c1) formed under at least one portion of the read circuits (Tr1, Tr2) are collected to an electric charge accumulation region (1052a) formed on one surface side of the semiconductor substrate (1042) of the photo-electric conversion element (PD) by electric field formed within the photo-electric conversion element (PD). Thus, the solid-state image pickup device and the camera are able to make the size of pixel become very small without lowering a saturation electric charge amount (Qs) and sensitivity.
    Type: Application
    Filed: July 1, 2010
    Publication date: October 21, 2010
    Applicant: SONY CORPORATION
    Inventors: Shin IWABUCHI, Kazuhide YOKOTA, Takeshi YANAGITA, Yasushi MARUYAMA
  • Patent number: 7816170
    Abstract: A dual-pixel full color CMOS imager comprises a two-photodiode stack including an n doped substrate, a bottom photodiode, and a top photodiode. The bottom photodiode has a bottom p doped layer at a first depth overlying the substrate and a bottom n doped layer cathode overlying the bottom p doped layer. The top photodiode has a top p doped layer overlying the bottom n doped layer and a top n doped layer cathode overlying the top p doped layer. A single photodiode including a bottom p doped layer overlies the substrate at a third depth. The third depth is less than, or equal to the first depth. A bottom n doped layer overlies the bottom p doped layer, a top p doped layer directly overlies the bottom n doped layer without an intervening layer, and a top n doped layer overlies the top p doped layer.
    Type: Grant
    Filed: October 14, 2008
    Date of Patent: October 19, 2010
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Jong-Jan Lee, Jon M. Speigle, Douglas J. Tweet
  • Publication number: 20100248410
    Abstract: There is provided a method of fabricating a semiconductor device having plural light receiving elements, and having an amplifying element, the method including: a) forming an active region on the semiconductor substrate for configuring the amplifying element; b) forming a light receiving element region on the semiconductor substrate for forming the plural light receiving elements, with the active region acting as a reference for positioning; c) implanting an impurity into the light receiving element region; d) repeating the process b) and the process c) a number of times that equals a number of diffusion layers in the light receiving element region; e) after implanting the impurity, performing a drive-in process to carry out drive in of the semiconductor substrate; and f) the process e), forming an amplifying element forming process by implanting an impurity in the active region.
    Type: Application
    Filed: March 15, 2010
    Publication date: September 30, 2010
    Applicant: OKI SEMICONDUCTOR CO., LTD.
    Inventors: Tomohiro Okamura, Masao Okihara
  • Publication number: 20100238331
    Abstract: A semiconductor device is provided as a back-illuminated solid-state imaging device. The device is manufactured by bonding a first semiconductor wafer with a pixel array in a half-finished product state and a second semiconductor wafer with a logic circuit in a half-finished product state together, making the first semiconductor wafer into a thin film, electrically connecting the pixel array and the logic circuit, making the pixel array and the logic circuit into a finished product state, and dividing the first semiconductor wafer and the second semiconductor being bonded together into microchips.
    Type: Application
    Filed: March 11, 2010
    Publication date: September 23, 2010
    Applicant: Sony Corporation
    Inventors: Taku Umebayashi, Hiroshi Takahashi, Reijiroh Shohji
  • Patent number: 7795065
    Abstract: Provided is an image sensor. The image sensor can include a first substrate comprising a pixel portion in which a readout circuitry is provided and a peripheral portion in which a peripheral circuitry is provided. An interlayer dielectric including lines can be formed on the first substrate to connect with the readout circuitry and the peripheral circuitry. A crystalline semiconductor layer can be provided on a portion of the interlayer dielectric corresponding to the pixel portion through a bonding process. The crystalline semiconductor layer can include a first photodiode and second photodiode. The first and second photodiodes can be defined by device isolation trenches in the crystalline semiconductor layer. A device isolation layer can be formed on the crystalline semiconductor layer comprising the device isolation trenches. An upper electrode layer passes through the device isolation layer to connect with a portion of the first photodiode.
    Type: Grant
    Filed: January 19, 2010
    Date of Patent: September 14, 2010
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Joon Hwang
  • Publication number: 20100225775
    Abstract: A solid-state image capturing device includes, in a semiconductor substrate, a photoelectric conversion section which performs photoelectric conversion on incident light to obtain signal charges; a pixel transistor section which outputs the signal charges generated in the photoelectric conversion section; a peripheral circuit section which is formed in the periphery of a pixel section including the photoelectric conversion section and the pixel transistor section; and isolation areas which electrically separate the photoelectric conversion section, the pixel transistor section, and the peripheral circuit section from each other. The isolation areas in the periphery of the pixel transistor section each have an insulating section formed higher than a surface of the semiconductor substrate. A first gate electrode of a transistor of the pixel transistor section is formed between the insulating sections and on the semiconductor substrate with a gate insulating film interposed therebetween.
    Type: Application
    Filed: February 24, 2010
    Publication date: September 9, 2010
    Applicant: SONY CORPORATION
    Inventors: Fumihiko Koga, Yoshiharu Kudoh
  • Publication number: 20100227427
    Abstract: To provide a solid-state imaging device able to improve light transmittance of a transparent insulation film in a light incident side of a substrate, suppress the dark current, and prevent a quantum efficiently loss, wherein a pixel circuit is formed in a first surface of the substrate and light is received from a second surface, and having: a light receiving unit formed in the substrate and for generating a signal charge corresponding to an amount of incidence light and storing it; a transparent first insulation film formed on the second surface; and a transparent second insulation film formed on the first insulation film and for retaining a charge having the same polarity as the signal charge in an interface of the first insulation film or in inside, thicknesses of the first and second insulation film being determined to obtain a transmittance higher than when using only the first insulation film.
    Type: Application
    Filed: May 14, 2010
    Publication date: September 9, 2010
    Applicant: SONY CORPORATION
    Inventors: Hideo Kanbe, Takayuki Ezaki
  • Publication number: 20100225774
    Abstract: Disclosed herein is a solid-state image pickup element, including a plurality of pixels each having a photoelectric conversion portion for converting a quantity of incident light into an electric signal, and a plurality of pixel transistors; wiring layers formed on one surface side of a semiconductor substrate having the plurality of pixels formed therein, a light made incident from a side opposite to the one surface having the wiring layers formed thereon being received by corresponding one of the photoelectric conversion portions; a scribe line formed in a periphery of a pixel portion composed of the plurality of pixels; and square-shaped termination detecting portions each having higher hardness than that of the semiconductor substrate and formed in the scribe line; wherein each of the square-shaped termination detecting portions has a side parallel with a direction of the scribe line of the semiconductor substrate.
    Type: Application
    Filed: February 4, 2010
    Publication date: September 9, 2010
    Applicant: SONY CORPORATION
    Inventors: Takayuki ENOMOTO, Keiichi NAKAZAWA
  • Patent number: 7790487
    Abstract: A method for fabricating a photo sensor on an amorphous silicon thin film transistor panel includes forming a photo sensor with a bottom electrode, a silicon-rich dielectric layer, and a top electrode, such that the light sensor has a high reliability. The fabrication method is compatible with the fabrication process of a thin film transistor.
    Type: Grant
    Filed: September 16, 2008
    Date of Patent: September 7, 2010
    Assignee: AU Optronics Corp.
    Inventors: Ching-Chieh Shih, An-Thung Cho, Chia-Tien Peng, Kun-Chih Lin
  • Publication number: 20100219349
    Abstract: Disclosed is a multi-channel array radiation detector that can provide high-definition and high-resolution CT photo-images. The radiation detector has semiconductor photo-detecting elements arranged lengthwise and breadth-wise in a lattice manner and scintillator elements arranged on them one-to-one. The scintillator elements have thin metal light-reflecting material layers formed on side surfaces of the scintillator elements, and a radiation shielding material layer composed of resin blended with heavy metal element particles is filled in between adjacent metal light-reflecting material layers.
    Type: Application
    Filed: March 13, 2006
    Publication date: September 2, 2010
    Applicant: Hitachi Metals, Ltd.
    Inventors: Shinji Furuichi, Hideo Nitta
  • Publication number: 20100219457
    Abstract: It is an object to provide an image sensor having a sufficiently-large ratio of a surface area of a light-receiving section to an overall surface area of one pixel.
    Type: Application
    Filed: February 4, 2010
    Publication date: September 2, 2010
    Inventors: Fujio Masuoka, Hiroki Nakamura
  • Publication number: 20100214457
    Abstract: A solid-state imaging device includes: a photoelectric conversion portion that receives an incident light from a back surface side of a silicon layer to perform photoelectric conversion on the incident light; and a pixel transistor portion that outputs signal charges generated in the photoelectric conversion portion towards a front surface side of the silicon layer, wherein a gettering layer having internal stress is provided on the front surface side of the silicon layer at a position to overlap the photoelectric conversion portion on a plan view layout thereof.
    Type: Application
    Filed: February 12, 2010
    Publication date: August 26, 2010
    Applicant: Sony Corporation
    Inventor: Chiaki Sakai
  • Patent number: 7781231
    Abstract: A method of manufacturing a magnetic tunnel junction device is disclosed that includes forming a trench in a substrate, depositing a conductive terminal within the trench, and depositing a magnetic tunnel junction (MTJ) structure within the trench. The MTJ structure includes a fixed magnetic layer having a fixed magnetic orientation, a tunnel junction layer, and a free magnetic layer having a configurable magnetic orientation. The fixed magnetic layer is coupled to the conductive terminal along an interface that extends substantially normal to a surface of the substrate. The free magnetic layer that is adjacent to the conductive terminal carries a magnetic domain adapted to store a digital value.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: August 24, 2010
    Assignee: QUALCOMM Incorporated
    Inventor: Xia Li
  • Patent number: 7781240
    Abstract: An integrally packaged optronic integrated circuit device (310) including an integrated circuit die (322) containing at least one of a radiation emitter and radiation receiver and having top and bottom surfaces formed of electrically insulative and mechanically protective material, at least one of the surfaces (317) being transparent to radiation, and electrically insulative edge surfaces (314) having pads.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: August 24, 2010
    Assignee: Tessera Technologies Hungary Kft.
    Inventor: Avner Badehi
  • Patent number: 7776638
    Abstract: An image sensor includes a substrate of a first conductivity type having an image area with a plurality of photosensitive sites, wherein a portion of the charge generated in response to light is collected in the pixel; and a subcollector of a second conductivity spanning the image area that collects another portion of the generated charge that would have otherwise diffused to adjacent photosensitive sites.
    Type: Grant
    Filed: October 8, 2008
    Date of Patent: August 17, 2010
    Assignee: Eastman Kodak Company
    Inventors: James P. Lavine, Eric G. Stevens
  • Publication number: 20100200895
    Abstract: Provided are a unit pixel for improving sensitivity in low illumination conditions and a method of manufacturing the unit pixel. The unit pixel includes: a photodiode generating image charges corresponding to an image signal; a transfer transistor transferring the image charges to a floating diffusion area; and a reset transistor having a terminal connected to the floating diffusion area and the other terminal applied with a power supply, wherein concentration of impurity ions implanted into the floating diffusion area is lower than concentration of impurity ions implanted into a diffusion area of the reset transistor applied with the power supply.
    Type: Application
    Filed: August 4, 2008
    Publication date: August 12, 2010
    Applicant: SILICONFILE TECHNOLOGIES INC.
    Inventor: Do-Young Lee
  • Publication number: 20100200043
    Abstract: A solar panel may include a first multi-cell thin-film photovoltaic module of a first fabrication type including a transparent support forming a front surface of the panel, a first pair of connection terminals on the transparent support, and first cells of a certain area, being on the transparent support, and being connected in series to the first pair of connection terminals. The solar panel may include a second multi-cell thin-film photovoltaic module of a second fabrication type comprising a support forming a rear surface of the panel, a second pair of connection terminals on the support, and second cells of a certain area, being on the support, and being connected in series to the second pair of connection terminals.
    Type: Application
    Filed: February 11, 2010
    Publication date: August 12, 2010
    Applicant: STMicroelectronics S.r.l.
    Inventors: Salvatore Lombardo, Salvatore Coffa
  • Publication number: 20100194943
    Abstract: In a rear surface incidence type CMOS image sensor having a wiring layer 720 on a first surface (front surface) of an epitaxial substrate 710 in which a photodiode, a reading circuit (an n-type region 750 and an n+ type region 760) and the like are disposed, and a light receiving plane in a second surface (rear surface), the photodiode and a P-type well region 740 on the periphery of the photodiode are disposed in a layer structure that does not reach the rear surface (light receiving surface) of the substrate, and an electric field is formed within the substrate 710 to properly lead electrons entering from the rear surface (light receiving surface) of the substrate to the photodiode. The electric field is realized by providing a concentration gradient in a direction of depth of the epitaxial substrate 710. Alternatively, the electric field can be realized by providing a rear-surface electrode 810 or 840 for sending a current.
    Type: Application
    Filed: April 20, 2010
    Publication date: August 5, 2010
    Applicant: SONY CORPORATION
    Inventor: Keiji MABUCHI
  • Publication number: 20100194950
    Abstract: In a rear surface incidence type CMOS image sensor having a wiring layer 720 on a first surface (front surface) of an epitaxial substrate 710 in which a photodiode, a reading circuit (an n-type region 750 and an n+ type region 760) and the like are disposed, and a light receiving plane in a second surface (rear surface), the photodiode and a P-type well region 740 on the periphery of the photodiode are disposed in a layer structure that does not reach the rear surface (light receiving surface) of the substrate, and an electric field is formed within the substrate 710 to properly lead electrons entering from the rear surface (light receiving surface) of the substrate to the photodiode. The electric field is realized by providing a concentration gradient in a direction of depth of the epitaxial substrate 710. Alternatively, the electric field can be realized by providing a rear-surface electrode 810 or 840 for sending a current.
    Type: Application
    Filed: April 19, 2010
    Publication date: August 5, 2010
    Applicant: SONY CORPORATION
    Inventor: Keiji MABUCHI
  • Publication number: 20100197066
    Abstract: A method for fabricating CMOS image sensor device, the method includes providing a semiconductor substrate having a P type impurity characteristic. The semiconductor substrate includes a surface region. The method forms a first dielectric layer having a first thickness overlying a first region of the semiconductor substrate. The method includes providing a N type impurity region in a portion of the semiconductor substrate underneath the first dielectric layer to cause formation of a photodiode device region characterized by at least the N type impurity region and the P type substrate. A second dielectric layer having a second thickness is formed in a second region of the surface region. The second dielectric layer is formed within a portion of the first region within the first thickness of the first dielectric layer. The method forms a polysilicon gate layer overlying at least the second region to form a contact member coupled to the second region.
    Type: Application
    Filed: October 27, 2008
    Publication date: August 5, 2010
    Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Jianping Yang, Hong Zhu, Jieguang Huo
  • Publication number: 20100193848
    Abstract: Provided is a stacked image sensor. Particularly, provided are a stacked image sensor including a photosensitive element portion having a photo-conductive thin film on an upper portion of a wafer where a peripheral circuit is formed and a method of manufacturing the stacked image sensor. In the stacked image sensor according to the present invention, since a wafer where a circuit is formed and a photosensitive element portion are formed in a stacked structure, a whole size of the image sensor can be reduced, and there is no optical crosstalk due to absorption of incident light to adjacent pixels. In addition, since a photo-conductive element having a high light absorbance is used, a high photo-electric conversion efficiency can be obtained. In addition, in the method of manufacturing a stacked image sensor according to the present invention, since the upper photosensitive element can be formed by using a simple low-temperature process, a production cost can be reduced.
    Type: Application
    Filed: June 9, 2008
    Publication date: August 5, 2010
    Applicant: SILICONFILE TECHNOLOGIES INC.
    Inventor: Byoung-Su Lee
  • Publication number: 20100194936
    Abstract: A solid-state image capturing device includes: a substrate; a substrate voltage source which applies a first potential to the substrate during a light reception period and applies a second potential to the substrate during a non-light reception period; and a plurality of pixels which each includes a light receiver which is formed on a front surface of the substrate and generates signal charges in accordance with received light, a storage capacitor which is formed adjacent to the light receiver and accumulates and stores signal charges generated by the light receiver, dark-current suppressors which are formed in the light receiver and the storage capacitor, an electronic shutter adjusting layer which is formed in an area facing the light receiver in the substrate and distant from the storage capacitor and which adjusts potential distribution, and a floating diffusion portion to which the signal charges accumulated in the storage capacitor are transmitted.
    Type: Application
    Filed: January 28, 2010
    Publication date: August 5, 2010
    Applicant: Sony Corporation
    Inventor: Hideo Kanbe
  • Patent number: 7763913
    Abstract: A method, apparatus, and system that provides one or more charge collecting protection regions in a pixel array, each formed below a storage region of a pixel cell, but not below at least one photosensor of one pixel of the array. The storage region includes a floating diffusion region and/or a storage gate in the pixel cell of the imaging device. The protection regions can keep stray charges from reaching the storage regions.
    Type: Grant
    Filed: December 12, 2006
    Date of Patent: July 27, 2010
    Assignee: Aptina Imaging Corporation
    Inventors: Xiaofeng Fan, Frederick Brady
  • Publication number: 20100184245
    Abstract: The method is designed for manufacturing a bolometric detector equipped with a membrane suspended above a substrate by means of heat-insulating arms fixed to the substrate by anchoring points. The membrane has a heat-sensitive thin layer with a base comprising at least a semiconducting iron oxide. The method comprises at least a step of localized reduction and/or oxidation of the thin layer of semiconducting iron oxide to modify the degree of oxidation of the iron atom of a part of the thin layer of semiconducting iron oxide.
    Type: Application
    Filed: January 12, 2010
    Publication date: July 22, 2010
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE
    Inventors: Jean-Louis OUVRIER-BUFFET, Christophe DUBARRY, Laurent PUECH
  • Patent number: 7759222
    Abstract: A method for fabricating a solid-state imaging device comprises: a step of forming a photodiode protection insulation film 6a; a step of forming a dummy protection insulation film 6c corresponding to the photodiode protection insulation film 6a both in the peripheral circuit region 1b and the scribe lane region 1c; and a step of forming an interlayer insulation film 9 for covering all three regions of a pixel region 1a in which pixels and the photodiode protection insulation film 6a are formed, a peripheral circuit region 1b in which a driving circuit and the dummy protection insulation film 6c are formed, and a scribe lane region 1c in which the dummy protection insulation film 6c is formed, wherein the dummy protection insulation film 6c causes an average height of a surface of the interlayer insulation film 9 included in each of the peripheral circuit region 1b and the scribe lane region 1c to be close to an average height of a surface of the interlayer insulation film 9 included in the pixel region 1a, be
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: July 20, 2010
    Assignee: Panasonic Corporation
    Inventors: Chie Morii, Sougo Ohta
  • Publication number: 20100176477
    Abstract: A single-photon avalanche detector is disclosed that is operable at wavelengths greater than 1000 nm and at operating speeds greater than 10 MHz. The single-photon avalanche detector comprises a thin-film resistor and avalanche photodiode that are monolithically integrated such that little or no additional capacitance is associated with the addition of the resistor.
    Type: Application
    Filed: March 24, 2010
    Publication date: July 15, 2010
    Applicant: PRINCETON LIGHTWAVE, INC.
    Inventor: Mark Allen Itzler
  • Publication number: 20100173442
    Abstract: An image sensor and a method for manufacturing the same are provided. In the method, a photoresist is formed on a substrate including a photodiode region and a gate electrode opposite to the photodiode region on the basis of the gate electrode. An oxide layer is formed to a specific thickness on both the photodiode region and a part of the gate electrode. The photoresist is removed from the substrate and cleaned. A first oxide film is formed on the substrate, the gate electrode, and the oxide layer remaining on the photodiode region. A nitride film is formed on the first oxide film. And a second oxide film is formed on the nitride film. Blank etching is performed on the first oxide film, the nitride film, and the second oxide film to form a spacer at the side of the gate electrode.
    Type: Application
    Filed: December 22, 2009
    Publication date: July 8, 2010
    Inventors: Sang Il Hwang, Jeong Yoi Jang
  • Publication number: 20100171097
    Abstract: A method for manufacturing a detection device includes the steps of providing bonding bumps on at least one of a light-receiving element array and a read-out circuit multiplexer, fixing a bump height adjusting member for adjusting the heights of the bumps to the light-receiving element array and/or the read-out circuit multiplexer on which the bumps are provided, and pressing a flat plate on the tops of the bumps and deforming the bumps until the flat plate comes in contact with the end of the bump height adjusting member.
    Type: Application
    Filed: January 4, 2010
    Publication date: July 8, 2010
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Youichi NAGAI, Hiroshi INADA
  • Publication number: 20100173443
    Abstract: A method of manufacturing a photo-detector array device integrated with a read-out integrated circuit (ROIC) monolithically integrated for a laser-radar image signal. A detector array device, a photodiode and control devices for selecting and outputting a laser-radar image signal are simultaneously formed on an InP substrate. In addition, after the photodiode and the control devices are simultaneously formed on the InP substrate, the photodiode and the control devices are electrically separated from each other using a polyamide, whereby a PN junction surface of the photodiode is buried to reduce surface leakage current and improve electrical reliability, and the structure of the control devices can be simplified to improve image signal reception characteristics.
    Type: Application
    Filed: March 16, 2010
    Publication date: July 8, 2010
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Eun Soo NAM, Myoung Sook Oh, Ho Young Kim, Young Jun Chong, Hyun Kyu Yu
  • Patent number: 7750382
    Abstract: A deep implanted region of a first conductivity type located below a transistor array of a pixel sensor cell and adjacent a doped region of a second conductivity type of a photodiode of the pixel sensor cell is disclosed. The deep implanted region reduces surface leakage and dark current and increases the capacitance of the photodiode by acting as a reflective barrier to photo-generated charge in the doped region of the second conductivity type of the photodiode. The deep implanted region also provides improved charge transfer from the charge collection region of the photodiode to a floating diffusion region adjacent the gate of the transfer transistor.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: July 6, 2010
    Assignee: Aptina Imaging Corporation
    Inventor: Howard Rhodes
  • Publication number: 20100163942
    Abstract: A method for manufacturing a CMOS image sensor includes: preparing a semiconductor substrate incorporating therein a p-type epitaxial layer by epitaxially growing up an upper portion of the semiconductor substrate; forming a pixel array in one predetermined location of the semiconductor substrate, the pixel array having a plurality of transistors and a photodiode therein, wherein each transistor employs a gate insulator with a thickness ranging from 40 ? to 90 ?; and forming a logic circuit in the other predetermined location of the semiconductor substrate, the logic circuit having at least one transistor, wherein the transistor employs a gate insulator with a thickness ranging from 5 ? to 40 ?.
    Type: Application
    Filed: March 12, 2010
    Publication date: July 1, 2010
    Inventor: Ju-Il Lee
  • Publication number: 20100167449
    Abstract: A solid-state imaging device with a semiconductor substrate; a pixel formation region in the substrate and including a pixel made of a photoelectric conversion element; and an element isolation portion in the substrate and including an element isolation insulating layer and an impurity element isolation region. The element isolation insulating layer is positioned in a surface of the substrate. The impurity element isolation region is positioned under the element isolation insulating layer and within the substrate. The impurity element isolation region has at least a portion with a width that is narrower than that of the element isolation insulating layer. The photoelectric conversion element extends to a position under the element isolation insulating layer of the element isolation portion.
    Type: Application
    Filed: March 9, 2010
    Publication date: July 1, 2010
    Applicant: Sony Corporation
    Inventor: Ikuo Yoshihara
  • Publication number: 20100164041
    Abstract: A back side illumination image sensor according to an embodiment includes: a photosensitive device and a readout circuit on the front side of a first substrate; an interlayer dielectric layer on the front side of the first substrate; a metal line on the interlayer dielectric layer; a pad having a step on the interlayer dielectric layer; and a second substrate bonded with the front side of the first substrate over the interlayer dielectric layer, metal line, and pad.
    Type: Application
    Filed: December 17, 2009
    Publication date: July 1, 2010
    Inventor: MUN HWAN KIM
  • Publication number: 20100164049
    Abstract: Provided are an image sensor and a method for manufacturing the same. The image sensor comprises an active region including a photodiode region, a transistor region, and an active pattern; a photodiode; and a plurality of transistors. The active region is formed on a substrate. The active region is defined by a device isolation region. The photodiode region and the transistor region are formed in the active region. The photodiode is formed in the photodiode region. The plurality of transistors is formed on the transistor region. The active pattern connects the photodiode region to the transistor region at a second location.
    Type: Application
    Filed: December 28, 2009
    Publication date: July 1, 2010
    Inventors: Jae Hyun Yoo, Jong Min Kim
  • Publication number: 20100164043
    Abstract: A method of forming a CMOS image sensor and a CMOS image sensor. A method of forming a CMOS image sensor may include forming a plurality of photodiodes on and/or over a semiconductor substrate at regular intervals, forming an interlayer insulating film on and/or over an entire surface of a semiconductor substrate including photodiodes, coating an organic compound on and/or over an entire surface of an interlayer insulating film, coating photoresist on and/or over an organic compound, subjecting a photoresist to exposure and/or development to form a photoresist pattern which may expose an interlayer insulating film opposite to a photodiode region, selectively etching a portion of an exposed interlayer insulating film using a photoresist pattern as a mask, and/or removing a photoresist pattern.
    Type: Application
    Filed: December 11, 2009
    Publication date: July 1, 2010
    Inventor: Chung-Kyung Jung
  • Publication number: 20100167448
    Abstract: A solid-state imaging device includes a photoelectric conversion unit, a transistor, and an element separation region separating the photoelectric conversion unit and the transistor. The photoelectric conversion unit and the transistor constitute a pixel. The element separation region is formed of a semiconductor region of a conductivity type opposite to that of a source region and a drain region of the transistor. A part of a gate electrode of the transistor protrudes toward the element separation region side beyond an active region of the transistor. An insulating film having a thickness substantially the same as that of a gate insulating film of the gate electrode of the transistor is formed on the element separation region continuing from a part thereof under the gate electrode of the transistor to a part thereof continuing from the part under the gate electrode of the transistor.
    Type: Application
    Filed: March 8, 2010
    Publication date: July 1, 2010
    Applicant: Sony Corporation
    Inventor: Kazuichiro Itonaga
  • Publication number: 20100163882
    Abstract: A thin film transistor (TFT) array substrate for an X-ray detector and a method of fabricating the same are provided. The TFT array substrate includes a substrate, a gate line formed on the substrate, a data line crossing the gate line, a thin film transistor including a gate electrode, a source electrode, and a drain electrode, a first electrode connected to the drain electrode, a passivation layer formed over the gate line, the data line, the thin film transistor and the first electrode, a photoconductor formed over the passivation layer and connected to the first electrode, and a second electrode formed on the photoconductor.
    Type: Application
    Filed: December 24, 2009
    Publication date: July 1, 2010
    Inventor: Kwan-Wook Jung
  • Publication number: 20100167447
    Abstract: A method of manufacturing a back side illumination image sensor according to an embodiment includes: forming an ion implantation layer by implanting ions throughout the front side of a first substrate; defining a pixel region by forming a device isolation region on the front side of the first substrate; forming a photosensitive device and a readout circuit on the pixel region; forming an interlayer dielectric layer and a metal line on the front side of the first substrate; bonding a second substrate with the front side of the first substrate where the metal line is formed; removing a lower part of the first substrate under the ion implantation layer; applying wet etching to a back side of the first substrate after removing the lower part; and forming a microlens on the photosensitive device at the back side of the first substrate.
    Type: Application
    Filed: December 17, 2009
    Publication date: July 1, 2010
    Inventor: MUN HWAN KIM
  • Publication number: 20100164035
    Abstract: A back side illumination image sensor according to an embodiment includes: a device isolation region and a pixel region that are on a front side of a first substrate; a light sensor and a readout circuit that are on the pixel region; an interlayer dielectric layer and a metal line that are on the front side of the first substrate; a second substrate that is bonded to the front side of the first substrate on which the metal line is formed; a pixel isolating dielectric layer that is on the device isolation region at a back side of the first substrate; and a microlens that is on the light sensor at the back side of the first substrate
    Type: Application
    Filed: December 17, 2009
    Publication date: July 1, 2010
    Inventor: MUN HWAN KIM
  • Publication number: 20100155796
    Abstract: A semiconductor device includes a semiconductor substrate, a back side drawn electrode formed by embedding a first conductive material in a contact hole penetrating the semiconductor substrate through an insulating film formed to include a uniform thickness, used also as an alignment mark, and configured to draw out an electrode to the back side of the semiconductor substrate. The device further includes a pad provided on the back side of the semiconductor substrate, and connected to the back side drawn electrode.
    Type: Application
    Filed: December 15, 2009
    Publication date: June 24, 2010
    Inventors: Hidetoshi KOIKE, Yusuke Kohyama
  • Patent number: 7741590
    Abstract: An image sensor comprises a photoelectric conversion unit; a transfer transistor which has a gate electrode; a multilayer wiring structure which defines an aperture region above the photoelectric conversion unit; and a waveguide which guides light entering the aperture region to the light receiving surface, wherein the multilayer wiring structure includes a first wiring layer which is an uppermost wiring layer and defines two contour sides of the aperture region in a first direction, and a second wiring layer which is arranged between the gate electrode and the first wiring layer in a direction perpendicular to the light receiving surface, and defines two contour sides of the aperture region in a second direction, and wherein the gate electrode is arranged to overlap part of the light receiving surface and have a longitudinal direction along the first direction.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: June 22, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventor: Akihiko Nagano
  • Publication number: 20100147364
    Abstract: The present invention provides module structures and methods of manufacturing rigid or flexible photovoltaic modules employing thin film solar cells fabricated on flexible substrates, preferably on flexible metallic foil substrates. The solar cells may be Group IBIIIAVIA compound solar cells or amorphous silicon solar cells fabricated on thin stainless steel or aluminum alloy foils. In one embodiment, initially a solar cell string including two or more solar cells is formed by interconnecting the solar cells with conductive leads or ribbons. At least one bypass diode electrically connects conductive back surfaces of at least two solar cells. The bypass diode and the solar cells are encapsulated with support material and are packed with the protective shell such that the at least one bypass diode is placed between at least one solar cell and the bottom protective sheet.
    Type: Application
    Filed: December 16, 2009
    Publication date: June 17, 2010
    Applicant: SoloPower, Inc.
    Inventors: Pedro Gonzalez, Bulent M. Basol, Burak Metin, Mukundan Narasimhan, Mustafa Pinarbasi
  • Publication number: 20100148283
    Abstract: An integrated structure of MEMS device and CIS device and a fabricating method thereof includes providing a substrate having a CIS region and a MEMS region defined therein with a plurality of CIS devices positioned in the CIS region; performing a multilevel interconnect process to form a multilevel interconnect structure in the CIS region and the MEMS region and a micro-machined mesh metal in the MEMS region on a front side of the substrate; performing a first etching process to form a chamber in MEMS region in the front side of the substrate; forming a first mask pattern and a second mask pattern respectively in the CIS region and the MEMS region on a back side of the substrate; and performing a second etching process to form a plurality of vent holes connecting to the chamber on the back side of the substrate through the second mask pattern.
    Type: Application
    Filed: December 14, 2008
    Publication date: June 17, 2010
    Inventor: Hui-Shen Shih
  • Publication number: 20100147353
    Abstract: A method for fabricating a photovoltaic cell with an integrated shunt protection diode. The photovoltaic cell and corresponding integrated shunt protection diode are created by first scribing a transparent conductive oxide layer on a substrate to define a plurality of transparent conductive oxide areas. Next, a semiconductor layer is deposited onto a surface of the transparent conductive oxide layer. This semiconductor layer is scribed to expose a portion of each of the transparent conductive oxide areas. A conductive layer is then deposited onto a surface of the semiconductor layer. Subsequently, the conductive layer is scribed into conductive areas.
    Type: Application
    Filed: December 15, 2008
    Publication date: June 17, 2010
    Inventor: Kishore KAMATH
  • Publication number: 20100149397
    Abstract: A solid-state image capturing apparatus according to the present invention includes: a plurality of photoelectric conversion sections; a charge accumulation section; and a charge readout section, the apparatus further includes: a semiconductor substrate including a plurality of diffusion layers formed thereabove, the diffusion layers constituting the photoelectric conversion sections, the charge accumulation section and the charge readout section; a readout gate electrode formed above the semiconductor substrate and constituting the charge readout section; an insulation sidewall formed on a side surface of the readout gate electrode; and a surface diffusion layer constituting the photoelectric conversion sections, which is positioned in a self-aligning manner with respect to the readout gate electrode by the insulation sidewall.
    Type: Application
    Filed: November 23, 2009
    Publication date: June 17, 2010
    Applicant: Sharp Kabushiki Kaisha
    Inventor: Akiyoshi Mutoh
  • Publication number: 20100151613
    Abstract: A solid-state imaging device includes a semiconductor substrate; a first conductive region of the semiconductor substrate; a first conductive region on an upper surface side of the first conductive region of the semiconductor substrate; a second conductive region below the first conductive region on the upper surface side of the first conductive region of the semiconductor substrate. The solid-state imaging device further includes a photoelectric conversion region including the first conductive region located on the upper surface side of the first conductive region of the semiconductor substrate and the second conductive region and a transfer transistor transferring charges accumulated in the photoelectric conversion region to a readout region; and a pixel including the photoelectric conversion region and the transfer transistor. The first conductive region, which is included in the photoelectric conversion region, extends to the lower side of a sidewall of a gate electrode of the transfer transistor.
    Type: Application
    Filed: February 12, 2010
    Publication date: June 17, 2010
    Applicant: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 7736935
    Abstract: The present invention provides, in part, methods producing multilayer semiconductor structures having one or more at least partially relaxed strained layers, where the strained layer is at least partially relaxed by annealing. In particular, the invention forms diffusion barriers that prevent diffusion of contaminants during annealing. The invention also includes embodiments where the at least partially relaxed strained layer is patterned into islands by etching trenches and the like. The invention also provides semiconductor structures resulting from these methods, and further, provides such structures where the semiconductor materials are suitable for application to LED devices, laser devices, photovoltaic devices, and other optoelectronic devices.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: June 15, 2010
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventors: Bruce Faure, Pascal Guenard