Having Diverse Electrical Device Patents (Class 438/59)
-
Patent number: 7939867Abstract: A method of fabricating a complementary metal-oxide-semiconductor (CMOS) image sensor is provided. First, an isolation structure is formed in a substrate with a photo-sensitive region and a transistor device region in the substrate. The transistor device region includes at least a region for forming a transfer transistor. A dielectric layer and a conductive layer are sequentially formed on the substrate. An ion implantation process is performed to implant a dopant into the substrate below the position for forming a gate of the transfer transistor and in the photo-sensitive region through the conductive layer and the dielectric layer. The conductive layer and the dielectric layer are patterned to at least form the gate structure of the transfer transistor on the transistor device region. Thereafter, a photo diode is formed in the substrate in the photo-sensitive region.Type: GrantFiled: February 27, 2008Date of Patent: May 10, 2011Assignee: United Microelectronics Corp.Inventor: Ching-Hung Kao
-
Publication number: 20110102620Abstract: A solid-state imaging device is provided, which includes a photodiode having a first conductivity type semiconductor area that is dividedly formed for each pixel; a first conductivity type transfer gate electrode formed on the semiconductor substrate via a gate insulating layer in an area neighboring the photodiode, and transmitting signal charges generated and accumulated in the photodiode; a signal reading unit reading a voltage which corresponds to the signal charge or the signal charge; and an inversion layer induction electrode formed on the semiconductor substrate via the gate insulating layer in an area covering a portion or the whole of the photodiode, and composed of a conductor or a semiconductor having a work function. An inversion layer is induced, which is formed by accumulating a second conductivity type carrier on a surface of the inversion layer induction electrode side of the semiconductor area through the inversion layer induction electrode.Type: ApplicationFiled: October 22, 2010Publication date: May 5, 2011Applicant: SONY CORPORATIONInventors: Yorito Sakano, Takashi Abe, Keiji Mabuchi, Ryoji Suzuki, Hiroyuki Mori, Yoshiharu Kudoh, Fumihiko Koga, Takeshi Yanagita, Kazunobu Ota
-
Publication number: 20110096215Abstract: An image sensor includes a first substrate including a driving element, a first insulation layer on the first substrate and on the driving element, a second substrate including a photoelectric conversion element, and a second insulation layer on the second substrate and on the photoelectric conversion element. A surface of the second insulation layer is on an upper surface of the first insulation layer. The image sensor includes a conductive connector penetrating the second insulation layer and a portion of the first insulation layer. Methods of forming image sensors are also disclosed.Type: ApplicationFiled: October 22, 2010Publication date: April 28, 2011Inventors: Sang-Jun Choi, Yoon-Dong Park, Chris Hong, Dae-Lok Bae, Jung-Chak Ahn, Chang-Rok Moon, June-Mo Koo, Suk-Pil Kim, Hoon-Sang Oh
-
Patent number: 7932120Abstract: Complementary metal-oxide semiconductor (CMOS) image sensors (CIS) and methods of manufacturing the same are provided, the sensors include an epitaxial layer on a substrate in which a first, second, third and fourth region are defined. A photodiode may be formed at an upper portion of the epitaxial layer in the first region. A plurality of gate structures may be formed on the epitaxial layer in the second, third and fourth regions. A first blocking layer may be formed on the gate structures and the epitaxial layer in the first and second regions. A first impurity layer may be formed at an upper portion of the epitaxial layer adjacent to the gate structures in the second region, and a second impurity layer at upper portions of the epitaxial layer adjacent to the gate structures in the third and fourth regions. A color filter layer may be formed over the photodiode. A microlens may be formed on the color filter layer.Type: GrantFiled: August 27, 2009Date of Patent: April 26, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Ui-Sik Kim, Young-Hoon Park, Won-Je Park, Dae-Cheol Seong, Yeo-Ju Yoon, Bo-Bae Kang
-
Patent number: 7927908Abstract: The method is designed for manufacturing a bolometric detector equipped with a membrane suspended above a substrate by means of heat-insulating arms fixed to the substrate by anchoring points. The membrane has a heat-sensitive thin layer with a base comprising at least a semiconducting iron oxide. The method comprises at least a step of localized reduction and/or oxidation of the thin layer of semiconducting iron oxide to modify the degree of oxidation of the iron atom of a part of the thin layer of semiconducting iron oxide.Type: GrantFiled: January 12, 2010Date of Patent: April 19, 2011Assignee: Commissariat a l'Energie AtomiqueInventors: Jean-Louis Ouvrier-Buffet, Christophe Dubarry, Laurent Puech
-
Publication number: 20110086459Abstract: There are provided a CMOS image sensor and a method for fabrication thereof. The CMOS image sensor having a reset transistor, a select transistor, a drive transistor and a photodiode, includes an active region in shape of a line, a gate electrode of the drive transistor, which is intersected with the active region, a blocking layer interposed between the active region and the gate electrode in which the blocking layer is formed on an intersection region of the active region and the gate electrode, and a metal contact electrically connected to the gate electrode, wherein the metal contact is not electrically connected to the active region by the blocking layer.Type: ApplicationFiled: December 16, 2010Publication date: April 14, 2011Applicant: Crosstek Capital, LLCInventors: Won-Joon Ho, Kyung-Lak Lee
-
Publication number: 20110086458Abstract: Provided is a CMOS image sensor with an asymmetric well structure of a source follower. The CMOS image sensor includes: a well disposed in an active region of a substrate; a drive transistor having one terminal connected to a power voltage and a first gate electrode disposed to cross the well; and a select transistor having a drain-source junction between another terminal of the drive transistor and an output node, and a second gate electrode disposed in parallel to the drive transistor. A drain region of the drive transistor and a source region of the select transistor are asymmetrically arranged.Type: ApplicationFiled: December 16, 2010Publication date: April 14, 2011Applicant: CROSSTEK CAPITAL, LLCInventor: Hee-Jeong Hong
-
Publication number: 20110073923Abstract: A solid-state imaging device includes a first-conductivity-type semiconductor well region, a plurality of pixels each of which is formed on the semiconductor well region and is composed of a photoelectric conversion portion and a pixel transistor, an element isolation region provided between the pixels and in the pixels, and an element isolation region being free from an insulation film and being provided between desired pixel transistors.Type: ApplicationFiled: September 14, 2010Publication date: March 31, 2011Applicant: SONY CORPORATIONInventors: Keiji Tatani, Fumihiko Koga, Takashi Nagano
-
Publication number: 20110070677Abstract: A method for forming a CMOS image sensing pixel, which is configured to determine a color, includes providing an n-type substrate that includes a first thickness and a first width. The method also includes forming a p-type layer, the p-type layer overlaying the n-type substrate. The p-type layer includes a second thickness and a second width. The second thickness and the second width are associated with a light characteristic. The method additionally includes forming an n-type layer, the n-type layer overlaying the p-type layer. The n-type layer includes a third thickness and a third width. In addition, the method includes forming a pn junction between the p-type layer and the n-type layer. The pn junction includes a fourth width. The method also includes providing a control circuit. The control circuit is electrically coupled to the n-type substrate.Type: ApplicationFiled: November 23, 2010Publication date: March 24, 2011Applicant: Semiconductor Manufacturing International (Shanghai) CorporationInventors: Hong Zhu, Jim Yang
-
Publication number: 20110068423Abstract: The disclosure relates generally to photodetectors and methods of forming the same, and more particularly to optical photodetectors. The photodetector includes a waveguide having a radius that controls the specific wavelength or specific range of wavelengths being detected. The disclosure also relates to a design structure of the aforementioned.Type: ApplicationFiled: September 18, 2009Publication date: March 24, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: John M. Aitken
-
Patent number: 7911014Abstract: An antenna with air-filled trench is integrated with a radio frequency (RF) circuit. The trench locates directly under the metal lines that made up the antenna and is formed by etching from the back side of the semiconductor substrate until all the substrate material in the trench is removed. The air-filled trench greatly reduces the losses due to the semiconductor substrate; therefore the performance of the antenna improves greatly. When the antenna is a large planar spiral inductor, the air-filled trench means the semiconductor substrate inside the spiral inductor is untouched; hence integrated circuit can be built inside the antenna and on that substrate. Therefore the RF integrated circuit has a smaller size. Air-filled trench can also be used to reduce the semiconductor substrate noise coupling between digital circuit block and analog/RF circuit block. This air-filled trench and the air-filled trench under the antenna are formed at the same time.Type: GrantFiled: September 29, 2008Date of Patent: March 22, 2011Inventor: My The Doan
-
Patent number: 7902618Abstract: A backside illuminated imaging pixel with improved angular response includes a semiconductor layer having a front and a back surface. The imaging pixel also includes a photodiode region formed in the semiconductor layer. The photodiode region includes a first and a second n-region. The first n-region has a centerline projecting between the front and back surfaces of the semiconductor layer. The second n-region is disposed between the first n-region and the back surface of the semiconductor layer such that the second n-region is offset from the centerline of the first n-region.Type: GrantFiled: November 17, 2008Date of Patent: March 8, 2011Assignee: Omni Vision Technologies, Inc.Inventors: Duli Mao, Vincent Venezia, Hsin-Chih Tai, Yin Qian, Howard E. Rhodes
-
Publication number: 20110048489Abstract: A combined thermoelectric/photovoltaic device features a photovoltaic cell with a common electrode, an electrically insulative, thermally conductive layer applied to the common electrode, and an array of thermoelectric couples each including a p-type semiconductor element and an n-type semiconductor element. There is an electrically conductive bridge for each thermoelectric couple formed on the electrically insulative thermally conductive layer. Methods of making such a hybrid device also including a heat sink are also disclosed.Type: ApplicationFiled: June 15, 2010Publication date: March 3, 2011Inventors: Karim M. Gabriel, Mary K. Herndon, Marcelle S. Ibrahim
-
Publication number: 20110049590Abstract: A solid-state imaging device that includes at least one pixel. The pixel includes a photodiode, a floating diffusion element in a region of the photodiode and a read out gate electrode at least partially surrounding the floating diffusion element in plan view.Type: ApplicationFiled: August 20, 2010Publication date: March 3, 2011Applicant: SONY CORPORATIONInventor: KAZUICHIRO ITONAGA
-
Publication number: 20110048503Abstract: A solar cell device comprising a photovoltaically active layer between a transparent front cover and a back cover, wherein the front cover comprises a first surface region and a second surface region opposite thereto and facing the photovoltaically active layer, and the back cover comprises a third surface region facing the photovoltaically active layer and a fourth surface region opposite thereto, wherein at least one of the first to the fourth surface regions is provided with a first area and a second area, which areas have different light modulation properties, wherein both areas are light transparent, and wherein the solar cell device further comprises at least one light source (7) for coupling light laterally into at least one of the front cover (2) and the back cover (3). Moreover a method for producing such solar cell device, and an information board comprising such a solar cell device and its use for displaying information.Type: ApplicationFiled: June 19, 2008Publication date: March 3, 2011Inventor: Franz Karg
-
Publication number: 20110049331Abstract: According to one embodiment, a method of manufacturing a back-illuminated solid-state imaging device including forming a mask with apertures corresponding to a pixel pattern on the surface of a semiconductor layer, implanting second-conductivity-type impurity ions into the semiconductor layer from the front side of the layer to form second-conductivity-type photoelectric conversion parts and forming a part where no ion has been implanted into a pixel separation region, forming at the surface of the semiconductor layer a signal scanning circuit for reading light signals obtained at the photoelectric conversion parts after removing the mask, and removing the semiconductor substrate and a buried insulating layer from the semiconductor layer after causing a support substrate to adhere to the front side of the semiconductor layer.Type: ApplicationFiled: August 2, 2010Publication date: March 3, 2011Inventor: Hirofumi YAMASHITA
-
Publication number: 20110042552Abstract: According to one embodiment, a solid-state imaging device with an array arrangement of unit pixels including photoelectric conversion parts configured to generate signal charges by photoelectric conversion and a signal scanning circuit part, the signal scanning circuit part being provided on a second semiconductor layer different from a first semiconductor layer including the photoelectric conversion parts, the second semiconductor layer being stacked above the front side of the first semiconductor layer via an insulating film, and the first semiconductor layer being so configured that a pixel separation insulating film is buried in pixel boundary parts and read transistors configured to read signal charges generated by the photoelectric conversion parts are formed at the front side of the first semiconductor layer.Type: ApplicationFiled: August 9, 2010Publication date: February 24, 2011Inventors: Shogo FURUYA, Hirofumi Yamashita, Yusuke Kohyama
-
Patent number: 7888215Abstract: An image sensor with a high full-well capacity includes a photosensitive region, a transfer gate, and sidewall spacers. The photosensitive region is formed to accumulate an image charge in response to light. The transfer gate disposed adjacent to the photosensitive region and coupled to selectively transfer the image charge from the photosensitive region to other pixel circuitry. First and second sidewall spacers are disposed on either side of the transfer gate. The first sidewall spacer closest to the photosensitive region is narrower than the second sidewall spacer. In some cases, the first sidewall spacer may be omitted.Type: GrantFiled: June 4, 2008Date of Patent: February 15, 2011Assignee: OmniVision Technologies, Inc.Inventors: Duli Mao, Hsin-Chih Tai, Vincent Venezia, Yin Qian, Howard E. Rhodes
-
Patent number: 7888161Abstract: A method for producing a solid-state imaging device, which including: a photoelectric conversion section; a charge transfer section having a charge transfer electrode; and an antireflection film covering a light-receiving region in the photoelectric conversion section, wherein forming the antireflection film includes: forming a sidewall on a lateral wall of the charge transfer electrode after forming the charge transfer electrode; forming an antireflection film on a substrate surface where the sidewall is formed; forming a resist on the antireflection film; melting and flattening the resist to expose the antireflection film on the charge transfer electrode; removing the antireflection film by using the resist as the mask; removing the sidewall; covering the charge transfer electrode with an insulating film; and forming a light-shielding film that reaches a level lower than the top surface of the antireflection film, and that surrounds the periphery of the antireflection film.Type: GrantFiled: April 24, 2009Date of Patent: February 15, 2011Assignee: Fujifilm CorporationInventor: Takanori Sato
-
Publication number: 20110032405Abstract: An image sensor pixel includes a photosensitive element, a floating diffusion region and a transfer transistor channel region. The transfer transistor channel region is disposed between the photosensitive region and the floating diffusion region. The transfer transistor channel region includes a first channel sub-region having a first doping concentration and a second channel sub-region having a second doping concentration that is different from the first doping concentration.Type: ApplicationFiled: February 22, 2010Publication date: February 10, 2011Applicant: OMNIVISION TECHNOLOGIES, INC.Inventors: Hidetoshi Nozaki, Tiejun Dai
-
Publication number: 20110033968Abstract: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region.Type: ApplicationFiled: October 13, 2010Publication date: February 10, 2011Applicant: SONY CORPORATIONInventors: Keiji TATANI, Hideshi ABE, Masanori OHASHI, Atsushi MASAGAKI, Atsuhiko YAMAMOTO, Masakazu FURUKAWA
-
Publication number: 20110032376Abstract: A solid-state image pickup device is provided which includes a plurality of pixels provided in a semiconductor substrate, the pixels including a plurality of photoelectric conversion portions and MOS transistors which selectively read out signals therefrom, at least one organic photoelectric conversion film on the photoelectric conversion portions, and an isolation region provided in the organic photoelectric conversion film at a position corresponding to between the pixels to perform optical and electrical isolation.Type: ApplicationFiled: August 3, 2010Publication date: February 10, 2011Applicant: SONY CORPORATIONInventor: Ritsuo Takizawa
-
Publication number: 20110031578Abstract: A semiconductor photodiode includes a semiconductor substrate; a first conduction type first semiconductor layer formed above the semiconductor substrate; a high resistance second semiconductor layer formed above the first semiconductor layer; a first conduction type third semiconductor layer formed above the second semiconductor layer; and a second conduction type fourth semiconductor layer buried in the second semiconductor layer, in which the fourth semiconductor layer is separated at a predetermined distance in a direction horizontal to the surface of the semiconductor substrate.Type: ApplicationFiled: July 17, 2010Publication date: February 10, 2011Inventors: Makoto MIURA, Shinichi Saito, Youngkun Lee, Katsuya Oda
-
Patent number: 7883923Abstract: Embodiments relate to an image sensor and a method for manufacturing an image sensor. According to embodiments, a method may include forming a semiconductor substrate including a pixel part and a peripheral part, forming an interlayer dielectric film including a metal wire on and/or over the semiconductor substrate, forming photo diode patterns on and/or over the interlayer dielectric film and connected to the metal wire in the pixel part, forming a device isolation dielectric layer on and/or over the interlayer dielectric film including the photo diode patterns, forming a first via hole on and/or over the device isolation dielectric layer to partially expose the photo diode patterns, and forming a second via hole on and/or over the device isolation dielectric layer to expose the metal wire in the peripheral part. According to embodiments, vertical integration of transistor circuitry and a photo diode may be achieved.Type: GrantFiled: December 26, 2008Date of Patent: February 8, 2011Assignee: Dongbu HiTek Co., Ltd.Inventor: Joon-Ku Yoon
-
Patent number: 7883922Abstract: An image sensor and a method for manufacturing an image sensor that has an increased aspect ratio. An image sensor and a method for manufacturing an image sensor that have a relatively large process margin (e.g. even in high level pixels), which may reduce and/or eliminate restrictions in downscaling an image sensor. An image sensor may include at least one of a first unit pixel including a first transfer transistor, a second unit pixel including a second drive transistor, and a contact electrically connecting a floating diffusion region of the first unit pixel with the second drive transistor of the second unit pixel. A method of manufacturing an image sensor including at least one of forming a first unit pixel including a first transfer transistor, forming a second unit pixel including a second drive transistor, and forming a contact electrically connecting a floating diffusion region of the first unit pixel with the second drive transistor of the second unit pixel.Type: GrantFiled: March 11, 2008Date of Patent: February 8, 2011Assignee: Dongbu HiTek Co., Ltd.Inventor: Chang-Hun Han
-
Publication number: 20110027934Abstract: A photoelectric conversion apparatus includes: a first interlayer insulation film disposed on a semiconductor substrate; a first plug disposed in a first hole in the first interlayer insulation film, and serving to electrically connect between a plurality of active regions disposed in the semiconductor substrate, between gate electrodes of a plurality of MOS transistors, or between the active region and the gate electrode of the MOS transistor, not through the wiring of the wiring layer; and a second plug disposed in a second hole in the first interlayer insulation film, the second plug being electrically connected to the active region, wherein a wiring arranged over the second plug and closest to the second plug is electrically connected to the second plug, and the wiring electrically connected to the second plug forms a portion of dual damascene structure. By such a structure, incidence efficiency of light onto a photoelectric conversion element can be improved.Type: ApplicationFiled: October 14, 2010Publication date: February 3, 2011Applicant: CANON KABUSHIKI KAISHAInventors: Hiroaki Naruse, Takashi Okagawa, Ryuichi Mishima, Nobuhiko Sato, Hiroshi Yuzurihara
-
Publication number: 20110024809Abstract: A CMOS pixel is disclosed. The CMOS pixel includes a semiconductor substrate; a sense node formed in the semiconductor substrate and positioned substantially in the center of the CMOS pixel; a transfer gate formed about the sense node; and at least one photodiode formed about the transfer gate. A reset transistor, a source follower transistor, and a row select transistor are located substantially to one side of the CMOS pixel substantially adjacent to the photodiode. The sense node is operable to be floating. An implant may be formed about the photodiode configured to step potential in a direction toward the sense node.Type: ApplicationFiled: July 27, 2010Publication date: February 3, 2011Inventor: James Robert Janesick
-
Publication number: 20110024810Abstract: A method of manufacturing a CMOS image sensor is disclosed. A silicon-on-insulator substrate is provided, which includes providing a silicon-on-insulator substrate including a mechanical substrate, an insulator layer substantially overlying the mechanical substrate, and a seed layer substantially overlying the insulator layer. A semiconductor substrate is epitaxially grown substantially overlying the seed layer. The mechanical substrate and at least a portion of the insulator layer are removed. An ultrathin oxide layer is formed substantially underlying the semiconductor substrate. A mono layer of metal is formed substantially underlying the ultrathin oxide layer.Type: ApplicationFiled: July 27, 2010Publication date: February 3, 2011Inventor: James Robert Janesick
-
Publication number: 20110024808Abstract: A CMOS image sensor is disclosed. The CMOS imager includes a lightly doped semiconductor substrate of a first conductivity type. At least one CMOS pixel of a second conductivity type is formed in the semiconductor substrate. The semiconductor substrate is configured to receive a bias voltage applied for substantially depleting the semiconductor substrate and for forming a depletion edge within the semiconductor substrate. A well of the second conductivity type substantially surrounds the at least one CMOS pixel to form a depletion region about the at least one CMOS pixel operable to form a minimum predetermined barrier to the depletion edge within the semiconductor substrate to pinch off substrate bias in proximity to the return contact.Type: ApplicationFiled: July 27, 2010Publication date: February 3, 2011Inventor: James Robert Janesick
-
Publication number: 20110019048Abstract: A sensor module has first and second sensor arrays formed on a substrate, with the first and second sensor arrays adapted to share common readout circuitry and shared read out for a pair of sensors on a single array.Type: ApplicationFiled: July 26, 2010Publication date: January 27, 2011Applicant: STMicroelectronics (Research & Development)LimitedInventors: Jeffrey Raynor, Arnaud Laflaquiere, Stewart Smith
-
Publication number: 20110019041Abstract: A solid-state imaging device includes: photodiodes formed for pixels arranged on a light sensing surface of a semiconductor substrate; a signal reading unit formed on the semiconductor substrate to read a signal charge or a voltage; an insulating film formed on the semiconductor substrate and including optical waveguides; color filters formed on the insulating film; and on-chip lenses formed on the color filters. The first and second pixel combinations are alternately arranged both in the horizontal and vertical directions, the first pixel combination having a layout in which two green pixels are arranged both in the horizontal and vertical directions and a total of four pixels are arranged, the second pixel combination having a layout in which two pixels are arranged both in the horizontal and vertical directions, a total of four pixels are arranged, and two red pixels and two blue pixels are arranged cater cornered.Type: ApplicationFiled: July 12, 2010Publication date: January 27, 2011Applicant: SONY CORPORATIONInventors: Hiroaki ISHIWATA, Sanghoon HA
-
Patent number: 7875945Abstract: A photovoltaic device including a rear electrode which may also function as a rear reflector. In certain example embodiments of this invention, the rear electrode includes a metallic based reflective film that is oxidation graded, so as to be more oxided closer to a rear substrate (e.g., glass substrate) supporting the electrode than at a location further from the rear substrate. In other words, the rear electrode is oxidation graded so as to be less oxided closer to a semiconductor absorber of the photovoltaic device than at a location further from the semiconductor absorber in certain example embodiments. In certain example embodiments, the interior surface of the rear substrate may optionally be textured so that the rear electrode deposited thereon is also textured so as to provide desirable electrical and reflective characteristics. In certain example embodiments, the rear electrode may be of or include Mo and/or MoOx, and may be sputter-deposited using a combination of MoOx and Mo sputtering targets.Type: GrantFiled: May 9, 2008Date of Patent: January 25, 2011Assignee: Guardian Industries Corp.Inventors: Alexey Krasnov, Willem den Boer, Scott V. Thomsen, Leonard L. Boyer, Jr.
-
Patent number: 7875491Abstract: A complementary metal-oxide-semiconductor image sensor may include: a semiconductor substrate; a photodiode formed on a first portion of the semiconductor substrate; a transfer gate formed on the semiconductor substrate, near the photodiode, to transfer optical charges accumulated in the photodiode; a floating diffusion area formed on a second portion of the semiconductor substrate, on an opposite side of the transfer gate from the photodiode, to accommodate the optical charges; and/or a channel area formed under the transfer gate and contacting a side of the photodiode to transfer the optical charges. The transfer gate may be formed, at least in part, of transparent material. A method of manufacturing a complimentary metal-oxide-semiconductor image sensor may include: forming the photodiode; forming the floating diffusion area, separate from the photodiode; and/or forming the transfer gate, near the photodiode, to transfer optical charges accumulated in the photodiode.Type: GrantFiled: January 24, 2008Date of Patent: January 25, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Doo-cheol Park, Jung-hyeon Kim, Jun-young Lee
-
Patent number: 7875915Abstract: An integrated circuit includes at least one photodiode associated with a read transistor. The photodiode is formed from a stack of three semiconductor layers comprising a buried layer, an floating substrate layer and an upper layer. The drain region and/or the source region of the transistor are incorporated within the upper layer. The buried layer is electrically isolated from the upper layer so as to allow the buried layer to be biased independently of the upper layer.Type: GrantFiled: May 10, 2006Date of Patent: January 25, 2011Assignee: STMicroelectronics S.A.Inventors: François Roy, Arnaud Tournier
-
Publication number: 20110012217Abstract: Devices having features deposited on two sides of a device substrate and methods for making the same. The devices are useful, for example, as the components in a macroelectronic system. In a preferred embodiment, the devices are photosensors having a plurality of electrodes patterned on a first side of the device and an electromagnetic interference filter patterned on a second side of the device. The method facilitates the fabrication of two-sided devices through the use of an immobilizing layer deposited on top of devices patterned on a first side of a device substrate; flipping the device substrate; processing the second side of the device substrate to produce patterned features on the second side of the device substrate; and releasing the devices having patterned elements on two sides of each device.Type: ApplicationFiled: November 7, 2008Publication date: January 20, 2011Applicant: UNIVERSITY OF WASHINGTONInventors: Samuel Kim, Babak Amirparviz
-
Publication number: 20110008925Abstract: A carbon-containing semiconductor layer is formed on exposed surfaces of a p? doped semiconductor layer abutting sidewalls of a shallow trench. Following formation of a dielectric layer on the carbon-containing semiconductor layer, a surface pinning layer having a p-type doping is formed underneath the carbon-containing semiconductor layer. A shallow trench isolation structure and a photodiode are subsequently formed. Diffusion of defects directly beneath the shallow trench isolation structure, now contained in the carbon-containing semiconductor layer, is suppressed. Further, boron diffusion into the shallow trench isolation structure and into the photodiode is also suppressed by the carbon-containing semiconductor layer, providing reduction in dark current and enhancement of performance of the photodiode.Type: ApplicationFiled: September 20, 2010Publication date: January 13, 2011Applicant: International Business Machines CorporationInventors: James W. Adkisson, Rajendran Krishnasamy
-
Patent number: 7863074Abstract: A method for forming a thin film photovoltaic device having patterned electrode films includes providing a soda lime glass substrate with an overlying lower electrode layer comprising a molybdenum material. The method further includes subjecting the lower electrode layer with one or more pulses of electromagnetic radiation from a laser source to ablate one or more patterns associated with one or more berm structures from the lower electrode layer. Furthermore, the method includes processing the lower electrode layer comprising the one or more patterns using a mechanical brush device to remove the one or more berm structures followed by treating the lower electrode layer comprising the one or more patterns free from the one or more berm structures. The method further includes forming a layer of photovoltaic material overlying the lower electrode layer and forming a first zinc oxide layer overlying the layer of photovoltaic material.Type: GrantFiled: September 23, 2009Date of Patent: January 4, 2011Assignee: Stion CorporationInventor: Robert D. Wieting
-
Patent number: 7863077Abstract: An image sensor and method of manufacturing the same are disclosed. A semiconductor substrate can be prepared comprising a photodiode region, a transistor region, and a floating diffusion region. A gate dielectric can be disposed under a surface of the semiconductor substrate in the transistor region. A first dielectric pattern can be provided having a portion above and a portion below the surface of the semiconductor substrate in the photodiode and the floating diffusion regions. A second dielectric can be disposed under the gate dielectric. The second dielectric can extend the depth of the gate dielectric into the semiconductor substrate to space the movement path of photoelectrons from the photodiode region to the floating diffusion region.Type: GrantFiled: September 17, 2008Date of Patent: January 4, 2011Assignee: Dongbu Hitek Co., Ltd.Inventor: Dong Bin Park
-
Publication number: 20100330723Abstract: In a method of manufacturing a photoelectric conversion device having a pixel region and a peripheral circuit region, a semiconductor compound layer is formed by causing a surface of a diffusion layer or gate electrode of a MOS transistor in the peripheral circuit region to react with a high melting point metal, then an insulating layer is formed in the pixel region and the peripheral circuit region after the step of forming a semiconductor compound layer. A contact hole is formed in the insulating layer to expose a diffusion layer in the pixel region, and a contact hole is formed in the insulating layer to expose the semiconductor compound layer formed in the peripheral circuit region. These holes are formed at different timings. Prior to forming the hole which is formed later, a contact plug is formed in the contact hole which is formed earlier.Type: ApplicationFiled: June 3, 2010Publication date: December 30, 2010Applicant: CANON KABUSHIKI KAISHAInventors: Takehito Okabe, Hiroaki Naruse, Ryuichi Mishima, Kouhei Hashimoto
-
Publication number: 20100330724Abstract: A solid-state imaging device including an imaging region having a plurality of pixels arranged in a two-dimensional matrix and a peripheral circuit detecting output signals from the pixels. An impurity concentration in a transistor of each pixel is lower than an impurity concentration in a transistor of the peripheral circuit. Further, the impurity concentration of a semiconductor well region under a floating diffusion portion in the pixel is set to be lower than the impurity concentration of a semiconductor well region under a transistor portion at the subsequent stage of the floating diffusion portion.Type: ApplicationFiled: August 11, 2010Publication date: December 30, 2010Applicant: SONY CORPORATIONInventors: MAKI SATO, SUSUMU OOKI
-
Patent number: 7859072Abstract: An image sensor and a fabricating method thereof are provided. The image sensor includes a plurality of pixels disposed in an active region and dummy pixels disposed in a peripheral region. An interlayer dielectric layer has a first thickness in the active region and a second thickness thinner than the first thickness in the peripheral region. Color filters are disposed in the active region, and a light blocking member is disposed in the peripheral region. There is substantially no step difference between the color filters and the light blocking member.Type: GrantFiled: August 15, 2007Date of Patent: December 28, 2010Assignee: Dongbu Hitek Co., Ltd.Inventor: Chang Hun Han
-
Patent number: 7858974Abstract: An organic light-emitting display panel having a storage capacitor comprised of a storage electrode overlapping a power line with a first gate-insulating layer disposed therebetween, wherein the storage capacitor includes a groove portion formed on a lateral side of the power line overlapping the storage electrode so that the overlapping area of the power line and the storage electrode is kept constant, and a method of manufacturing the same.Type: GrantFiled: February 28, 2008Date of Patent: December 28, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Young Soo Yoon, Joon Chul Goh, Beohm Rock Choi
-
Publication number: 20100321755Abstract: An optical modulator, methods of manufacturing and operating the same, and an optical apparatus including the optical modulator are disclosed. The optical modulator includes an electro-optical converter and an optical-electric converter, stacked perpendicular to a substrate, and a gate transistor. The gate transistor gates a signal transmitted to the electro-optical converter from the optical-electric converter and allows charges generated in the optical-electric converter and charges remaining in the electro-optical converter to flow while bypassing the electro-optical converter when gating ON is performed.Type: ApplicationFiled: March 10, 2010Publication date: December 23, 2010Applicants: SAMSUNG ELECTRONICS CO., LTD., GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Yong-chul CHO, Jae-hyung JANG, Yong-hwa PARK, Chang-soo PARK, Jong-In SONG
-
Publication number: 20100313935Abstract: A monolithically-integrated photovoltaic module is provided. The module includes an insulating substrate and a lower electrode above the substrate. The method also includes a lower stack of microcrystalline silicon layers above the lower electrode, an upper stack of amorphous silicon layers above the lower stack, and an upper electrode above the upper stack. The upper and lower stacks of silicon layers have different energy band gaps. The module also includes a built-in bypass diode vertically extending in the upper and lower stacks of silicon layers from the lower electrode to the upper electrode. The built-in bypass diode includes portions of the lower and upper stacks that have a greater crystalline portion than a remainder of the lower and upper stacks.Type: ApplicationFiled: June 8, 2010Publication date: December 16, 2010Applicant: THINSILICION CORPORATIONInventors: Kevin Michael Coakley, Guleid Hussen, Jason Stephens, Kunal Girotra, Samuel Rosenthal
-
Patent number: 7838324Abstract: A method of fabricating a neutron detection structure includes temporarily bonding a carrier to a passivated SOI SRAM wafer, removing a first substrate, depositing a conversion layer where at least a portion of the first substrate was removed, permanently bonding a second substrate to the conversion layer, removing the carrier, and providing at least one electrical contact to the device layer. A method of fabricating a neutron detection structure, corresponding to an alternate embodiment, includes temporarily bonding a carrier to a passivated SOI SRAM wafer, removing a first substrate, depositing a conversion layer onto a second substrate, permanently bonding the coated substrate where at least a portion of the first substrate was removed, removing the carrier, and providing at least one electrical contact to the device layer.Type: GrantFiled: December 19, 2008Date of Patent: November 23, 2010Assignee: Honeywell International Inc.Inventor: Thomas R Keyser
-
Publication number: 20100291726Abstract: The present invention relates to a method of fabricating a radiation detector comprising a photosensitive sensor assembly (1, 4), a scintillator (6) that converts the radiation into radiation to which the photosensitive sensor assembly (1, 4) is sensitive, the scintillator (6) being fastened by adhesive bonding to the sensor assembly, the sensor assembly comprising a substrate (4) and several attached sensors (1), the sensors (1) each having two faces (11, 12), a first face (11) of which is bonded to the substrate (4) and a second face (12) of which is bonded to the scintillator (6). The method consists in linking the following operations: the sensors (1) are deposited via their second face (12) on an adhesive film (13); and the sensors (1) are bonded via their first face (11) to the substrate (4).Type: ApplicationFiled: May 22, 2008Publication date: November 18, 2010Applicant: Trixell S.A.S.Inventors: Gerard Vieux, Jean-Michel Vignolle, Pierre Rohr, David Couder, Dubois Sebastien
-
Publication number: 20100289034Abstract: A lens forming method according to the present invention for forming lenses capable of focusing light on a plurality of respective photoelectric conversion sections constituting of a semiconductor apparatus is described. The method includes a lens forming step of processing a lens forming material, in which an average gradient of a ? curve indicating a residual film thickness with respect to the amount of irradiation light is between ?15 and ?0.8 nm·cm2/mJ within the range of a residual film ratio of 10 to 50% or within the range of the amount of irradiation light of 55 to 137 mJ/cm2 into a lens surface shape, using a photomask with an optical transmittance that is varied according to a lens surface shape, as an exposure mask.Type: ApplicationFiled: May 5, 2010Publication date: November 18, 2010Applicant: Sharp Kabushiki KaishaInventor: Junichi Nakai
-
Patent number: 7833818Abstract: An integrated structure of MEMS device and CIS device and a fabricating method thereof includes providing a substrate having a CIS region and a MEMS region defined therein with a plurality of CIS devices positioned in the CIS region; performing a multilevel interconnect process to form a multilevel interconnect structure in the CIS region and the MEMS region and a micro-machined mesh metal in the MEMS region on a front side of the substrate; performing a first etching process to form a chamber in MEMS region in the front side of the substrate; forming a first mask pattern and a second mask pattern respectively in the CIS region and the MEMS region on a back side of the substrate; and performing a second etching process to form a plurality of vent holes connecting to the chamber on the back side of the substrate through the second mask pattern.Type: GrantFiled: December 14, 2008Date of Patent: November 16, 2010Assignee: United Microelectronics Corp.Inventor: Hui-Shen Shih
-
Publication number: 20100282947Abstract: A semiconductor device is manufactured through steps in which a photoelectric conversion element and an amplifier circuit are formed over a first substrate with a release layer interposed therebetween, and the photoelectric conversion element and the amplifier circuit are separated from the first substrate. Output characteristics of the amplifier circuit are improved and the semiconductor device with high reliability is obtained.Type: ApplicationFiled: July 14, 2010Publication date: November 11, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei Yamazaki, Atsushi Hirose, Koji Ono, Hotaka Maruyama
-
Patent number: RE42292Abstract: A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight. A CMOS active pixel image sensor includes a plurality of pinned photodiode photodetectors that use a common output transistor. In one configuration, the charge from two or more pinned photodiodes may be binned together and applied to the gate of an output transistor.Type: GrantFiled: March 30, 2009Date of Patent: April 12, 2011Assignee: Round Rock Research, LLCInventors: Vladimir Berezin, Alexander I. Krymski, Eric R. Fossum