Having Diverse Electrical Device Patents (Class 438/59)
  • Patent number: 8193023
    Abstract: A unit pixel of an image sensor having a three-dimensional structure includes a first chip and a second chip which are stacked, one of the first chip and the second chip having a photodiode, and the other of the first chip and the second chip having a circuit for receiving information from the photodiode and outputting received information. The first chip includes a first pad which is projectedly disposed on an upper surface of the first chip in such a way as to define a concavo-convex structure, and the second chip includes a second pad which is depressedly disposed on an upper surface of the second chip in such a way as to define a concavo-convex structure corresponding to the concavo-convex structure of the first chip. The first chip and the second chip are mated with each other through bonding of the first pad and the second pad.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: June 5, 2012
    Assignee: Siliconfile Technologies Inc.
    Inventor: Heui-Gyun Ahn
  • Publication number: 20120126298
    Abstract: A photovoltaic cell is provided as a composite unit together with elements of an integrated circuit on a common substrate. In a described embodiment, connections are established between a photovoltaic cell portion and a circuitry portion of an integrated structure to enable self-powering of the circuitry portion by the photovoltaic cell portion.
    Type: Application
    Filed: August 25, 2011
    Publication date: May 24, 2012
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yuanning Chen, Nagarajan Sridhar
  • Publication number: 20120126247
    Abstract: A photovoltaic cell is provided as a composite unit together with elements of an integrated circuit on a common substrate. In a described embodiment, connections are established between a multiple photovoltaic cell portion and a circuitry portion of an integrated structure to enable self-powering of the circuitry portion by the multiple photovoltaic cell portion.
    Type: Application
    Filed: August 29, 2011
    Publication date: May 24, 2012
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yuanning Chen, Thomas Patrick Conroy, Jeffrey DeBord, Nagarajan Sridhar
  • Publication number: 20120122262
    Abstract: A thin film solar cell module includes a front substrate; a plurality of thin film solar cells disposed on the front substrate; a rear substrate disposed on the thin film solar cells; a plurality of inter-connection terminals electrically connected to the thin film solar cells, respectively, and exposed to an exterior surface of at least one of the front and rear substrates; and a connector electrically connecting the inter-connection terminals in a series or parallel configuration.
    Type: Application
    Filed: January 18, 2012
    Publication date: May 17, 2012
    Inventors: Yeon-Il Kang, Jin-Seock Kim, Czang-Ho Lee, Hee-Chan Lee, Ku-Hyun Kang
  • Patent number: 8178381
    Abstract: Disclosed are a back side illumination image sensor and a method for manufacturing the same. The back side illumination image sensor includes an isolation region and a pixel area on a front side of a first substrate; a photo detector and a readout circuitry on the pixel area; an interlayer dielectric layer and a metal line on the front side of the first substrate; a second substrate bonded to the front side of the first substrate formed with the metal line; a pixel division ion implantation layer on the isolation region at a back side of the first substrate; and a micro-lens on the photo detector at the back side of the first substrate.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: May 15, 2012
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Mun Hwan Kim
  • Publication number: 20120112253
    Abstract: According to one embodiment, a semiconductor image pickup device includes a pixel area and a non-pixel area. The device includes a first photoelectric conversion element formed in the pixel area, a first transistor formed in the pixel area and connected to the first photoelectric conversion element, a second photoelectric conversion element formed in the non-pixel area, a second transistor formed in the non-pixel area and connected to the second photoelectric conversion element, a metal wire formed at least in the non-pixel area, a first cap layer formed on the metal wire to prevent diffusion of metal contained in the metal wire, and a dummy via wire formed in the non-pixel area and penetrating the first cap layer.
    Type: Application
    Filed: September 14, 2011
    Publication date: May 10, 2012
    Inventor: Hidetoshi KOIKE
  • Publication number: 20120100658
    Abstract: Provided is a method of forming a semiconductor device. The method includes forming an insulating film on a semiconductor substrate, a conductive film on the insulating film, and a first structure and a second structure on the conductive film. The semiconductor substrate has first and second regions. The first and second structures are formed on the first and second regions, respectively. An impurity diffused region is formed in the semiconductor substrate using the first structure as a mask. The impurity diffused region overlaps the first structure. A portion of the first structure, and the conductive film are etched to respectively form a gate structure and a capacitor structure on the first and second regions.
    Type: Application
    Filed: September 8, 2011
    Publication date: April 26, 2012
    Inventors: JONG-WON CHOI, Jun-Seok Yang, Keon-Yong Cheon, Sung-Hyun Yoon
  • Patent number: 8158453
    Abstract: A CMOS active pixel sensor (APS) cell structure having dual workfunction transfer gate device and method of fabrication. The transfer gate device comprises a dielectric layer formed on a substrate and a dual workfunction gate conductor layer formed on the dielectric layer comprising a first conductivity type doped region and an abutting second conductivity type doped region. The transfer gate device defines a channel region where charge accumulated by a photosensing device is transferred to a diffusion region. A silicide structure is formed atop the dual workfunction gate conductor layer for electrically coupling the first and second conductivity type doped regions. In one embodiment, the silicide contact is smaller in area dimension than an area dimension of said dual workfunction gate conductor layer. Presence of the silicide strap prevents the diodic behavior from allowing one or the other side of the gate to float to an indeterminate voltage.
    Type: Grant
    Filed: February 3, 2010
    Date of Patent: April 17, 2012
    Assignees: International Business Machines Corporation, Omnivision Technologies, Inc.
    Inventors: James W. Adkisson, John J. Ellis-Monaghan, R. Michael Guidash, Mark D. Jaffe, Edward T. Nelson, Richard J. Rassel, Charles V. Stancampiano
  • Patent number: 8154098
    Abstract: A reverse image sensor module includes first and second semiconductor chips, and first and second insulation layers. The first semiconductor chip includes a first semiconductor chip body having a first surface and a second surface facing away from the first surface, photodiodes disposed on the first surface, and a wiring layer disposed on the second surface and having wiring lines electrically connected to the photodiodes and bonding pads electrically connected to the wiring lines. The second semiconductor chip includes a second semiconductor chip body having a third surface facing the wiring layer, and through-electrodes electrically connected to the bonding pads and passing through the second semiconductor chip body. The first insulation layer is disposed on the wiring layer, and the second insulation layer is disposed on the third surface of the second semiconductor chip body facing the first insulation layer and is joined to the first insulation layer.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: April 10, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventor: Seung Taek Yang
  • Publication number: 20120080732
    Abstract: Pixel sensor cells, e.g., CMOS optical imagers, methods of manufacturing and design structures are provided with isolation structures that prevent carrier drift to diffusion regions. The pixel sensor cell includes a photosensitive region and a gate adjacent to the photosensitive region. The pixel sensor cell further includes a diffusion region adjacent to the gate. The pixel sensor cell further includes an isolation region located below a channel region of the gate and about the photosensitive region, which prevents electrons collected in the photosensitive region to drift to the diffusion region.
    Type: Application
    Filed: October 4, 2010
    Publication date: April 5, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Brent A. ANDERSON, Mark D. JAFFE
  • Patent number: 8149307
    Abstract: A method and apparatus providing a CMOS imager with an integrated controller on a common integrated circuit substrate. Also integrated on the common substrate are, a serializer circuit including a dynamic arbiter under the control of the microcontroller core and a set of extended special function registers through which data is passed to allow the microcontroller to control the CMOS imager and the serializer circuit.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: April 3, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Atif Sarwari
  • Patent number: 8138004
    Abstract: A manufacturing method of a photoelectric conversion device includes the following steps: forming a first electrode over a substrate; and, over the first electrode, forming a photoelectric conversion layer that includes a first conductive layer having one conductivity, a second semiconductor layer, and a third semiconductor layer having a conductivity opposite to the one conductivity of the second semiconductor layer over the first electrode. The manufacturing method further includes the step of removing a part of the second semiconductor layer and a part of the third semiconductor layer in a region of the photoelectric conversion layer so that the third semiconductor layer does not overlap the first electrode.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: March 20, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuusuke Sugawara, Kazuo Nishi, Tatsuya Arao, Daiki Yamada, Hidekazu Takahashi, Naoto Kusumoto
  • Publication number: 20120058589
    Abstract: Provided is a method of manufacturing a semiconductor device which can form a high-performance photodiode in which variation in output characteristics and performance deterioration are suppressed. A prescribed gate metal is used to form a shield section 34a that covers a portion of a first semiconductor layer 30a for a photodiode that becomes an intrinsic semiconductor region on a gate insulating film 29 and to form first to fourth gate electrodes 34b to 34e that cover portions of respective second to fifth semiconductor layers 30b to 30e for thin film transistors that become channel regions on the gate insulating film 29. Then, using the shield section 34a as a mask, an n-type region and p-type region are formed in the first semiconductor layer 30a. Then, the shield section 34a is removed.
    Type: Application
    Filed: April 6, 2010
    Publication date: March 8, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Hiroyuki Kaigawa
  • Patent number: 8124438
    Abstract: A CMOS image sensor and a method of fabricating the same. The CMOS image sensor may minimize disappearance of electrons generated by light without transmission of electrons to a transfer gate. A method of manufacturing a CMOS image sensor may include forming a trench over an isolation region of a semiconductor substrate to define an active region including a photodiode region and a transistor region. The method may include forming first conductivity-type ion implanted regions over a trench side wall of a photodiode region and over a region adjacent to the transistor region. The method may include forming second conductivity-type ion implanted regions between a first conductivity-type ion implanted region and a trench, and between a lower part of a transistor region and a first conductivity-type ion implanted region. The method may include forming an isolation layer, forming a gate electrode and a spacer, and/or forming a photodiode.
    Type: Grant
    Filed: September 24, 2009
    Date of Patent: February 28, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Ji-Hwan Park
  • Patent number: 8105861
    Abstract: A carbon-containing semiconductor layer is formed on exposed surfaces of a p? doped semiconductor layer abutting sidewalls of a shallow trench. Following formation of a dielectric layer on the carbon-containing semiconductor layer, a surface pinning layer having a p-type doping is formed underneath the carbon-containing semiconductor layer. A shallow trench isolation structure and a photodiode are subsequently formed. Diffusion of defects directly beneath the shallow trench isolation structure, now contained in the carbon-containing semiconductor layer, is suppressed. Further, boron diffusion into the shallow trench isolation structure and into the photodiode is also suppressed by the carbon-containing semiconductor layer, providing reduction in dark current and enhancement of performance of the photodiode.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: January 31, 2012
    Assignee: International Business Machines Corporation
    Inventors: James W. Adkisson, Rajendran Krishnasamy
  • Publication number: 20120018617
    Abstract: Disclosed herein is a semiconductor device including an element isolation region configured to be formed on a semiconductor substrate, wherein the element isolation region is formed of a multistep trench in which trenches having different diameters are stacked and diameter of an opening part of the lower trench is smaller than diameter of a bottom of the upper trench.
    Type: Application
    Filed: June 17, 2011
    Publication date: January 26, 2012
    Applicant: Sony Corporation
    Inventor: Yuki Miyanami
  • Publication number: 20110316830
    Abstract: A photo detector is disclosed. The photo detector includes a substrate, a first patterned semiconductor layer, a dielectric layer, a patterned conductive layer, an inter-layer dielectric, a second patterned semiconductor layer, two first electrodes disposed on the inter-layer dielectric and two second electrodes disposed on portions of the second semiconductor layer. The first patterned semiconductor layer having a first doping region and a second doping region is disposed on a transistor region. The dielectric layer is disposed to cover the substrate and the first semiconductor layer, the patterned conductive layer is disposed on the dielectric layer, and the inter-layer dielectric having at least two openings adapted to expose the first doping region and the second doping region is disposed to cover the dielectric layer. The second patterned semiconductor layer is disposed on a photosensitive region and the first electrodes are electrically connected to the first patterned semiconductor layer.
    Type: Application
    Filed: September 7, 2011
    Publication date: December 29, 2011
    Inventors: Yu-Min Lin, Hsin-Li Chen, Feng-Yuan Gan
  • Patent number: 8084290
    Abstract: A method of forming a CMOS image sensor and a CMOS image sensor. A method of forming a CMOS image sensor may include forming a plurality of photodiodes on and/or over a semiconductor substrate at regular intervals, forming an interlayer insulating film on and/or over an entire surface of a semiconductor substrate including photodiodes, coating an organic compound on and/or over an entire surface of an interlayer insulating film, coating photoresist on and/or over an organic compound, subjecting a photoresist to exposure and/or development to form a photoresist pattern which may expose an interlayer insulating film opposite to a photodiode region, selectively etching a portion of an exposed interlayer insulating film using a photoresist pattern as a mask, and/or removing a photoresist pattern.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: December 27, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Chung-Kyung Jung
  • Patent number: 8071415
    Abstract: There is provided a method of fabricating a semiconductor device having plural light receiving elements, and having an amplifying element, the method including: a) forming an active region on the semiconductor substrate for configuring the amplifying element; b) forming a light receiving element region on the semiconductor substrate for forming the plural light receiving elements, with the active region acting as a reference for positioning; c) implanting an impurity into the light receiving element region; d) repeating the process b) and the process c) a number of times that equals a number of diffusion layers in the light receiving element region; e) after implanting the impurity, performing a drive-in process to carry out drive in of the semiconductor substrate; and f) the process e), forming an amplifying element forming process by implanting an impurity in the active region.
    Type: Grant
    Filed: March 15, 2010
    Date of Patent: December 6, 2011
    Assignee: Lapis Semiconductor Co., Ltd.
    Inventors: Tomohiro Okamura, Masao Okihara
  • Patent number: 8072015
    Abstract: A solid-state imaging device includes a photoelectric conversion unit, a transistor, and an element separation region separating the photoelectric conversion unit and the transistor. The photoelectric conversion unit and the transistor constitute a pixel. The element separation region is formed of a semiconductor region of a conductivity type opposite to that of a source region and a drain region of the transistor. A part of a gate electrode of the transistor protrudes toward the element separation region side beyond an active region of the transistor. An insulating film having a thickness substantially the same as that of a gate insulating film of the gate electrode of the transistor is formed on the element separation region continuing from a part thereof under the gate electrode of the transistor to a part thereof continuing from the part under the gate electrode of the transistor.
    Type: Grant
    Filed: May 13, 2008
    Date of Patent: December 6, 2011
    Assignee: Sony Corporation
    Inventor: Kazuichiro Itonaga
  • Patent number: 8067261
    Abstract: A solid-state imaging device includes a photoelectric conversion unit, a transistor, and an element separation region separating the photoelectric conversion unit and the transistor. The photoelectric conversion unit and the transistor constitute a pixel. The element separation region is formed of a semiconductor region of a conductivity type opposite to that of a source region and a drain region of the transistor. A part of a gate electrode of the transistor protrudes toward the element separation region side beyond an active region of the transistor. An insulating film having a thickness substantially the same as that of a gate insulating film of the gate electrode of the transistor is formed on the element separation region continuing from a part thereof under the gate electrode of the transistor to a part thereof continuing from the part under the gate electrode of the transistor.
    Type: Grant
    Filed: March 8, 2010
    Date of Patent: November 29, 2011
    Assignee: Sony Corporation
    Inventor: Kazuichiro Itonaga
  • Patent number: 8067740
    Abstract: An image sensor includes a semiconductor substrate; first pixels laid out above cavities provided within the semiconductor substrate, the first pixels converting thermal energy generated by incident light into an electric signal; supporting parts connected between the first pixels and the semiconductor substrate, the supporting parts supporting the first pixels above the cavities; and second pixels fixedly provided on the semiconductor substrate without via the cavities, wherein a plurality of the first pixels and a plurality of the second pixels are laid out two-dimensionally to form a pixel region, and each of the second pixels is adjacent to the first pixels.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: November 29, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Keita Sasaki, Hideyuki Funaki, Hiroto Honda, Ikuo Fujiwara, Koichi Ishii, Hitoshi Yagi
  • Patent number: 8062919
    Abstract: An integrated circuit, and method for manufacturing the integrated circuit, where the integrated circuit can include a phototransistor comprising a base having a SiGe base layer of a predetermined germanium composition and a thickness of more than 65 nm and less than about 90 nm. The integrated circuit can further include a transimpedance amplifier (TIA) receiving an output from the phototransistor. The phototransistor and the TIA can be built on a silicon substrate.
    Type: Grant
    Filed: August 10, 2007
    Date of Patent: November 22, 2011
    Assignee: Cornell Research Foundation, Inc.
    Inventors: Alyssa B. Apsel, Anand M. Pappu, Cheng Po Chen, Tao Yin
  • Publication number: 20110272560
    Abstract: A semiconductor imager device is arranged for receiving a series of charge packets. It comprises a charge-to-voltage conversion circuit for receiving the charge packets on a reception capacitance and has an interconnected arrangement of a floating diffusion, a first reset gate, a reset drain and a source follower for readout. In particular, the device has a series arrangement of at least the first reset gate as a proximate reset gate and furthermore a distal reset gate, wherein in a high-gain configuration the proximate reset gate is cyclically controlled and the distal reset gate is continuously on, thus limiting the reception capacitance to a relatively low value. Alternatively, in a low-gain configuration the proximate reset gate is continuously on, thus extending the capacitance to a relatively high value and the distal reset gate replaces the proximate reset gate as being cyclically controlled for conversion of the series of charge packets.
    Type: Application
    Filed: May 6, 2010
    Publication date: November 10, 2011
    Inventor: Jan Theodoor Jozef Bosiers
  • Publication number: 20110265857
    Abstract: A solar module with a bypass diode integrated therein, fabricated on the basis of the standard thin film solar module. By connecting a series of p-n junction to a non-functional p-n junction in anti-parallel, the non-functional p-n junction in the standard thin film solar module is used as the bypass diode. Hence no additional bypass diode is needed in the design.
    Type: Application
    Filed: April 29, 2011
    Publication date: November 3, 2011
    Inventors: Chiou Fu Wang, Huo-Hsien Chiang
  • Patent number: 8048791
    Abstract: Methods for forming a semiconductor device comprising a semiconductor substrate are provided. In accordance with an exemplary embodiment, a method comprises forming a channel layer overlying the semiconductor substrate, forming a channel capping layer having a first surface overlying the channel layer, oxidizing the first surface of the channel capping layer, and depositing a high-k dielectric layer overlying the channel capping layer.
    Type: Grant
    Filed: February 23, 2009
    Date of Patent: November 1, 2011
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Michael Hargrove, Richard J. Carter, Ying H Tsang, George Kluth, Kisik Choi
  • Publication number: 20110256655
    Abstract: Highly efficient, low energy, low light level imagers and photodetectors are provided. In particular, a novel class of Della-Doped Electron Bombarded Array (DDEBA) photodetectors that will reduce the size, mass, power, complexity, and cost of conventional imaging systems while improving performance by using a thinned imager that is capable of detecting low-energy electrons, has high gain, and is of low noise.
    Type: Application
    Filed: February 11, 2011
    Publication date: October 20, 2011
    Applicant: California Institute of Technology
    Inventors: Shouleh Nikzad, Chris Martin, Michael E. Hoenk
  • Patent number: 8039287
    Abstract: Embodiments of the present invention provide a pixel cell for an image sensor that includes a photodiode, which provides high gain, low noise, and low dark current. The pixel cell includes a photodiode comprising layers of a first material and at least a second material in contact with one another. The photodiode generates charge in response to light and also amplifies the charge. The layers may be configured to promote impact ionization by a first carrier type and suppress impact ionization by a second carrier type. The pixel cell also includes a gate of a transistor adjacent to the photodiode and may include readout circuitry for reading out the charge generated and amplified by the photodiode.
    Type: Grant
    Filed: January 14, 2005
    Date of Patent: October 18, 2011
    Assignee: Micron Technology, Inc.
    Inventor: Chandra Mouli
  • Patent number: 8030114
    Abstract: A method to fabricate an image sensor includes providing a semiconductor substrate having a pixel region and a periphery region, forming a light sensing element on the pixel region, and forming at least one transistor in the pixel region and at least one transistor in the periphery region. The step of forming the at least one transistor in the pixel region and periphery region includes forming a gate electrode in the pixel region and periphery region, depositing a dielectric layer over the pixel region and periphery region, partially etching the dielectric layer to form sidewall spacers on the gate electrode and leaving a portion of the dielectric layer overlying the pixel region, and forming source/drain (S/D) regions by ion implantation.
    Type: Grant
    Filed: April 10, 2007
    Date of Patent: October 4, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Chieh Chuang, Chin-Min Lin, Ken Wen-Chien Fu, Dun-Nian Yaung
  • Publication number: 20110234830
    Abstract: Provided is a solid-state image pickup device including: a plurality of pixels, each of which includes a photoelectric conversion portion and a pixel transistor formed in a front surface side of a substrate, wherein a rear surface side of the substrate is set as a light receiving plane of the photoelectric conversion portion; and an element, which becomes a passive element or an active element, which is disposed in the front surface side of the substrate so as to be superimposed on the photoelectric conversion portion.
    Type: Application
    Filed: February 9, 2011
    Publication date: September 29, 2011
    Applicant: Sony Corporation
    Inventors: Yukihiro Kiyota, Keiji Mabuchi
  • Publication number: 20110221956
    Abstract: A solid-state image pickup device includes a solid-state image sensor chip having a solid-state image sensor having a photosensitive element formed on a main surface of a semiconductor substrate and chip electrodes led to the back surface of the semiconductor substrate, a passive chip bonded on the back surface of the solid-state image sensor chips having passive parts mounted in its thickness and electrically connected to the chip electrodes of the solid-state image sensors. The device further includes a lens holder fixed to enclose the photosensitive element of the solid-state image pickup sensor chip and a lens barrel to fit into the lens holders, wherein the passive chip is formed having a size equal to or smaller than a size of the solid-state image sensors.
    Type: Application
    Filed: May 26, 2011
    Publication date: September 15, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hirokazu SEKINE, Masanori Ashino
  • Publication number: 20110215226
    Abstract: Presented invention describes the approach for manufacturing of the pixels for solid state imaging devices possessing a photon detection efficiency superior to those currently available. Formation of a bipolar junction transistor (BJT) in close vicinity of the photodiode in such a way that accumulation area of the photodiode also represents its collector region allows for conversion of the photo carriers which cannot be accumulated in a regular 4T pixel, usually holes, into complimentary type carriers, usually electrons, that can be stored, read out and converted to electric signal. This transistor can be formed, for example, by creating a n+ region inside the surface p layer of the pinned photodiode. In the described structure the accumulation region is isolated from the surface and operation of the new pixel is otherwise similar to the 4T pixel operation. As a result, both main advantages of 4T pixel: low dark current and kTC noise cancellation are, therefore, preserved.
    Type: Application
    Filed: March 3, 2010
    Publication date: September 8, 2011
    Inventor: Dmitri Jerdev
  • Patent number: 8008108
    Abstract: To provide a solid-state imaging device able to improve light transmittance of a transparent insulation film in a light incident side of a substrate, suppress the dark current, and prevent a quantum efficiently loss, wherein a pixel circuit is formed in a first surface of the substrate and light is received from a second surface, and having: a light receiving unit formed in the substrate and for generating a signal charge corresponding to an amount of incidence light and storing it; a transparent first insulation film formed on the second surface; and a transparent second insulation film formed on the first insulation film and for retaining a charge having the same polarity as the signal charge in an interface of the first insulation film or in inside, thicknesses of the first and second insulation film being determined to obtain a transmittance higher than when using only the first insulation film.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: August 30, 2011
    Assignee: Sony Corporation
    Inventors: Hideo Kanbe, Takayuki Ezaki
  • Patent number: 7998778
    Abstract: To provide a solid-state imaging device able to improve light transmittance of a transparent insulation film in a light incident side of a substrate, suppress the dark current, and prevent a quantum efficiently loss, wherein a pixel circuit is formed in a first surface of the substrate and light is received from a second surface, and having: a light receiving unit formed in the substrate and for generating a signal charge corresponding to an amount of incidence light and storing it; a transparent first insulation film formed on the second surface; and a transparent second insulation film formed on the first insulation film and for retaining a charge having the same polarity as the signal charge in an interface of the first insulation film or in inside, thicknesses of the first and second insulation film being determined to obtain a transmittance higher than when using only the first insulation film.
    Type: Grant
    Filed: May 14, 2010
    Date of Patent: August 16, 2011
    Assignee: Sony Corporation
    Inventors: Hideo Kanbe, Takayuki Ezaki
  • Patent number: 7993951
    Abstract: In a method of manufacturing a photoelectric conversion device having a pixel region and a peripheral circuit region, a semiconductor compound layer is formed by causing a surface of a diffusion layer or gate electrode of a MOS transistor in the peripheral circuit region to react with a high melting point metal, then an insulating layer is formed in the pixel region and the peripheral circuit region after the step of forming a semiconductor compound layer. A contact hole is formed in the insulating layer to expose a diffusion layer in the pixel region, and a contact hole is formed in the insulating layer to expose the semiconductor compound layer formed in the peripheral circuit region. These holes are formed at different timings. Prior to forming the hole which is formed later, a contact plug is formed in the contact hole which is formed earlier.
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: August 9, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takehito Okabe, Hiroaki Naruse, Ryuichi Mishima, Kouhei Hashimoto
  • Publication number: 20110180860
    Abstract: A solid-state imaging apparatus includes a plurality of pixels each including a photoelectric conversion unit and pixel transistors, which are formed on a semiconductor substrate; a floating diffusion unit in the pixel; a first-conductivity-type ion implantation area for surface pinning, which is formed over the surface on the side of the photoelectric conversion unit and the surface of the semiconductor substrate; and a second-conductivity-type ion implantation area for forming an overflow path serving as an overflow path for the floating diffusion unit, the second-conductivity-type ion implantation area being formed below the entire area of the first-conductivity-type ion implantation area. An overflow barrier is formed using the second-conductivity-type ion implantation area. A charge storage area is formed using an area in which the second-conductivity-type semiconductor area and the second-conductivity-type ion implantation area superpose each other.
    Type: Application
    Filed: December 22, 2010
    Publication date: July 28, 2011
    Applicant: Sony Corporation
    Inventors: Akihiro Yamada, Atsuhiko Yamamoto, Hideo Kido
  • Patent number: 7985613
    Abstract: A method of manufacturing a back side illumination image sensor is provided. The method can include forming an ion implantation layer in a front side of a first substrate, forming a photodetector and a readout circuit on the first substrate, forming an interlayer dielectric layer and a metal line on the front side of the first substrate, bonding a second substrate with the front side of the first substrate, removing a lower portion of the first substrate on the basis of the ion implantation layer, performing an annealing process with respect on a back side of the first substrate, and forming a microlens over the photodetector.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: July 26, 2011
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Mun Hwan Kim
  • Patent number: 7981717
    Abstract: An image sensor includes a pixel array including a photodiode, a peripheral region including a logic circuit, and an isolation region formed between the pixel array and the peripheral region and formed under the peripheral region to electrically isolate the pixel array from the peripheral region.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: July 19, 2011
    Assignee: Dongbu Hitek Co., Ltd
    Inventor: Su Lim
  • Publication number: 20110168905
    Abstract: An X-ray detector includes an X-ray photoelectric conversion layer configured to produce electric charges in proportion to X-ray irradiation incident on the layer, a collecting electrode configured to collect the electric charges produced by the X-ray photoelectric conversion layer, a common electrode disposed on a surface of the X-ray photoelectric conversion layer opposite to the collecting electrode, a storage capacitor configured to store the electric charges collected by the collecting electrode, and a readout unit configured to read out the electric charges stored in the storage capacitor. A voltage is to be applied between the collecting electrode and the common electrode. The X-ray photoelectric conversion layer is formed of a polycrystalline oxide.
    Type: Application
    Filed: January 4, 2011
    Publication date: July 14, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hisato Yabuta, Nobuyuki Kaji, Ryo Hayashi, Masatoshi Watanabe, Taihei Mukaide, Kazunori Fukuda
  • Patent number: 7977140
    Abstract: A method for producing a solid-state imaging device includes steps of: forming transfer electrodes on a substrate having a plurality of light-sensing portions through a gate insulating layer so that the light-sensing portions are exposed; forming a planarized insulating layer on the substrate to cover the transfer electrodes formed on the substrate; forming openings in the planarized insulating layer so that each of the transfer electrodes is partly exposed out of the planarized insulating layer at a predetermined position; forming a wiring material layer so that the openings are filled with the wiring material layer; forming a resist layer on the wiring material layer; exposing and developing the resist layer so that only the resist layer in a predetermined area covering the openings is left; and patterning the wiring material layer using the exposed and developed resist layer to form connection wirings connected to the transfer electrodes by the openings.
    Type: Grant
    Filed: March 23, 2009
    Date of Patent: July 12, 2011
    Assignee: Sony Corporation
    Inventors: Takeshi Takeda, Yukihiro Ando, Masaki Okamoto, Masayuki Okada, Kaori Takimoto, Katsuhisa Kugimiya, Tadayuki Kimura
  • Publication number: 20110156113
    Abstract: A back side illumination image sensor reduced in chip size has a capacitor disposed in a vertical upper portion of a pixel region in the back side illumination image sensor in which light is illuminated from a back side of a subscriber, thereby reducing a chip size, and a method for manufacturing the back side illumination image sensor. The capacitor of the back side illumination image sensor reduced in chip size is formed in the vertical upper portion of the pixel region, not in the outside of a pixel region, so that the outside area of the pixel region for forming the capacitor is not required, thereby reducing a chip size.
    Type: Application
    Filed: December 22, 2010
    Publication date: June 30, 2011
    Applicant: SILICONFILE TECHNOLOGIES INC.
    Inventors: In - Gyun JEON, Se - Jung Oh, Heui - Gyun Ahn, Jun - Ho Won
  • Publication number: 20110147707
    Abstract: The present invention provides an image pickup device used to capture an image of an object by receiving light in a near infrared region reflected from the object. The image pickup device includes semiconductor light-receiving elements each having a light-receiving layer with a band gap wavelength of 1.65 to 3.0 ?m.
    Type: Application
    Filed: December 10, 2010
    Publication date: June 23, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hiroshi INADA, Yasuhiro IGUCHI, Youichi NAGAI, Hiroki MORI, Kouhei MIURA
  • Patent number: 7964929
    Abstract: The disclosed embodiments employ shared pixel component architectures that arrange the shared pixel components for a group of pixels within different pixels of the group.
    Type: Grant
    Filed: August 23, 2007
    Date of Patent: June 21, 2011
    Assignee: Aptina Imaging Corporation
    Inventor: Xiaofeng Fan
  • Publication number: 20110133057
    Abstract: An anti-eclipse circuit for an imager is formed from pixel circuitry over the same semiconductor substrate as the imaging pixels. More specifically, two adjacent pixel circuits are modified to form an amplifier. One input of the amplifier is adapted to receive a reset signal from one of the pixel circuits while another input is adapted to be set at a predetermined offset voltage from the output of the amplifier. The amplifier is preferably a unity gain amplifier, so that the output of the amplifier set to a voltage level equal to the predetermined offset from the voltage level of the reset signal. Accordingly, the anti-eclipse circuit outputs a reference voltage at predetermined level from the reset voltage of a pixel and does not need to be calibrated for fabrication related variances in reset voltages.
    Type: Application
    Filed: February 17, 2011
    Publication date: June 9, 2011
    Inventor: Espen A. Olsen
  • Publication number: 20110136288
    Abstract: An embodiment relates to a method of manufacturing a device comprising a substrate having a front side and a back-side, a nanowire disposed on the back-side and an image sensing circuit disposed on the front side, wherein the nanowire is configured to be both a channel to transmit wavelengths up to a selective wavelength and an active element to detect the wavelengths up to the selective wavelength transmitted through the nanowire.
    Type: Application
    Filed: December 8, 2009
    Publication date: June 9, 2011
    Applicant: ZENA TECHNOLOGIES, INC.
    Inventors: Peter DUANE, Young-June Yu, Munib Wober
  • Patent number: 7955870
    Abstract: The present invention relates generally to semiconductor fabrication and particularly to fabricating magnetic tunnel junction devices. In particular, this invention relates to a method for using the dielectric layer in tunnel junctions as an etch stop layer to eliminate electrical shorting that can result from the patterning process.
    Type: Grant
    Filed: September 2, 2009
    Date of Patent: June 7, 2011
    Assignee: OEM Group Inc.
    Inventor: Robert A. Ditizio
  • Publication number: 20110121420
    Abstract: A reverse image sensor module includes first and second semiconductor chips, and first and second insulation layers. The first semiconductor chip includes a first semiconductor chip body having a first surface and a second surface facing away from the first surface, photodiodes disposed on the first surface, and a wiring layer disposed on the second surface and having wiring lines electrically connected to the photodiodes and bonding pads electrically connected to the wiring lines. The second semiconductor chip includes a second semiconductor chip body having a third surface facing the wiring layer, and through-electrodes electrically connected to the bonding pads and passing through the second semiconductor chip body. The first insulation layer is disposed on the wiring layer, and the second insulation layer is disposed on the third surface of the second semiconductor chip body facing the first insulation layer and is joined to the first insulation layer.
    Type: Application
    Filed: December 28, 2009
    Publication date: May 26, 2011
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventor: Seung Taek YANG
  • Publication number: 20110115003
    Abstract: A solid-state imaging device includes a photoelectric conversion portion that is provided above an imaging surface of a substrate, and a plurality of readout circuit portions that are provided below the photoelectric conversion portion on the imaging surface. The photoelectric conversion portion includes a photoelectric conversion film that receives incident light and produces a signal charge, and a first electrode and a second electrode that sandwich the photoelectric conversion film, and the first electrode, the photoelectric conversion film, and the second electrode are sequentially layered upward on the imaging surface. Further, each of the readout circuit portions includes a readout circuit that is electrically connected with the first electrode and reads out the signal charge produced by the photoelectric conversion portion, and a ground electrode that is grounded, and the ground electrode is interposed between the readout circuit and the first electrode on the imaging surface.
    Type: Application
    Filed: November 3, 2010
    Publication date: May 19, 2011
    Applicant: SONY CORPORATION
    Inventors: Hiroyuki Okita, Toshitaka Kawashima
  • Patent number: 7943534
    Abstract: A semiconductor device manufacturing method and a semiconductor device manufacturing system for irradiating a first laser light (50) and a second laser light (52) with a wavelength different from that of the first laser light to a substrate (46) to perform a thermal processing on the substrate are provided. In the step for performing the thermal processing, at least one of an irradiation intensity and an irradiation time of a first laser and a second laser is controlled to control a temperature distribution in the substrate or a film on the substrate in a depth direction.
    Type: Grant
    Filed: July 24, 2006
    Date of Patent: May 17, 2011
    Assignee: Phoeton Corp.
    Inventors: Akira Matsuno, Takashi Nire
  • Patent number: 7939357
    Abstract: An active pixel using a photodiode with multiple species of P type dopants is disclosed. The pixel comprises a photodiode formed in a semiconductor substrate. The photodiode is a P? region formed within an N-type region. The P? region is formed from an implant of boron and an implant of indium. Further, the pixel includes a transfer transistor formed between the photodiode and a floating node and selectively operative to transfer a signal from the photodiode to the floating node. Finally, the pixel includes an amplification transistor controlled by the floating node.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: May 10, 2011
    Assignee: OmniVision Technologies, Inc.
    Inventor: Howard E. Rhodes