Abstract: A method of manufacturing a photodiode sensor and an associated charge transfer transistor includes forming an insulation region on a substrate, forming the diode on a first side of the insulation region with the diode being self-aligned on the insulation region, and replacing the insulation region by a gate of the charge transfer transistor. The invention has particular utility in the manufacture of CMOS or CCD image sensors.

Abstract: A radiation detecting apparatus includes: a sensor panel that has a substrate, and has a plurality of pixels each of which has a photoelectric conversion element for converting light into an electric signal, arranged on the substrate; and a scintillator layer arranged on a reverse side of the pixels with respect to the substrate, wherein the scintillator layer contains an activator added in a main ingredient, and has a higher concentration of the activator in a peripheral area than in a center area, in a surface direction of the scintillator layer.

Abstract: A semiconductor image sensor module and a method for manufacturing thereof as well as a camera and a method for manufacturing thereof are provided in which a semiconductor image sensor chip and an image signal processing chip are connected with a minimum parasitic resistance and parasitic capacity and efficient heat dissipation of the image signal processing chip and shielding of light are simultaneously obtained.

Abstract: A method for manufacturing high-injection heterojunction bipolar transistor capable of being used as a photonic device is disclosed. A sub-collector layer is formed on a substrate. A collector layer is then deposited on top of the sub-collector layer. After a base layer has been deposited on top of the collector layer, a quantum well layer is deposited on top of the base layer. An emitter is subsequently formed on top of the quantum well layer.

Abstract: An active pixel using a photodiode with multiple species of N type dopants is disclosed. The pixel comprises a photodiode formed in a semiconductor substrate. The photodiode is an N? region formed within a P-type region. The N? region is formed from an implant of arsenic and an implant of phosphorus. Further, the pixel includes a transfer transistor formed between the photodiode and a floating node and selectively operative to transfer a signal from the photodiode to the floating node. Finally, the pixel includes an amplification transistor controlled by the floating node.

Abstract: A solar cell array including a first solar cell with an integral bypass diode and an adjacent second solar cell and two discrete metal interconnection members coupling the anode of the bypass diode of the first cell with the anode of the second solar cell.

Abstract: An optical memory cell having a material layer associated with a pixel capable of emitting and receiving light. The material layer has phosphorescent material formed therein for storing data as light received from and emitted to the pixel.

Abstract: A photodiode includes an anode (1202, 1302, 1402) and a cathode (1306, 1406) formed on a semiconductor substrate (402). A vertical electrode (702, 1314, 1414) is in operative electrical communication with a buried component (502, 1312, 1412) of the photodiode. In one implementation, the photodiode is an avalanche photodiode of a silicon photomultiplier. The substrate may also include integrated CMOS readout circuitry (1102).

Abstract: A photosensitive device (100), the photosensitive device (100) comprising a substrate (101) and a plurality of vertically aligned nanowire diodes (102 to 105) provided on and/or in the substrate (101).

Abstract: A method of forming a semiconductor layer, which in one embodiment is part of a photodetector, includes forming a silicon shape, applying ozonated water, removing the first oxide layer at a temperature below 600 degrees Celsius, and epitaxially growing germanium. The silicon shape has a top surface that is exposed. The ozonated water is applied to the top surface and causes formation of a first oxide layer on the top surface. The germanium is grown on the top surface.

Abstract: The present invention describes nano-scale fabrication technique used to create a sub-micron wide gap across the center conductor of a coplanar waveguide transmission line configured in a fixed-fixed beam arrangement, resulting in a pair of opposing cantilever beams that comprise an electro-mechanical switch. Accordingly, a nanometer-scale mechanical switch with very high switching speed and low actuation voltage has been developed. This switch is intended primarily for application in the RF/microwave/wireless industry.

Abstract: A reliable image sensor and a method for forming the same are provided. The image sensor includes a photo-detective device. At least one transistor is electrically connected to the photo-detective device for outputting charges stored in the photo-detective device. A transistor directly connected to the photo-detective device includes a gate electrode pattern and an ion-implantation interrupting pattern arranged on the gate electrode pattern. Since the ion-implantation interrupting pattern is located on an upper portion of the gate electrode pattern of the transistor in the vicinity of the photo-detective device, a threshold voltage of the gate electrode pattern of the transistor in the vicinity of the photo-detective device is adjusted to a desired value.

Abstract: A complementary metal oxide semiconductor (CMOS) image sensor (CIS) and a method for fabricating the same. A method for fabricating a CIS includes implanting first conductive type dopants in a semiconductor substrate to form a photodiode region in a surface of the semiconductor substrate, implanting second conductive type dopants in the photo diode region to form a second conductive type diffusion region, and implanting fluorine ions in the second conductive type diffusion region to form a fluorine diffusion region.

Abstract: Embodiments relate to a method of manufacturing an image sensor which may include forming a gate pattern including a tunnel oxide film, an oxide-nitride-oxide (ONO) film, a floating gate and a control gate over a semiconductor substrate. An oxide film and a nitride film may be formed over the semiconductor substrate including the gate pattern. A photoresist pattern may be formed which covers the oxide film and the nitride film formed over the gate pattern. The nitride film may be etched in a region not covered by the photoresist pattern. The oxide film may be etched to have a predetermined thickness. A deep implant process may deeply implant an N-type dopant into the semiconductor substrate. Ashing and cleaning processes may remove the remaining photoresist pattern.

Abstract: Provided is an image sensor. The image sensor can include a first substrate comprising a pixel portion in which a readout circuitry is provided and a peripheral portion in which a peripheral circuitry is provided. An interlayer dielectric including lines can be formed on the first substrate to connect with the readout circuitry and the peripheral circuitry. A crystalline semiconductor layer can be provided on a portion of the interlayer dielectric corresponding to the pixel portion through a bonding process. The crystalline semiconductor layer can include a first photodiode and second photodiode. The first and second photodiodes can be defined by device isolation trenches in the crystalline semiconductor layer. A device isolation layer can be formed on the crystalline semiconductor layer comprising the device isolation trenches. An upper electrode layer passes through the device isolation layer to connect with a portion of the first photodiode.

Abstract: Provided are an image sensor and a method for manufacturing the same. The image sensor comprises a readout circuitry, an electrical junction region, a poly contact, an interconnection, and an image sensing device. The readout circuitry is formed on a first substrate. The electrical junction region is formed in the first substrate. The electrical junction region is electrically connected to the readout circuitry. The poly contact is formed on the electrical junction region. The interconnection is formed on the poly contact. The image sensing device is formed on the interconnection. The image sensing device is electrically connected to the readout circuitry through the interconnection, the poly contact, and the electrical junction region.

Abstract: An array of pixels is formed using a substrate. Each pixel can be formed on the substrate, which has a backside and a frontside that includes metalization layers. A photodiode is formed in the substrate and frontside P-wells are formed using frontside processing that are adjacent to the photosensitive region. A first N-type region is formed in the substrate below the photodiode. A second N-type region is formed in a region of the substrate below the first N-type region and is formed using backside processing.

Abstract: A silicide layer (first silicide layer, second silicide layer) is laminated on top laminate surfaces of gates of a transmission transistor and a reset transistor, respectively. Each of the first silicide layer and the second silicide layer respectively formed on each of the gates extends in a direction along the main surface of the semiconductor substrate among at least a portion of a plurality of image pixels, connecting gates with one another among the respective image pixels. On the other hand, a signal outputter is not in contact with any silicide layers, has the top laminate surface that is covered with an insulating layer, and is connected with other transistors via a metal wiring layer.

Abstract: Disclosed is an image sensor. The image sensor includes a lower structure having a photodiode and an interconnection, a passivation layer on the lower structure, a thermo-setting resin layer on the passivation layer, a color filter array on the thermo-setting resin layer, a micro-lens array on the color filter array, and a Low Temperature Oxide (LTO) layer on the micro-lens array.

Abstract: An image sensor and manufacturing method thereof are provided. The image sensor can include a readout circuitry, an interconnection, a second interlayer dielectric, an image sensing device, a contact plug, and a sidewall dielectric. The contact plug can electrically connect the first conductive type layer to the interconnection through a via hole passing through the image sensing device. The sidewall dielectric can be disposed on a sidewall of the second conductive type layer within the via hole.

Abstract: A photoelectric conversion device includes a semiconductor substrate, a first insulating film on the semiconductor substrate, a second insulating film on the first insulating film, a third insulating film on the second insulating film, and a wiring disposed in the third insulating film, the wiring being a wiring layer closest to the semiconductor substrate. A first plug of a shared contact structure and a second plug are disposed in the first insulating film. A third plug and a first wiring that constitute a dual damascene structure are disposed in the second and third insulating films. The first insulating film is used as an etching stopper film during etching of the second insulating film and the second insulating film is used as an etching stopper film during etching of the third insulating film.

Abstract: Provided is an image sensor that comprises a readout circuitry, an interlayer dielectric, an interconnection, an image sensing device, an ion implantation region, a contact, and a pixel separation layer. The readout circuitry is disposed at a first substrate. The interlayer dielectric is disposed on the first substrate. The interconnection is disposed in the interlayer dielectric, and electrically connected to the readout circuitry. The image sensing device is disposed on the interconnection, and comprises a first conductive type layer and a second conductive type layer. The contact electrically connects the first conductive type layer of the image sensing device and the interconnection. The ion implantation region is formed in the second conductive type layer at a region corresponding to the contact. The pixel separation layer is disposed at a pixel boundary of the image sensing device.

Abstract: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region.

Abstract: An image sensor having a pixel array comprises periphery elements formed over a substrate, an oxide layer formed over the periphery elements, an epitaxial layer formed in an opening in the oxide layer in a pixel array area, and a plurality of photosensitive elements of the pixel array formed in the epitaxial layer. Formation of an initial metallization layer occurs after the formation of the photosensitive elements in the epitaxial layer. The photosensitive elements can thus be formed in the epitaxial layer at a higher level within an image sensor stack than that of the initial metallization layer. This advantageously allows stack height and pixel size to be reduced, and fill factor to be increased. The image sensor may be implemented in a digital camera or other type of digital imaging device.

Abstract: A method for making a solid-state imaging device includes forming a pinning layer, which is a P-type semiconductor layer or an N-type semiconductor layer, on a first substrate by deposition; forming a semiconductor layer on the pinning layer; forming a photoelectric conversion unit in the semiconductor layer, the photoelectric conversion unit being configured to convert incident light into an electrical signal; forming, on the semiconductor layer, a transistor of a pixel unit and a transistor of a peripheral circuit unit disposed in the periphery of the pixel unit, and then forming a wiring section on the semiconductor layer; bonding a second substrate on the wiring section; and removing the first substrate after the second substrate is bonded.

Abstract: A method for reading out an image sensor, the method includes the steps of integrating charge in a photodetector with the photodetector at a first capacitance; reading the resulting signal level at a first time with the photodetector at the first capacitance; changing the photodetector capacitance to a second capacitance; and reading the signal level associated with the photodetector at the second capacitance.

Abstract: The invention relates to a semiconductor substrate 1 and a MOS based pixel structure for detecting light. The semiconductor substrate 1 comprises a base region 2 having dopants of a first conductivity type, a first region 3 having dopants of a second conductivity type, a second region 5 having dopants of the first conductivity type at a higher doping level than the base region 2, the second region 5 forming a barrier to the first region, and the second region 5 further comprising an opening 6, wherein the opening 6 is provided between the base region 2 and the first region 3. Providing such an opening 6 in the second region 5 is advantageous, since it allows provision of a low threshold voltage.

Abstract: Disclosed are an image sensor employing an annealing process and a manufacturing method thereof. According to the method, in one embodiment, a transistor structure is formed over a semiconductor substrate, a metal interconnection layer is formed over the transistor structure, a protective layer is formed over the metal interconnection layer, a nitride layer is formed over the protective layer, and the semiconductor substrate formed with the nitride layer is subject to a high pressure annealing process.

Abstract: A CMOS image sensor and method of manufacture reduces the problem of electron loss in a floating diffusion area. A method of fabricating a CMOS image sensor includes forming a gate electrode over a first conductive type semiconductor substrate. A second conductive type first diffusion layer is formed within the semiconductor substrate to be aligned with an edge of one side of the gate electrode. A spacer may be attached to both sidewalls of the gate electrode. A first conductive type second diffusion layer may be formed within the first diffusion layer to leave a distance amounting to a width of the spacer in-between. A second conductive type third diffusion layer may be formed within the semiconductor substrate to be aligned with an edge of the other side of the gate electrode. A first conductive type fourth diffusion layer may be formed over the third diffusion layer, and a first conductive type fifth diffusion layer may be formed under the third diffusion layer.

Abstract: An active pixel using a photodiode with multiple species of N type dopants is disclosed. The pixel comprises a photodiode formed in a semiconductor substrate. The photodiode is an N? region formed within a P-type region. The N? region is formed from an implant of arsenic and an implant of phosphorus. Further, the pixel includes a transfer transistor formed between the photodiode and a floating node and selectively operative to transfer a signal from the photodiode to the floating node. Finally, the pixel includes an amplification transistor controlled by the floating node.

Abstract: Resistor elements are formed by doping impurity into a single crystal film formed on a substrate such as a silicon-on-insulator substrate. A semiconductor device having such resistor elements is used as a detector for detecting an amount of airflow, for example. The impurity density in the single crystal silicon is made lower than 1×1020/cm3 to suppress a resistance change by aging especially at a temperature higher than 310° C. To obtain a high temperature coefficient of the resistor element as well as a low resistance change by aging, the impurity density is set in a range from 4×1019/cm3 to 1×1020/cm3, and more preferably in a range from 7×1019/cm3 to 1×1020/cm3. As the impurity, N-type impurity such as phosphorus or P-type impurity such as boron may be used. It is preferable to use the impurity having a low diffusion coefficient to attain a low resistance change by aging.

Abstract: A solid-state imaging device of the present invention includes a base 13, a plurality of photoelectric conversion portions 11 formed in a surface of the base 13, and an insulating film 18 formed above the base 13. Openings 18h are formed in the insulating film 18 so that each of the openings 18h is located above each of the photoelectric conversion portions 11. Optical waveguides 19 having a refractive index higher than that of the insulating film 18 are formed in each of the openings 18h. And the optical waveguides 19 are made of a composite material containing a resin 19a and inorganic particles 19b.

Abstract: Disclosed is a method for manufacturing a CMOS image sensor, capable of preventing dopants implanted with high energy from penetrating into a lower part of a gate electrode when a photodiode is formed, thereby preventing current leakage of a transistor and variation of a threshold voltage. The method includes the steps of forming a gate electrode on a transistor area of a first conductive type semiconductor substrate including a photodiode area and the transistor area, forming a salicide layer on the gate electrode, and implanting second conductive type dopants for forming a photodiode in a photodiode area of the semiconductor substrate.

Abstract: An image sensor includes a semiconductor substrate; first pixels laid out above cavities provided within the semiconductor substrate, the first pixels converting thermal energy generated by incident light into an electric signal; supporting parts connected between the first pixels and the semiconductor substrate, the supporting parts supporting the first pixels above the cavities; and second pixels fixedly provided on the semiconductor substrate without via the cavities, wherein a plurality of the first pixels and a plurality of the second pixels are laid out two-dimensionally to form a pixel region, and each of the second pixels is adjacent to the first pixels.

Abstract: A CMOS image sensor array and method of fabrication wherein the sensor includes Copper (Cu) metallization levels allowing for incorporation of a thinner interlevel dielectric stack with improved thickness uniformity to result in a pixel array exhibiting increased light sensitivity. In the sensor array, each Cu metallization level includes a Cu metal wire structure formed at locations between each array pixel and, a barrier material layer is formed on top each Cu metal wire structure that traverses the pixel optical path. By implementing a single mask or self-aligned mask methodology, a single etch is conducted to completely remove the interlevel dielectric and barrier layers that traverse the optical path. The etched opening is then refilled with dielectric material.

Abstract: A method for fabricating a CMOS image sensor includes developing a semiconductor substrate provided with metal pads with tetramethylammonium hydroxide (TMAH), to etch the metal pads. In accordance with the method, it is possible to realize normal output of materials, which were previously scrapped due to problems including pad corrosion, appearance defects and bonding pad issues which may occur in the process of fabricating CMOS image sensors. As a result, advantageously, it is possible to reduce wafer scrap and improve product yield.

Abstract: The objective of this invention is to provide a semiconductor device containing a photodiode and having stable, high sensitivity with respect to short wavelength light near 405 nm, and a manufacturing method for said semiconductor device. PIN photodiode (100C) has the following layers formed on silicon substrate (110): p-type silicon region (112), n-type silicon layer (114), field oxide film (118), silicon oxide film (120c) that covers the surface of the active region, and silicon nitride film (122c) that covers silicon oxide film (120c). Said field oxide film (118) contains extending portions (160) extending to the interior of the active region; the side portions of extending portions (160) are connected to silicon oxide film (120c), and the exposed surface portions of extending portions (160) become regions for hydrogen diffusion.

Abstract: Image sensors include a pixel region and a logic region. Pixel isolation regions in the pixel region include pixel isolation region walls that are less sloped than logic isolation region walls in the logic region. An impurity layer also may be provided adjacent at least some of the pixel isolation region walls, wherein at least some of the logic isolation region walls are free of the impurity layer. The impurity layer and/or the less sloped logic isolation region walls may also be provided for NMOS devices in the logic region but not for PMOS devices in the logic region. Doped sacrificial layers may be used to fabricate the impurity layer.

Abstract: A method for fabricating a TFT array substrate including the following steps is provided. A substrate having a pixel region and a photosensitive region is provided. A first patterned conductive layer is formed on the substrate, wherein the first patterned conductive layer includes a gate electrode disposed in the pixel region and a first electrode disposed in the photosensitive region, and a photosensitive dielectric layer is formed on the first electrode. A gate insulation layer is formed to cover the gate electrode, the photosensitive dielectric layer and the first electrode. A patterned semiconductor layer is formed on the gate insulation layer above the gate electrode. A source electrode and a drain electrode are formed on the patterned semiconductor layer at two sides of the gate electrode, wherein the gate electrode, the source electrode, and the drain electrode constitute a TFT. A second electrode is formed on the photosensitive dielectric layer.

Abstract: A method and apparatus for processing a thin film able to easily form grooves in a conductive thin film on an insulating substrate, comprising bringing a first electrode into contact with the conductive thin film, maintaining a conductive state between a tip of a second electrode with a voltage applied with respect to the first electrode and the surface of the conductive thin film, and using the tip of the second electrode to scan the conductive thin film so as to thereby form grooves passing through the thickness of the conductive thin film and exposing the surface of the insulating substrate at their bottoms in the conductive thin film.

Abstract: The present invention relates generally to semiconductor fabrication and particularly to fabricating magnetic tunnel junction devices. In particular, this invention relates to a method for using the dielectric layer in tunnel junctions as an etch stop layer to eliminate electrical shorting that can result from the patterning process.

Abstract: The invention relates to an optical spectral sensor for determining the spectral information of incident light, in particular in the visible and infrared spectral range, with at least one optoelectronic semiconductor arrangement and at least one metal film, which is surrounded by a dielectric, wherein the metal film has a periodic pattern, wherein the at least one optoelectronic semiconductor arrangement and the at least one patterned metal film are arranged in such a way that light to be detected initially passes through the patterned metal film and then impinges on the optoelectronic semiconductor arrangement, wherein the optical spectral sensor is formed in such a way that the spectral sensitivity is determined essentially by the optical properties of the patterned metal film.

Abstract: A photodiode and a method of fabricating a photodiode for reducing modal dispersion and increasing travel distance. The central region of the photodiode is made less responsive to incident light than a peripheral region of the photodiode. The less responsive central region discriminates the lower order modes such that only the higher order modes are incident on the more responsive peripheral region. Because the lower order modes are subtracted, the range of propagation constants is reduced and modal dispersion is also reduced.

Abstract: A thin film transistor (TFT) substrate includes a transparent substrate, a plurality of TFTs and a photosensitive capacitor formed on the transparent substrate. A capacitance of the photosensitive capacitor is variable on the condition of environment brightness. A method for manufacturing the TFT substrate and an LCD using the TFT substrate are also provided.

Abstract: A method for forming, on a surface of a thinned-down semiconductor substrate, a contact connected to a metal track of an interconnect stack formed on the opposite surface of the thinned-down substrate, including the steps of: forming, on the side of a first surface of a substrate, an insulating region penetrating into the substrate and coated with a conductive region and with an insulating layer crossed by conductive vias, the vias connecting a metal track of the interconnect stack to the conductive region; gluing the external surface of the interconnect stack on a support and thinning down the substrate; etching the external surface of the thinned-down substrate and stopping on the insulating region; etching the insulating region and stopping on the conductive region; and filling the etched opening with a metal.

Abstract: A method for manufacturing a CMOS image sensor that independently forms a poly routing line connected to a gate poly of a reset transistor is provided. In an embodiment, a semiconductor substrate is prepared defining a device isolation region and an active region. Subsequently, a plurality of gate polys are formed on a predetermined portion of the active region. A photodiode is formed in a portion of the semiconductor substrate located at one side of one of the plurality of gate polys. After an oxide layer is deposited on the semiconductor substrate including the gate polys, the oxide layer is selectively removed to form oxide layer patterns for exposing a portion of the plurality of gate polys. After a polysilicon layer is deposited on the oxide layer pattern, the polysilicon layer is selectively removed to form a routing line connected to the portion of the plurality of gate polys.

Abstract: A complementary metal-oxide-semiconductor (CMOS) image sensor comprises a first photosensitive diode comprising a first semiconductor material is formed in a first semiconductor substrate. A second photosensitive diode comprising a second semiconductor material, which has a different light detection wavelength range than the first semiconductor material, is formed in a second semiconductor substrate. Semiconductor devices for holding and detecting charges comprising a sensing circuit of the CMOS image sensor may also be formed in the second semiconductor substrate. The first semiconductor substrate and the second semiconductor substrate are bonded so that the first photosensitive diode is located underneath the second photosensitive diode. The vertical stack of the first and second photosensitive diodes detects light in the combined detection wavelength range of the first and second semiconductor materials. Sensing devices may be shared between the first and second photosensitive diodes.

Abstract: A CMOS image sensor includes isolation regions and a photo diode region formed in a substrate, gate electrodes formed on the substrate, impurity injection regions formed in the substrate respectively positioned between the gate electrodes and the isolation regions, silicide regions formed on upper surfaces of the gate electrodes and the impurity injection regions, a first insulating layer formed on a surface of the photodiode region and sides of the gate electrodes, a second insulating layer formed on the first insulating layer, a third insulating layer formed on the second insulating layer, an interlayer insulating layer formed to cover the third insulating layer, and via plugs vertically passing through the interlayer insulating layer and connected to the silicide regions.

Abstract: An optical sensor includes a silicon-rich dielectric photosensitive device and a read-out device. The silicon-rich dielectric photosensitive device includes a first electrode, a second electrode, and a photosensitive silicon-rich dielectric layer disposed therebetween. The photosensitive silicon-rich dielectric layer includes a plurality of nanocrystalline silicon crystals therein. The read-out device is electrically connected to the first electrode of the silicon-rich dielectric photosensitive device for reading out opto-electronic signals transmitted from the photo-sensitive silicon-rich dielectric layer.

Abstract: A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight. A CMOS active pixel image sensor includes a plurality of pinned photodiode photodetectors that share buffer transistors. In one configuration, the charge from two or more pinned photodiodes may be binned together and applied to the gate of a shared buffer transistor.