Plasma Etching Patents (Class 438/9)
  • Publication number: 20020162736
    Abstract: Low resistant vias are formed by sequentially treating an opening in an interlayer dielectric and the exposed surface of a lower metal feature with an NH3 plasma followed by a N2/H2 plasma, thereby removing any oxide on the metal surface and removing residual polymers or polymeric deposits generated during etching to form the opening. Embodiments include forming a dual damascene opening in a low-k interlayer dielectric exposing the upper surface of a lower Cu or Cu alloy feature, sequentially treating the opening and the upper surface of the lower metal feature with an NH3 plasma and then with a N2/H2 plasma, Ar sputter etching, depositing a barrier layer lining the opening, depositing a seedlayer and filling the opening with Cu or a Cu alloy.
    Type: Application
    Filed: May 2, 2001
    Publication date: November 7, 2002
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Minh Van Ngo, Robert A. Huertas, Dawn Hopper
  • Patent number: 6475918
    Abstract: An etching method capable of obtaining a fine fabricated shape, particularly, a vertical fabricated shape with less bowing upon fabrication of insulation films in the production of semiconductors, the method comprising controlling the incident amount of O, F or N radicals, gas flow rate or consumption amount of O, F and N on the inner wall surface with etching time to suppress excessive O, F and N which become excessive in the initial stage of etching, the method also including control for the flow rate or the consumption amount based on the result of measurement for plasmas during etching so as to obtain a stable etching shape. Since bowing can be reduced upon fabrication of insulation film hole and insulation film while maintaining the etching rate and the selectivity, finer semiconductor device can be produced easily.
    Type: Grant
    Filed: October 5, 2000
    Date of Patent: November 5, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Masaru Izawa, Kenetsu Yokogawa, Nobuyuki Negishi, Yoshinori Momonoi, Shinichi Tachi
  • Patent number: 6472231
    Abstract: A metal interconnect arrangement provides a dielectric layer that has its upper surface treated to provide an etch stop etch stop layer. The upper surface is subjected to a plasma etch that treats, such as by carbonization, the dielectric material in a manner that alters the etch characteristics of the dielectric material. After a second dielectric layer is formed over the treated surface of the first dielectric layer, an etching may be performed through the second dielectric layer that stops on the treated surface of the first dielectric layer in a damascene interconnect process.
    Type: Grant
    Filed: January 29, 2001
    Date of Patent: October 29, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Calvin T. Gabriel, Lynne A. Okada
  • Patent number: 6461877
    Abstract: Described herein is a method for selectively enlarging vias connecting two different layers of conductors in a semiconductor device. Whether or not an individual via is extended on each of its edges is determined by the distance of the edge to the neighboring features. Since many vias can be selectively enlarged along one or more edges without infringing upon neighboring structures, via integrity and conductive characteristics are improved.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: October 8, 2002
    Assignee: International Business Machines Corporation
    Inventors: Karen L. Holloway, Kurt A. Tallman, Robert C. Wong
  • Patent number: 6460170
    Abstract: A system and method is described for providing a robust mechanical and electrical connection between two or more circuit boards which may be employed for diagnostic purposes and/or for permanent connections. A spacer block, connection block, or pedestal, preferably made of PCB type material is preferably disposed between two PCBs. The pedestal is preferably dimensioned to space the two PCBs far enough apart that the surface mount components on two boards connected employing the inventive pedestal do not interfere with one another. The pedestal preferably provides for ample signal density and signal quality because of the block thickness and availability of insulation within the pedestal.
    Type: Grant
    Filed: April 29, 2000
    Date of Patent: October 1, 2002
    Assignee: Hewlett Packard Company
    Inventors: Ian P. Shaeffer, Everett Basham
  • Patent number: 6455333
    Abstract: A method of stabilizing the DUV resist etch rate for a gate critical dimension, especially for a CD≦75 &mgr;m. More specifically, the present invention provides a method for stabilizing a deep ultraviolet (DUV) resist etch rate by utilizing the directly proportionate relationship between the lateral erosion and a vertical etch rate. The present invention method provides control of lateral erosion of the DUV resist by measuring the vertical etch rate component. The present invention method involves conditioning (seasoning) an etch chamber with a conditioning wafer having a unique stack which results in consistent and stable DUV resist etch rates. The present invention seasoning is applied before processing of a product wafer lot for providing better control of the gate CD targeting, and thereby eliminating a “first wafer” effect.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: September 24, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Ashok M. Khathuria
  • Patent number: 6451620
    Abstract: An organic film is etched by using plasma generated from an etching gas including a first gas containing, as a principal constituent, a compound including carbon, hydrogen and nitrogen and a second gas including a nitrogen component.
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: September 17, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideo Nakagawa, Toshio Hayashi, Yasuhiro Morikawa
  • Patent number: 6450683
    Abstract: The present invention provides a method and apparatus of using optical temperature measurement as an in-situ monitoring of etch rate. First of all, a plasma etching process is performed in a plasma etcher having a vacuum chamber. Then, an optical multi-channel analyzer (OMA) monitors a series of emission lines of a certain plasma species emitted from the vacuum chamber during the plasma etching process. Then, based on the intensity distribution of the emission lines detected, a computer computes and generates an optical temperature. Finally, the computer generates a relevant ER based on the optical temperature. The emission lines are emitted due to the transitions between different energy states of a certain plasma species. These transitions may be between different electronic energy states, vibrational energy states, or rotational energy states, whereas the plasma species may be any one of the reactants in the plasma chamber such as CO, CO2, CF, CF2, SiF, C2, HF, etc.
    Type: Grant
    Filed: April 25, 2000
    Date of Patent: September 17, 2002
    Assignee: Winbond Electronics Corp.
    Inventor: Szetsen Steven Lee
  • Patent number: 6448094
    Abstract: A method of detecting an etching depth of a target object includes the steps of irradiating an etching layer of the target object that is being etched in an etching section with light having a plurality of components differing from each other in a wavelength, detecting a plurality of interference light components differing from each other in the wavelength and having an intensity periodically changed by the light components reflected from an upper surface of the etching layer and a surface of the etching section, applying a frequency analysis to these interference light components so as to obtain the frequency of each of these interference wave forms in which the intensity forms the amplitude, calculating an etching rate corresponding to each interference wave form by using the frequency of the interference wave form, and obtaining an etching depth from the etching rate.
    Type: Grant
    Filed: January 26, 2001
    Date of Patent: September 10, 2002
    Assignee: Tokyo Electron Limited
    Inventors: Yohei Yamazawa, Yoshihito Ookawa
  • Patent number: 6449522
    Abstract: Systems and methods for managing automated material handling systems, such as semiconductor fabrication facilities, using material item (e.g., wafer lot) attributes and cassette attributes are provided. A semiconductor fabrication facility typically includes multiple wafer lots and multiple cassettes for storing the wafer lots. A system and method, in one embodiment of the invention, includes setting one or more lot attributes for each wafer lot, setting one or more cassette attributes for each cassette, and selecting a particular cassette for holding a particular wafer lot based on the one or more wafer lot attributes of the particular wafer lot and the one or more cassette attributes of the particular cassette. The wafer lot and cassette attributes may, for example, include an attribute identifying a position in a fabrication sequence and one or more attributes indicative of one or more contaminants.
    Type: Grant
    Filed: November 17, 1998
    Date of Patent: September 10, 2002
    Assignee: Micro Devices, Inc.
    Inventors: Michael R. Conboy, Patrick J. Ryan, Elfido Coss, Jr.
  • Patent number: 6432730
    Abstract: A plasma processing method includes evacuating a vacuum chamber while supplying a gas into the vacuum chamber, thereby controlling an interior of the vacuum chamber to a pressure, and supplying a high frequency power of a frequency of 50 MHz-3 GHz to an antenna which is set opposite to a substrate placed to a substrate electrode in the vacuum chamber and which has a structure with a dielectric member held between a wall face of the vacuum chamber opposite to the substrate and a metallic plate, thereby generating plasma inside the vacuum chamber and processing the substrate, wherein the high frequency power is supplied to satisfy a relation 3r<c/(f·∈½)<9r when c is a light velocity (m/sec), f is a frequency (Hz) of the high frequency power, ∈ is a relative permittivity of the dielectric member and, r is a half (m) of a longer line of a shape of the dielectric member.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: August 13, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tomohiro Okumura, Takuya Matsui
  • Patent number: 6420194
    Abstract: A system and method for identifying events in a manufacturing process from a sequence of m-dimensional input data signals, m≧2 obtained from monitoring of the manufacturing process utilizing a data processor for transforming each m-dimensional input data signal to a set of output data signals based on an orthogonal polynomial transform function, wherein the input data signals are used as coefficients in evaluating the polynomial transform functions. The data processor also integrates the transform function within the defined limits of the transform function to determine a scalar value as a function of time. A display system may be used to display a graph of the scalar values as a function of time for visually identifying events or the processor may identify events based on detected scalar values. The transform function may be Fourier, Chebyshev, Legendre or other polynomial type function.
    Type: Grant
    Filed: July 14, 2000
    Date of Patent: July 16, 2002
    Assignee: Lucent Technologies Inc.
    Inventor: Edward Alois Reitman
  • Patent number: 6419846
    Abstract: A method is provided for determining an etch endpoint. The method includes collecting intensity data representative of optical emission spectral wavelengths during a plasma etch process. The method further includes analyzing at least a portion of the collected intensity data into at most first and second Principal Components with respective Loadings and corresponding Scores. The method also includes determining the etch endpoint using the respective Loadings and corresponding Scores of the second Principal Component as an indicator for the etch endpoint using Principal Components Analysis applied to archived optical emission spectral data.
    Type: Grant
    Filed: January 26, 2000
    Date of Patent: July 16, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Anthony John Toprac, Joseph William Wiseman, Hongyu Yue
  • Patent number: 6417013
    Abstract: A method for controlling a variable parameter during a processing of a semiconductor device includes selecting a beginning and an ending value; selecting a function governing how the parameter is to be transitioned; initializing the parameter to the beginning value; and automatically transitioning the parameter according to the selected function. Another method includes selecting a criterion; determining a beginning value; receiving an input; determining from the input whether the parameter needs to be modified; and modifying the parameter. The methods can control the parameters of a Bosch process such that the steps of etching and plasma deposition are performed alternatingly while keeping the transition points arbitrarily small and providing increased control over the process and the resulting trench wall profile. The method applies to other types of semiconductor processing, including without limitation, other deposition and etching applications or processes.
    Type: Grant
    Filed: January 29, 1999
    Date of Patent: July 9, 2002
    Assignee: Plasma-Therm, Inc.
    Inventors: Michael J. Teixeira, Mike Devre, Wade Dawson, Dave Johnson
  • Patent number: 6414499
    Abstract: An equipment for manufacturing semiconductor devices, comprises a processing tool which processes a to-be-processed surface of a semiconductor workpiece to a target shape, a monitor which three-dimensionally monitors a shape of a processed surface of the semiconductor workpiece while the semiconductor workpiece is set in the processing tool, and a controller which controls the processing tool in a feedback manner on the basis of the shape of the processed surface monitored by the monitor. If the shape of the processed surface deviates from the target shape, the controller adjusts process conditions of the processing tool so that the target shape can be obtained.
    Type: Grant
    Filed: May 2, 2001
    Date of Patent: July 2, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroyuki Yano, Katsuya Okumura
  • Patent number: 6410348
    Abstract: An interface texturing for light-emitting device is formed by utilizing holographic lithography. Two coherent light beams are overlaid to cause constructive and destructive interference and thereby periodical alternative bright and dark lines are formed. A wafer coated with photoresist material is exposed under the interference lines. After developing step, a photoresist pattern with textured surface is formed on the wafer. Thereafter, the textured photoresist pattern is transferred to the wafer by etching process and result in a desired interface texturing.
    Type: Grant
    Filed: August 1, 2000
    Date of Patent: June 25, 2002
    Assignee: United Epitaxxy Company, Ltd.
    Inventors: Tzer-Perng Chen, Chih-Sung Chang, Holin Chang
  • Patent number: 6406924
    Abstract: A chamber 28 comprises a radiation source 58 capable of emitting radiation having a wavelength that is substantially absorbed in a predetermined pathlength in a thickness of a layer 22 on a substrate, and a radiation detector 62 adapted to detect the radiation. The radiation is substantially absorbed in a first thickness of the layer 22, and after at least partial processing of the layer 22, is at least partially transmitted through a second thickness of the layer 22 and reflected by one or more underlayers 24 of the substrate 20.
    Type: Grant
    Filed: April 5, 1999
    Date of Patent: June 18, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Michael N. Grimbergen, Thorsten B. Lill
  • Patent number: 6379980
    Abstract: A method for monitoring the performance of a material removal tool includes providing a wafer having at least one process layer formed thereon; measuring the thickness of the process layer; removing at least a portion of the process layer in the material removal tool until an endpoint of the removal process is reached; determining a removal rate based on the measured thickness of the process layer and a duration of the removal process until the endpoint is reached; and comparing the determined removal rate to an expected removal rate to monitor the performance of the material removal tool. A processing line includes a metrology tool, a material removal tool, and a process controller. The metrology tool is adapted to measure a thickness of a process layer formed on a wafer. The material removal tool is adapted to remove at least a portion of the process layer until an endpoint is reached.
    Type: Grant
    Filed: July 26, 2000
    Date of Patent: April 30, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Anthony J. Toprac
  • Patent number: 6379981
    Abstract: In one aspect, the invention includes a method of etching, comprising: a) forming a material over a substrate, the material comprising a lower portion near the substrate and an upper portion above the lower portion; b) providing a quantity of detectable atoms within the material, the detectable atoms being provided at a different concentration in the lower portion than in the upper portion; c) etching into the material and forming etching debris; and d) detecting the detectable atoms in the debris. In another aspect, the invention includes a method of etching, comprising: a) providing a semiconductor wafer substrate, the substrate having a center and an edge; b) forming a material over the substrate, the material comprising detectable atoms; c) etching into the material and forming etching debris; d) detecting the detectable atoms in the debris; and e) estimating a degree of center-to-edge uniformity of the etching from the detecting.
    Type: Grant
    Filed: March 27, 1998
    Date of Patent: April 30, 2002
    Assignee: Micron Technology, Inc.
    Inventor: Terry Gilton
  • Patent number: 6372655
    Abstract: A two etchant etch method for etching a layer that is part of a masked structure is described. The method is useful, for example, in microelectrical mechanical system (MEMS) applications, and in the fabrication of integrated circuits and other electronic devices. The method can be used advantageously to optimize a plasma etch process capable of etching strict profile control trenches with 89°+/−1° sidewalls in silicon layers formed as part of a mask structure where the mask structure induces variations in etch rate. The inventive two etchant etch method etches a layer in a structure with a first etchant etch until a layer in a fastest etching region is etched. The layer is then etched with a second etchant until a layer in a region with a slowest etch rate is etched. A second etchant may also be selected to provide sidewall passivation and selectivity to an underlying layer of the structure.
    Type: Grant
    Filed: April 17, 2001
    Date of Patent: April 16, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Anisul Khan, Ajay Kumar, Jeffrey D. Chinn, Dragan Podlesnik
  • Patent number: 6372523
    Abstract: An etching method and a device therefor are provided to detect the etching end point with high accuracy and reproducibility. In an etching method and device, in dry etching, a variation of a self-bias voltage as a time elapses is measured, and a time where a differentiation value becomes 0 when the variation of the self-bias voltage is differentiated is regarded as an end point.
    Type: Grant
    Filed: July 22, 1999
    Date of Patent: April 16, 2002
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideomi Suzawa, Tomohiko Sato, Yoshihiro Kusuyama, Koji Ono
  • Patent number: 6365423
    Abstract: For determining the quality of an opening formed in a dielectric material layer, a voltage contrast inspection tool is used to produce a voltage contrast image of a test pattern formed in the dielectric material layer. The voltage contrast values of openings may be compared to a reference contrast value or to different openings so as to decide whether or not the opening has a required depth.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: April 2, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Frank Heinlein, Georg Sulzer
  • Patent number: 6358760
    Abstract: A silicon layer is etched using a plasma etcher equipped with an endpoint control device. CF4 and N2 are provided to the plasma etcher at lower flow rates than those typically used during fixed time etching processes. The endpoint control device monitors optical emissions from the etching chamber at a particular wavelength to detect a predetermined change in intensity. When the change in intensity is detected, the etching is terminated.
    Type: Grant
    Filed: June 1, 2000
    Date of Patent: March 19, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jiahua Huang, Allison Holbrook, James H. Chiang, Sunny Cherian
  • Patent number: 6352870
    Abstract: In one illustrative embodiment, the method disclosed herein comprises forming a process layer above a semiconducting substrate, forming a layer of photoresist above the process layer, removing the layer of photoresist by performing an etching process, and determining an endpoint of the etching process based upon a temperature of the substrate.
    Type: Grant
    Filed: June 12, 2000
    Date of Patent: March 5, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Jeremy Lansford
  • Patent number: 6350390
    Abstract: A feed forward method for forming within a microelectronic fabrication a patterned target layer with controlled critical dimension (CD) first provides a substrate having formed thereover a blanket target layer, in turn having formed thereover a blanket anti-reflective coating (ARC) layer, in turn having formed thereover a paltered photoresist layer.
    Type: Grant
    Filed: February 22, 2000
    Date of Patent: February 26, 2002
    Assignee: Taiwan SEmiconductor Manufacturing Company, LTD
    Inventors: Chi Kang Liu, Chang Jen Shieh, Pei Hung Chen
  • Patent number: 6351683
    Abstract: A system and method for monitoring the conditions in a gas plasma processing system while varying or modulating the RF power supplied to the system, so that resulting signals of the electrical circuits of the system provide information regarding operational parameters of the system or the state of a process. Significant improvements in sensitivity and accuracy over conventional techniques are thereby achieved. In addition, the plasma processing system can be thoroughly tested and characterized before delivery, to allow more accurate monitoring of and greater control over a process, thereby improving quality control/assurance of substrates being produced by the system. The information obtained by the modulation technique can be displayed on a monitor screen, in order to allow an operator to accurately monitor the system/process and diagnose any problems with the system/process.
    Type: Grant
    Filed: April 19, 2000
    Date of Patent: February 26, 2002
    Assignee: Tokyo Electron Limited
    Inventors: Wayne Johnson, Richard Parsons
  • Patent number: 6348389
    Abstract: The present invention provides a method for forming and etching a resist protect oxide layer, of which provides improved etch selectivity to a shallow trench isolation and an increased pre-metal dip processing window. The process begins by forming a shallow trench isolation on a semiconductor substrate. The semiconductor substrate has a first area and a second area separated by the shallow trench isolation. A gate is formed on the semiconductor substrate in the first area, adjacent to the shallow trench isolation. In a key step, a resist protect oxide layer comprising a thin silicon oxide layer and an overlying thin nitrogen containing layer, is deposited over the semiconductor substrate, the gate, and the shallow trench isolation. The thin nitrogen containing layer can be composed of silicon nitride or silicon oxynitride.
    Type: Grant
    Filed: March 11, 1999
    Date of Patent: February 19, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chen Cheng Chou, Tzong-Sheng Chang
  • Patent number: 6344364
    Abstract: In one aspect, the invention includes a method of etching, comprising: a) forming a material over a substrate, the material comprising a lower portion near the substrate and an upper portion above the lower portion; b) providing a quantity of detectable atoms within the material, the detectable atoms being provided at a different concentration in the lower portion than in the upper portion; c) etching into the material and forming etching debris; and d) detecting the detectable atoms in the debris. In another aspect, the invention includes a method of etching, comprising: a) providing a semiconductor wafer substrate, the substrate having a center and an edge; b) forming a material over the substrate, the material comprising detectable atoms; c) etching into the material and forming etching debris; d) detecting the detectable atoms in the debris; and e) estimating a degree of center-to-edge uniformity of the etching from the detecting.
    Type: Grant
    Filed: August 23, 2000
    Date of Patent: February 5, 2002
    Assignee: Micron Technology, Inc.
    Inventor: Terry Gilton
  • Patent number: 6344151
    Abstract: A gas purged viewport for endpoint detection in a gas phase processing chamber is provided which prevents contamination of an optical monitoring window by use of a purge gas flow. The purge gas purges the viewport and prevents deposition of byproducts and contaminants on the window which will adversely effect endpoint detection. The gas purge viewport includes a prechamber between the optically transparent window and the process chamber. The purge gas is passed through the prechamber and into the processing chamber to purge the window. The gas purge system may also be used to purge other parts such as sensors.
    Type: Grant
    Filed: April 27, 2000
    Date of Patent: February 5, 2002
    Assignee: Lam Research Corporation
    Inventors: Anthony L. Chen, John Holland
  • Patent number: 6340603
    Abstract: Photoresist mask width dimensions are determined by emission spectroscopy while simultaneously etching or depositing material on the sidewalls of the photoresist mask in a plasma environment. Embodiments include stopping the etching or deposition process when the detected change in the emission spectrum corresponds to a desired photoresist mask dimension.
    Type: Grant
    Filed: January 27, 2000
    Date of Patent: January 22, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Scott A. Bell
  • Patent number: 6339018
    Abstract: A method and structure for preventing device leakage. The method and structure includes forming a blocking layer of preferably nitride over a junction between a source/drain region and a shallow trench isolation. A silicide is then formed over a landed area of the source/drain region but is blocked by the blocking layer from forming over the junction between the source/drain region and the shallow trench isolation. This prevents device leakage at this location.
    Type: Grant
    Filed: March 9, 2000
    Date of Patent: January 15, 2002
    Assignee: International Business Machines Corporation
    Inventors: Arne W. Ballantine, Terence B. Hook
  • Publication number: 20020001861
    Abstract: The present invention provides an etching apparatus and a method of preventing electrical damage of the device due to the charge-up and preventing a wiring short due to etching residues when forming wiring on the device formed in a semiconductor substrate. In a wiring etching method in a semiconductor substrate, including a step of a conductor in a semiconductor device by plasma etching, the etching of the above conductor under a Continuous Wave condition (a condition where a plasma discharge occurs continuously) is performed to a predetermined film thickness before the entire conductor is etched, and after that the etching is performed under a Time Modulation condition (a condition where a plasma discharge occurs intermittently) thereafter.
    Type: Application
    Filed: June 27, 2001
    Publication date: January 3, 2002
    Applicant: NEC CORPORATION
    Inventor: Masahiko Ohuchi
  • Patent number: 6323046
    Abstract: A method and apparatus for endpointing a planarization process of a microelectronic substrate. In one embodiment, the apparatus may include a species analyzer that receives a slurry resulting from the planarization process and analyzes the slurry to determine the presence of an endpointing material implanted beneath the surface of the microelectronic substrate. The species analyzer may include a mass spectrometer or a spectrum analyzer. In another embodiment, the apparatus may include a radiation source that directs impinging radiation toward the microelectronic substrate, exciting atoms of the substrate, which in turn produce an emitted radiation. A radiation detector is positioned proximate to the substrate to receive the emitted radiation and determine the endpoint by determining the intensity of the radiation emitted by the endpointing material.
    Type: Grant
    Filed: August 25, 1998
    Date of Patent: November 27, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Vishnu K. Agarwal
  • Patent number: 6297064
    Abstract: When plasma-etching a silicon dioxide film with a CF-based gas, the emission intensities (Ia, Ib) of CF-based radicals and carbon monoxide are observed through spectroscopes (61, 62). First, first and second approximate expressions (Fa(x), Fb(x)) which approximate the characteristic curves of the emission intensities (Ia, Ib) within a specified period are obtained, and the ratio of the standard deviations of the emission intensities (Ia, Ib) to the values of the first and second approximate expressions (Fa(x), Fb(x)) is obtained as a correction coefficient &agr;. When the specified period has elapsed, first and second intermediate expressions (Ia/Fa(x), Ib/Fb(b)) are obtained, and a criterion expression ([Ia/Fa(x)]/{&agr;[Ib/Fb(x)−1]+1}, which expresses the ratio of the first intermediate expression to the second intermediate expression and is weight-corrected with the correction coefficient (&agr;), is obtained.
    Type: Grant
    Filed: August 3, 2000
    Date of Patent: October 2, 2001
    Assignees: Tokyo Electron Yamanashi Limited, Agency of Industrial Science and Technology
    Inventor: Chishio Koshimizu
  • Publication number: 20010016363
    Abstract: An equipment for manufacturing semiconductor devices is disclosed. This equipment comprises a processing tool for processing a to-be-processed surface of a semiconductor workpiece to a target shape, and a monitor for three-dimensionally monitoring a shape of a processed surface of the semiconductor workpiece while the semiconductor workpiece is set in the processing tool. The monitor radiates the processed surface with incoherent light, divides light reflected from the processed surface, into a plurality of light beams of different wavelengths, acquires a two-dimensional image from each of the divided light beams of different wavelengths, three-dimensionally analyzes the shape of the processed surface, and transmits information on the analysis results to a controller. The controller controls the processing tool in a feedback manner on the basis of the information.
    Type: Application
    Filed: May 2, 2001
    Publication date: August 23, 2001
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroyuki Yano, Katsuya Okumura
  • Patent number: 6277763
    Abstract: A method and apparatus for etching of a substrate comprising both a polysilicon layer and an overlying tungsten layer. The method comprises etching the tungsten layer in a chamber using a plasma formed from a gas mixture comprising a fluorinated gas (such as CF4, NF3, SF6, and the like) and oxygen.
    Type: Grant
    Filed: December 16, 1999
    Date of Patent: August 21, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Katsuhisa Kugimiya, Takanori Nishizawa, Daisuke Tajima
  • Publication number: 20010010939
    Abstract: A method of detecting an etching depth of a target object includes the steps of irradiating an etching layer of the target object that is being etched in an etching section with light having a plurality of components differing from each other in a wavelength, detecting a plurality of interference light components differing from each other in the wavelength and having an intensity periodically changed by the light components reflected from an upper surface of the etching layer and a surface of the etching section, applying a frequency analysis to these interference light components so as to obtain the frequency of each of these interference wave forms in which the intensity forms the amplitude, calculating an etching rate corresponding to each interference wave form by using the frequency of the interference wave form, and obtaining an etching depth from the etching rate.
    Type: Application
    Filed: January 26, 2001
    Publication date: August 2, 2001
    Inventors: Yohei Yamazawa, Yoshihito Ookawa
  • Patent number: 6267121
    Abstract: An improved seasoning process for a plasma etching chamber is described. This has been achieved by increasing the RF power to both the wafer and the walls of the chamber during seasoning. Additionally, the gas that is used is at a pressure of about 10 mTorr and has the following composition: chlorine about 90% and oxygen about 10%. By observing the optical emission spectrum during seasoning (notably lines due to the SiClx species) it is confirmed that, under these conditions, seasoning is completed by using only a single wafer for about 100 seconds.
    Type: Grant
    Filed: February 11, 1999
    Date of Patent: July 31, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Cheng-Hao Huang, Ming-Shuo Yen, Shih-Fang Chen, Wen-Hsiang Tang, Pei-Hung Chen
  • Patent number: 6265231
    Abstract: A computer implemented method for endpointing an etch process comprising the acts of monitoring an attribute of a pressure control valve and determining an endpoint of the process based upon the monitored attribute. The monitored attribute includes the position of the pressure control valve or the rate of change of the pressure control valve. The method is advantageously employed in an in-situ cleaning process of a polymerized plasma chamber.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: July 24, 2001
    Assignee: Lam Research Corporation
    Inventor: Joseph W. Walters
  • Patent number: 6265316
    Abstract: A method of forming a trench in a semiconductor substrate by gas plasma etching having the steps of detecting and analyzing emission spectrums of gas plasma etching products and controlling the gas plasma etching based on the ratio of the emission spectrums. The etching uses a HBr/O2 gas. The ratio of emission spectrums is preferable from 1 to 2.
    Type: Grant
    Filed: October 5, 1998
    Date of Patent: July 24, 2001
    Assignee: NEC Corporation
    Inventor: Kazuyoshi Yoshida
  • Patent number: 6261470
    Abstract: The invention generally relates to various aspects of a plasma process, and more specifically the monitoring of such plasma processes. One aspect relates in at least some manner to calibrating or initializing a plasma monitoring assembly. This type of calibration may be used to address wavelength shifts, intensity shifts, or both associated with optical emissions data obtained on a plasma process. A calibration light may be directed at a window through which optical emissions data is being obtained to determine the effect, if any, that the inner surface of the window is having on the optical emissions data being obtained therethrough, the operation of the optical emissions data gathering device, or both. Another aspect relates in at least some manner to various types of evaluations which may be undertaken of a plasma process which was run, and more typically one which is currently being run, within the processing chamber.
    Type: Grant
    Filed: April 23, 1998
    Date of Patent: July 17, 2001
    Assignee: Sandia Corporation
    Inventors: Michael Lane Smith, Jr., Joel O'Don Stevenson, Pamela Peardon Denise Ward
  • Publication number: 20010007778
    Abstract: The present invention provides a method of frequency modulated end-point detection. Control signals are sent to the manufacture device for performing the manufacturing process, wherein process signals are generated along with the manufacturing process. Process signals are filtered to obtain synchronization signals synchronized with the control signals. A judging standard is provided according to the synchronization signals corresponding to a specific state of the process. The synchronization signals are continuously monitored, and a process end-point is determined when the synchronization signals do not meet the judging standard.
    Type: Application
    Filed: December 22, 2000
    Publication date: July 12, 2001
    Applicant: WINBOND ELECTRONICS CORP.
    Inventor: Szetsen Steven Lee
  • Patent number: 6258497
    Abstract: A homogeneous marker is formed, possibly by the adsorption of trace amounts of an ambient material such as carbon monoxide gas, at a surface of a deposited material when the plasma in momentarily interrupted during plasma enhanced chemical vapor deposition or other deposition processes involving the presence of a plasma. When the deposited material is etched, the resulting crystal dislocations or adsorbed gas is detected as a marker by optical emission spectroscopy techniques. The accuracy of an end point determination of the etching process can be increased by providing a sequence of such markers within the bulk or volume of the deposited material. The markers, being merely an interface such as a slight crystal dislocation in otherwise homogeneous material, do not affect the electrical, chemical or optical properties of the remainder of the predetermined deposited material and thus the homogeneity of the deposited material is not significantly affected.
    Type: Grant
    Filed: May 24, 1995
    Date of Patent: July 10, 2001
    Assignee: International Business Machines Corporation
    Inventors: Lawrence Andrew Kropp, David Stanasolovich, Marc Jay Weiss, Dennis Sek-On Yee
  • Patent number: 6254717
    Abstract: The invention generally relates to various aspects of a plasma process, and more specifically the monitoring of such plasma processes. One aspect relates in at least some manner to calibrating or initializing a plasma monitoring assembly. This type of calibration may be used to address wavelength shifts, intensity shifts, or both associated with optical emissions data obtained on a plasma process. A calibration light may be directed at a window through which optical emissions data is being obtained to determine the effect, if any, that the inner surface of the window is having on the optical emissions data being obtained therethrough, the operation of the optical emissions data gathering device, or both. Another aspect relates in at least some manner to various types of evaluations which may be undertaken of a plasma process which was run, and more typically one which is currently being run, within the processing chamber.
    Type: Grant
    Filed: April 23, 1998
    Date of Patent: July 3, 2001
    Assignee: Sandia Corporation
    Inventors: Michael Lane Smith, Jr., Joel O'Don Stevenson, Pamela Peardon Denise Ward
  • Patent number: 6238937
    Abstract: A method is provided for determining an etch endpoint. The method includes collecting intensity data representative of optical emission spectral wavelengths during a plasma etch process. The method further includes analyzing at least a portion of the collected intensity data into at most first and second Principal Components with respective Loadings and corresponding Scores. The method also includes determining the etch endpoint using the respective Loadings and corresponding Scores of the second Principal Component as an indicator for the etch endpoint using thresholding applied to the respective Loadings of the second Principal Component.
    Type: Grant
    Filed: January 26, 2000
    Date of Patent: May 29, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Anthony John Toprac, Joseph William Wiseman, Hongyu Yue
  • Patent number: 6232134
    Abstract: A method and apparatus for characterizing processing operations is presented. Following exposure of a wafer to plasma, the surface charge distribution pattern on the wafer is measured. The surface charge distribution pattern on the wafer is then compared with known surface charge distribution patterns to determine if the measured charge distribution pattern correlates to desirable patterns associated with successful performance of one or more processing steps. In some embodiments, the comparison of the measured charge distribution pattern can be used to detect specific problems in one or more processing steps such that corrective action can be taken in a timely manner. The comparison between the measured charge distribution pattern and known charge distribution patterns may be performed using image comparison or using quantitative comparisons based on charge levels measured within each pattern.
    Type: Grant
    Filed: January 24, 2000
    Date of Patent: May 15, 2001
    Assignee: Motorola Inc.
    Inventors: David Gerald Farber, Wei E. Wu, Phillip E. Crabtree
  • Patent number: 6231774
    Abstract: Plasma P that is caused to fluctuate by a magnet 128 is generated inside a reaction chamber 102 of an etching apparatus 100. The signal of the fluctuating plasma light detected at a photosensor unit 136 via a detection window 134 is sampled over a constant sampling cycle with a arithmatic control unit 120 to obtain data strings. A plurality of hypothetical fluctuation cycles are hypothesized and the step for calculating the moving average values during the individual hypothetical fluctuation cycles using the data strings is repeated, then arithmetic processing is performed on the moving average values calculated for the individual repetition timings to create moving average value data for each of the hypothetical fluctuation cycles to ascertain approximate expressions corresponding to the individual hypothetical fluctuation cycles.
    Type: Grant
    Filed: December 18, 1998
    Date of Patent: May 15, 2001
    Assignee: Tokyo Electron Limited
    Inventor: Susumu Saito
  • Patent number: 6221679
    Abstract: The invention generally relates to various aspects of a plasma process, and more specifically the monitoring of such plasma processes. One aspect relates in at least some manner to calibrating or initializing a plasma monitoring assembly. This type of calibration may be used to address wavelength shifts, intensity shifts, or both associated with optical emissions data obtained on a plasma process. A calibration light may be directed at a window through which optical emissions data is being obtained to determine the effect, if any, that the inner surface of the window is having on the optical emissions data being obtained therethrough, the operation of the optical emissions data gathering device, or both. Another aspect relates in at least some manner to various types of evaluations which may be undertaken of a plasma process which was run, and more typically one which is currently being run, within the processing chamber.
    Type: Grant
    Filed: April 23, 1998
    Date of Patent: April 24, 2001
    Assignee: Sandia Corporation
    Inventors: Michael Lane Smith, Jr., Joel O'Don Stevenson, Pamela Peardon Denise Ward
  • Patent number: 6211009
    Abstract: A method for use in forming a capacitor having a hollow-cylinder electrode structure in a semiconductor device via controlled reactive etching of substantially only one semiconducting layer of a semiconductor device. In one embodiment, the device is a dynamic random access memory (DRAM) structure. In another embodiment, the device is a microprocessor.
    Type: Grant
    Filed: September 16, 1999
    Date of Patent: April 3, 2001
    Assignee: NEC Electronics, Inc.
    Inventor: Craig E. Carpenter
  • Patent number: 6210981
    Abstract: A method for etching a flip chip using secondary particle emissions to detect the etch end-point. The method comprises supplying a voltage level to the device and directing an ion beam at a selected area of the back side of the device in the presence of a gas that is reactive with the substrate. While etching, the quantity of secondary particles emitted from the selected area of the device is monitored. When the quantity of emitted secondary particles reaches a predetermined level, the ion beam is stopped and the reactive gas is removed.
    Type: Grant
    Filed: February 12, 1999
    Date of Patent: April 3, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jeffrey David Birdsley, Victoria Jean Bruce