Plasma Etching Patents (Class 438/9)
  • Patent number: 6930049
    Abstract: A method of detecting endpoint of a plasma etching system that measures the DC voltage drop across both the sheath and the film being etched. When the film is nearly removed, a drop in voltage indicates thinning of the film which detects endpoint for etching before optical emission techniques. The voltage drop is measured across resistors within the matching network.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: August 16, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Jiaming Huang, Ming Yang
  • Patent number: 6931619
    Abstract: The invention relates to a method of improving control over the dimensions of a patterned photoresist, which enables better control of the critical dimensions of a photomask or reticle which is fabricated using the patterned photoresist. In addition, the method may be used to enable improved control over the dimensions of a semiconductor device fabricated using a patterned photoresist. In particular, a patterned photoresist is treated with an etchant plasma to reshape the surface of the patterned photoresist, where reshaping includes the removal of “t”-topping at the upper surface of the patterned resist, the removal of standing waves present on patterned surfaces, and the removal of feet which may be present at the base of the patterned photoresist, where the photoresist contacts an underlying layer such as an ARC layer.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: August 16, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Alex Buxbaum, Melvin W. Montgomery
  • Patent number: 6927076
    Abstract: A method for automated monitoring and controlling of a semiconductor wafer plasma process including performing a plasma process in a plasma processing system to treat a semiconductor process wafer according to a first plasma process recipe; collecting plasma process parameters including at least an RF power and a plasma process time at pre-determined time intervals; and, storing the plasma process parameters including pre-process plasma processing system parameters according to a selectively queryable database to create a plasma process history such that upon abortion of the plasma process the plasma process history may be selectively retrieved to determine a second plasma process recipe to complete the plasma process.
    Type: Grant
    Filed: October 5, 2002
    Date of Patent: August 9, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Shi-Rong Chen, Yu-Wen Fang, Ching-Shan Lu
  • Patent number: 6917204
    Abstract: A method for controlling the non-uniformities of plasma-processed semiconductor wafers by supplying the plasma with two electrical signals: a primary electrical signal that is used to excite the plasma, and a supplemental electrical signal. The supplemental signal may be composed of a plurality of electrical signals, each with a frequency harmonic to that of the primary signal. The phase of the supplemental signal is controlled with respect to the phase of the primary signal. By adjusting the parameters of the supplemental signal with respect to the primary signal, the user can control the parameters of the resultant plasma and, therefore, control the non-uniformities induced in the semiconductor wafer.
    Type: Grant
    Filed: July 3, 2003
    Date of Patent: July 12, 2005
    Assignee: Tokyo Electron Limited
    Inventors: Andrej S. Mitrovic, Jovan Jevtic, Richard Parsons, Murray D. Sirkis
  • Patent number: 6916396
    Abstract: An etching system for subjecting a single film to be etched to etching involves a plurality of etching steps in which respective different recipes are applied. The etching system employs recipe generating means which fixes the recipe to be applied to the final etching step, affecting an underlying film making contact with the film to be etched, of the etching steps, to a preset recipe, and which generates a recipe to be applied to the residual etching step on the basis of the results of processing. Etching processing is conducted according to the recipes generated by the recipe generating means.
    Type: Grant
    Filed: August 21, 2002
    Date of Patent: July 12, 2005
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Akira Kagoshima, Motohiko Yoshigai, Hideyuki Yamamoto, Daisuke Shiraishi, Junichi Tanaka, Kenji Tamaki, Natsuyo Morioka
  • Patent number: 6905624
    Abstract: A method of etching a substrate includes placing a substrate in a process zone. The substrate has a material with a thickness, and the material has exposed regions between features of a patterned mask. An etchant gas is introduced into the process zone. The etchant gas is energized to etch the material. An endpoint of etching the material of the substrate is determined by (i) reflecting a light beam from the substrate, the light beam having a wavelength selected to have a coherence length in the substrate of from about 1.5 to about 4 times the thickness of the material, and (ii) detecting the reflected light beam to determine an endpoint of the substrate etching process. Additionally, the wavelength of the light beam can be selected to maximize an absorption differential that is a difference between the absorption of the light beam in the patterned mask and the absorption of the light beam in the material.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: June 14, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Coriolan I. Frum, Zhifeng Sui, Hongqing Shan
  • Patent number: 6894786
    Abstract: A substrate is etched in a vacuum enclosure in a process which generates plasma light emission. The process is monitored by passing emitted light via a window, a thin film narrow band filter and a “Fabry-Perot” etalon to a detector. The output signal from the detector is analyzed by shape recognition techniques to derive a measure of the progress of the process. The shape recognition preferably makes use of digital filtering and comparison with reference data derived from the theoretical analysis or from a calibration run.
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: May 17, 2005
    Assignee: Vorgem Limited
    Inventors: Mark Burton Holbrook, William George Beckmann, Jacques Andre Grange
  • Patent number: 6890771
    Abstract: A plasma processing method using a spectroscopic processing unit. The method includes separating spectrally plasma radiation emitted from a vacuum process chamber into component spectra, converting the component spectra into a time series of analogue electric signals composed of different wavelength components at a predetermined period, adding together analogue signals of the different wavelength components, converting a plurality of added signals into digital quantities on a predetermined-period basis, digitally adding together the plurality of added and converted signals a plural number of times on a plural-signal basis, determining discriminatively an end point of a predetermined plasma process on the basis of a signal resulting from the digital addition, and terminating the predetermined plasma process.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: May 10, 2005
    Assignees: Hitachi, Ltd., Hitachi High-Technologies Corporation
    Inventors: Tetsunori Kaji, Shizuaki Kimura, Tatehito Usui, Takashi Fujii
  • Patent number: 6881352
    Abstract: A plasma processing control system and method which can suppress influences caused by disturbances. The control system includes a plasma processor for performing processing operation over a sample accommodated within a vacuum processing chamber, a sensor for monitoring process parameters during processing operation of the plasma processor, a processed-result estimation model for estimating a processed result on the basis of a monitored output of the sensor and a preset processed-result prediction equation, and an optimum recipe calculation model for calculating correction values of processing conditions on the basis of an estimated result of the processed-result estimation model in such a manner that the processed result becomes a target value. The plasma processor is controlled on the basis of a recipe generated by the optimum recipe calculation model.
    Type: Grant
    Filed: January 24, 2003
    Date of Patent: April 19, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Akira Kagoshima, Hideyuki Yamamoto, Shoji Ikuhara, Toshio Masuda, Hiroyuki Kitsunai, Junichi Tanaka, Natsuyo Morioka, Kenji Tamaki
  • Patent number: 6879744
    Abstract: An optical monitoring system for monitoring thin film deposition on a substrate includes a support bridge that is attached on an inside of a deposition chamber. The system further includes a fiber optic collimator having an optical fiber for incoming light, and another fiber optic collimator having an optical fiber for transmitted or reflected light from the substrate. The system further includes a shutter that is closed when a desired thin film thickness is deposited on the substrate.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: April 12, 2005
    Inventor: Georgi A. Atanasov
  • Patent number: 6879867
    Abstract: A monitor data acquisition section acquires a plurality of monitor data relating to a processing state of one sample in a processing apparatus, via sensors. A data selection section selects monitor data belonging to an arbitrary processing division included in a plurality of processing divisions for the sample, from among the plurality of monitor data. A monitoring signal generation section generates monitoring signals based on the monitor data belonging to the arbitrary processing division selected by the data selection section. A display setting controller displays a plurality of monitoring signals obtained with respect to samples processed in the processing apparatus, on a display section in a time series manner.
    Type: Grant
    Filed: September 5, 2001
    Date of Patent: April 12, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Junichi Tanaka, Hiroyuki Kitsunai, Hideyuki Yamamoto, Shoji Ikuhara, Kazue Takahashi
  • Patent number: 6875701
    Abstract: To remove nanotopography (unevenness of wavelength: 0.2 mm through 20 mm, wave height: 1 through several hundreds nm) which has already been produced on a surface of a semiconductor wafer which has been regarded as impossible to remove conventionally, a half value width of an etching profile of activated species gas is set to fall in a range equal to or smaller than a wavelength a of nanotopography and equal to or larger than a half thereof. Based on previously measured data of nanotopography, moving speed and locus of injected activated species gas along a surface of a semiconductor wafer are calculated and controlled.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: April 5, 2005
    Assignee: Speedfam Co., Ltd.
    Inventors: Michihiko Yanagisawa, Tadayoshi Okuya
  • Patent number: 6861362
    Abstract: A method for enhancing the fabrication process of a self-aligned contact (SAC) structure is provided. The method includes forming a transistor structure on a surface of a substrate. The method also includes forming a dielectric layer directly over the surface of the substrate without forming an etch stop layer on the surface of the substrate. Also included in the method is plasma etching a contact hole through the dielectric layer in a plasma processing chamber. The method also includes monitoring a bias compensation voltage of the plasma processing chamber during the plasma etching process and discontinuing the plasma etching process upon detecting an endpoint signaling change in the bias compensation voltage.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: March 1, 2005
    Assignee: Lam Research Corporation
    Inventors: Jun-Cheng Ko, Young-Tong Tsai
  • Patent number: 6849494
    Abstract: A unique electrochemical process fills oxygen vacancies in dielectrics while reducing oxidation of nearby electrodes and conductors. Preferably, an electromagnetic field or bias is applied to a dielectric. The bias causes oxygen vacancies in the dielectric to migrate to the surface of the dielectric. As the oxygen vacancies migrate toward the surface, oxygen ions fill the oxygen vacancies. In one embodiment, a unique plasma treatment provides the oxygen ions that react with the oxygen vacancies. In another embodiment, a unique electrolysis treatment provides the oxygen ions that react with the oxygen vacancies.
    Type: Grant
    Filed: May 22, 2003
    Date of Patent: February 1, 2005
    Assignee: Micron Technology Inc.
    Inventors: Cem Basceri, Gurtej S. Sandhu
  • Patent number: 6844244
    Abstract: A device manufacturing method capable of imaging structures on both sides of a substrate, is presented herein. One embodiment of the present invention comprises a device manufacturing method that etches reversed alignment markers on a first side of a substrate to a depth of 10 ?m, the substrate is flipped over, and bonded to a carrier wafer and then lapped or ground to a thickness of 10 ?m to reveal the reversed alignment markers as normal alignment markers. The reversed alignment markers may comprise normal alignment patterns overlaid with mirror imaged alignment patterns.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: January 18, 2005
    Assignee: ASML Netherlands B.V.
    Inventors: Keith Frank Best, Joseph J. Consolini, Shyam Shinde
  • Patent number: 6843927
    Abstract: Techniques for detecting endpoints during semiconductor dry-etching processes are described. The dry-etching process of the present invention involves using a combination of a reactive material and a charged particle beam, such as an electron beam. In another embodiment, a photon beam is used to facilitate the etching process. The endpoint detection techniques involve monitoring the emission levels of secondary electrons and backscatter electrons together with the current within the sample. Depending upon the weight given to each of these parameters, an endpoint is identified when the values of these parameters change more than a certain percentage, relative to an initial value for these values.
    Type: Grant
    Filed: April 21, 2003
    Date of Patent: January 18, 2005
    Assignee: KLA-Tencor Technologies Corporation
    Inventor: Mehran Naser-Ghodsi
  • Patent number: 6841400
    Abstract: The invention relates to improvements in a method of manufacturing a semiconductor device in which deterioration in a transistor characteristic is avoided by preventing a channel stop implantation layer from being formed in an active region. After patterning a nitride film (22), the thickness of an SOI layer 3 is measured (S2) and, by using the result of measurement, etching conditions (etching time and the like) for SOI layer 3 are determined (S3). To measure the thickness of SOI layer 3, it is sufficient to use spectroscopic ellipsometry which irradiates the surface of a substance with linearly polarized light and observes elliptically polarized light reflected by the surface of a substance. The etching condition determined is used and a trench TR2 is formed by using patterned nitride film 22 as an etching mask (S4).
    Type: Grant
    Filed: August 12, 2002
    Date of Patent: January 11, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Takuji Matsumoto, Mikio Tsujiuchi, Toshiaki Iwamatsu, Shigenobu Maeda, Yuuichi Hirano, Shigeto Maegawa
  • Patent number: 6842658
    Abstract: Automatic generation of processing conditions will be provided, based on a database and process modeling by a computer equipped in semiconductor device fabrication equipment, by using input of wafer processing history including the thickness and quality. The computer equipped in semiconductor device fabrication equipment obtains the wafer processing and inspection results from a production line management computer in order to assist input of the process history. The computer in the fabrication equipment can be connected to computers in a fabrication equipment manufacturer on a communication network to automatically provide process conditions and maintenance schedule.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: January 11, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Masaru Izawa, Masahito Mori, Nobuyuki Negishi, Shinichi Tachi
  • Patent number: 6837965
    Abstract: A method and apparatus performing process end point detection in a semiconductor substrate processing system by monitoring for an increase in a flow of backside gas above a predetermined limit.
    Type: Grant
    Filed: August 14, 2002
    Date of Patent: January 4, 2005
    Inventors: Aaron D. Gustafson, Daniel J. Baer, Leonard D. Moravek, John P. Kettley, Jr.
  • Patent number: 6838294
    Abstract: A method for use in removing a portion of a semiconductor chip. The method comprises etching a backside of the semiconductor chip, the frontside including a first well with a first type of doping and a second well with a second type of doping; monitoring a backside of the semiconductor chip during etching; and determining when a first portion of the backside over one of the first and second wells differs from a second portion of the backside over the other of the first and second wells. A method for etch endpoint detection includes etching a backside of a semiconductor chip, the semiconductor chip having at least one doped well formed proximate a frontside of the semiconductor chip; monitoring the backside of the semiconductor chip during etching until at least one doped well becomes visible; and stopping etching after the doped well becoming visible.
    Type: Grant
    Filed: February 13, 2002
    Date of Patent: January 4, 2005
    Assignee: Intel Corporation
    Inventors: Sailesh C. Suthar, Paul J. Hack, Syed Nabeel Sarwar, Mary J. Martinez
  • Publication number: 20040259276
    Abstract: A method of monitoring a processing system for processing a substrate during the course of semiconductor manufacturing is described. The method comprises acquiring data from the processing system for a plurality of observations. It further comprises constructing a principal components analysis (PCA) model from the data, wherein a weighting factor is applied to at least one of the data variables in the acquired data. The PCA mode is utilized in conjunction with the acquisition of additional data, and at least one statistical quantity is determined for each additional observation. Upon setting a control limit for the processing system, the at least one statistical quantity is compared with the control limit for each additional observation. When, for example, the at least one statistical quantity exceeds the control limit, a fault for the processing system is detected.
    Type: Application
    Filed: March 26, 2004
    Publication date: December 23, 2004
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hongyu Yue, Hieu A. Lam
  • Patent number: 6825051
    Abstract: A protective coating is provided herein and methods of using the protective coating for susceptors used in semiconductor deposition chambers are described. In the preferred embodiments, CVD chamber equipment, such as a susceptor, is protected from plasma etch cleaning. Prior to CVD of silicon nitride, the chamber equipment is first coated with an emissivity-stabilizing layer, such as silicon nitride. This layer is then superficially oxidized. After repeated cycles of deposited silicon nitride upon different substrates in sequence, the chamber is emptied of wafers and a plasma cleaning process is conducted. Plasma cleaning is preferably selective against the silicon oxynitride protective coating. After the plasma cleaning process, the emissivity-stabilizing layer is reapplied, oxidized, and a plurality of deposition cycles can commence again.
    Type: Grant
    Filed: May 17, 2002
    Date of Patent: November 30, 2004
    Assignee: ASM America, Inc.
    Inventors: Fred AmRhein, Christophe Pomarede
  • Publication number: 20040235204
    Abstract: A microelectronic programmable structure suitable for storing information and methods of forming and programming the structure are disclosed. The programmable structure generally includes an oxide ion conductor and a plurality of electrodes. Electrical properties of the structure may be altered by applying energy to the structure, and thus information may be stored using the structure.
    Type: Application
    Filed: March 8, 2004
    Publication date: November 25, 2004
    Inventor: Michael N. Kozicki
  • Patent number: 6818562
    Abstract: A method and apparatus for operating a matching network within a plasma enhanced semiconductor wafer processing system that uses pulsed power to facilitate plasma processing.
    Type: Grant
    Filed: May 14, 2002
    Date of Patent: November 16, 2004
    Inventors: Valentin Todorow, John Holland, Nicolas Gani
  • Patent number: 6813534
    Abstract: In an endpoint detection method for a process performed in a substrate processing chamber with an energized gas, a process variable of the process is detected. The process variable comprising at least one of (i) a radiation emitted by the energized gas, (ii) a radiation reflected from a substrate in the chamber, (iii) a reflected power level of the energized gas, and (iv) a temperature in the chamber. An endpoint signal is issued when the process variable is indicative of an endpoint of the process. A process parameter of the process is also detected, the process parameter comprising at least one of (i) a source power, (ii) an RF forward power, reflected power, or match components, (iii) an RF peak-to-peak voltage, current or phase, (iv) a DC bias level, (v) a chamber pressure or throttle valve position, (vi) a gas composition or flow rate, (vii) a substrate temperature or composition, (viii) a temperature of a chamber component or wall, and (ix) a magnetic confinement level or magnet position.
    Type: Grant
    Filed: February 20, 2002
    Date of Patent: November 2, 2004
    Inventors: Zhifeng Sui, Paul E Luscher, Nils Johansson, Michael D Welch
  • Patent number: 6812044
    Abstract: A method for monitoring plasma parameters during a plasma process such as a plasma etching process, comparing the measured plasma parameters to predetermined parameter specifications, and either terminating the plasma process or modifying the plasma process in progress to re-establish the plasma parameters within the parameter specifications. The plasma parameters may be measured by the self-excited electron resonance spectroscopy (SEEKS) technique or by microwave interferometry.
    Type: Grant
    Filed: December 19, 2002
    Date of Patent: November 2, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Hsien-Kuang Chiu, Bor-Wen Chan, Baw-Ching Perng, Yuan-Hung Chiu, Hun-Jan Tao
  • Patent number: 6805952
    Abstract: Components for use in plasma processing chambers having plasma exposed surfaces with surface roughness characteristics that promote polymer adhesion. The roughened surfaces are formed by plasma spraying a coating material such as a ceramic or high temperature polymer onto the surface of the component. The plasma sprayed components of the present invention can be used for plasma reactor components having surfaces exposed to the plasma during processing. Suitable components include chamber walls, chamber liners, baffle rings, gas distribution plates, plasma confinement rings, and liner supports. By improving polymer adhesion, the plasma sprayed component surfaces can reduce the levels of particle contamination in the process chamber thereby improving yields and reducing down-time required for cleaning and/or replacing chamber components.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: October 19, 2004
    Assignee: Lam Research Corporation
    Inventors: Christopher C. Chang, Robert J. Steger
  • Patent number: 6804572
    Abstract: A method enhances a process and profile simulator algorithm to predict the surface profile that a given plasma process will create. The method first tracks an energetic particle and then records the ion fluxes produced by the energetic particle. A local etch rate and a local deposition rate are computed from neutral fluxes, surface chemical coverage, and surface material type that are solved simultaneously.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: October 12, 2004
    Assignee: Lam Research Corporation
    Inventors: David Cooperberg, Vahid Vahedi
  • Patent number: 6803309
    Abstract: A method for forming an adhesion/barrier liner with reduced fluorine contamination to improve adhesion and a specific contact resistance of metal interconnects including providing a semiconductor wafer having a process surface including an etched opening extending through a dielectric insulating layer thickness and in closed communication with a conductive underlayer surface; pre-heating the semiconductor wafer in a plasma reactor to a pre-heating temperature of at least about 400° C.; cleaning the etched opening according to a plasma assisted reactive pre-cleaning process (RPC) comprising nitrogen trifluoride (NF3); and, blanket depositing at least a first adhesion/barrier layer over the etched opening substantially free of fluorine containing residue.
    Type: Grant
    Filed: July 3, 2002
    Date of Patent: October 12, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Shih-Wei Chou, Chii-Ming Wu
  • Publication number: 20040197938
    Abstract: The present invention is a monitoring method of monitoring a change of a processing state of an object to be processed when a predetermined process is conducted to the object to be processed by using a processing unit. The method includes: a step of respectively setting constant response variables for two states before and after a processing state changes, the response variables being different from each other; and a step of conducting a multiple regression analysis about the response variables in order to produce a model expression, predictor variables of the multiple regression analysis being a plurality of detected data from a plurality of detectors provided in the processing unit. Then, the method includes: a step of actually obtaining a plurality of detected data from the plurality of detectors when the predetermined process is conducted to the object to be processed; and a step of estimating or monitoring a processing state by applying the obtained plurality of detected data to the model expression.
    Type: Application
    Filed: June 1, 2004
    Publication date: October 7, 2004
    Inventor: Susumu Saito
  • Publication number: 20040191932
    Abstract: A plasma processing method is conducted while a thickness of a resist film being monitored, thereby preventing the thickness of the resist film from being reduced. The plasma processing method includes steps of supplying a processing gas into an airtight processing chamber, and plasma-processing a target layer formed on an object to be processed by using a resist film as a mask. The method includes a main etching process (first process) of plasma-processing the target layer while the thickness of the resist film being monitored until the reduction rate of the thickness of the resist film reaches a predetermined value, and an over-etching process (second process) of plasma-processing the target layer in a changed process condition in which selectivity against the resist film is higher than in the first process.
    Type: Application
    Filed: March 30, 2004
    Publication date: September 30, 2004
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Takashi Fuse
  • Publication number: 20040185584
    Abstract: A method for compensating for CD variations across a semiconductor process wafer surface in a plasma etching process including providing a semiconductor wafer having a process surface including photolithographically developed features imaged from a photomask; determining a first dimensional variation of the features with respect to corresponding photomask dimensions along at least one wafer surface direction to determine a first levelness of the process surface; determining gas flow parameters in a plasma reactor for a plasma etching process required to approach a level process surface by reference to an archive of previous plasma etching process parameters carried out in the plasma reactor; carrying out the plasma etching process in the plasma rector according to the determined gas flow parameters; and, determining a second dimensional variation of the features along the at least one wafer surface direction to determine a second levelness of the process surface.
    Type: Application
    Filed: March 20, 2003
    Publication date: September 23, 2004
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Li-Te S. Lin, Yui Wang, Ming-Ching Chang, Li-Shung Chen, Huain-Jelin Lin, Yuan-Hung Chiu, Hun-Jan Tao
  • Patent number: 6794200
    Abstract: In the method for determining a preceding wafer, at least one semiconductor wafer is determined as a preceding wafer among a plurality of semiconductor wafers constituting one lot. The preceding wafer is then subjected to a given process among a plurality of processes for fabrication of a semiconductor device. The determination of the preceding wafer is based on processing results of an upstream process among the plurality of processes performed for the plurality of semiconductor wafers prior to the given process. After examination of processing results of the given process on the preceding wafer, the given process is performed for the plurality of semiconductor wafers other than the preceding wafer.
    Type: Grant
    Filed: May 8, 2003
    Date of Patent: September 21, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroaki Ishizuka, Shigeru Matsumoto
  • Patent number: 6793765
    Abstract: One aspect of the present invention relates to a system for determining and controlling a microloading effect in order to achieve desired feature depth on a wafer. The system includes a semiconductor structure having one or more layers formed over a substrate, a fabrication process assembly for forming features on the semiconductor structure, a microloading characterization system for monitoring the fabrication process, measuring feature depth, and for processing the measurements in order to ascertain the microloading effect, a detection apparatus operatively coupled to the microloading characterization system to facilitate monitoring the fabrication process and measuring feature depth, and a control system for regulating the fabrication process based on the output from the microloading characterization system.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: September 21, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Catherine B. Labelle, Bhanwar Singh, Bharath Rangarajan
  • Patent number: 6794302
    Abstract: A method for compensating CD variations across a semiconductor process wafer surface in a plasma etching process including a semiconductor wafer having a process surface comprising patterned features; carrying out a first plasma etching process wherein the semiconductor wafer is heated to at least two selectively controllable temperature zones; determining a first dimensional variation of etched features with respect to reference dimensions over predetermined areas of the process surface including the two selectively controllable temperature zones; determining operating temperatures for the two selectively controllable temperature zones to achieve a targeted dimensional variation change in the first dimensional variation to achieve a desired second dimensional variation; plasma etching the process surface to the desired operating temperatures; and, determining an actual dimensional variation change for use in at least one subsequent plasma etching process.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: September 21, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Li-Shiun Chen, Ming-Ching Chang, Huan-Just Lin, Li-Te S. Lin, Yung-Hog Chiu, Hun-Jan Tao
  • Patent number: 6790686
    Abstract: A method includes scheduling a plurality of workpieces for processing by a plurality of tools. Each workpiece has an associated priority. The processing in at least one of the tools is controlled in accordance with a process control model. A process control request associated with the controlling of the tool is generated. The priorities of at least a subset of the workpieces are determined based on the process control request. A manufacturing system includes a plurality of tools for processing workpieces, a dispatch unit, and a process control unit. The dispatch unit is configured to schedule a plurality of workpieces for processing by the tools. Each workpiece has an associated priority. The process control unit is configured to control the processing in at least one of the tools in accordance with a process control model and generate a process control request associated with the controlling of the tool.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: September 14, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Matthew A. Purdy, Cabe W. Nicksic
  • Publication number: 20040166598
    Abstract: In a plasma processing apparatus including: a process chamber 3; a light-receiving part 11 for receiving a plasma emission; a spectrometer unit 13 for performing a spectrometry on the plasma emission to convert the same into a multi-channel signal; a signal converting unit 14 for converting the multi-channel signal into one signal using a filter vector stored in a database 15; and a processing unit 16 for determining a condition in the process chamber based on the resulting signal, the condition in the process chamber is determined in such a manner that differences between principal component scores derived from plasma emission data on a lot of substrates by multivariate analysis and principal component scores for the preceding lot of substrates are found, an average value of the differences in one lot, a difference between a maximum and a minimum of the differences in one lot and a standard deviation of the differences in one lot are determined, and the values are compared with a preset threshold.
    Type: Application
    Filed: February 18, 2004
    Publication date: August 26, 2004
    Inventors: Go Miya, Hiroyuki Kitsunai, Junichi Tanaka, Toshio Masuda, Hideyuki Yamamoto
  • Patent number: 6778272
    Abstract: A method of processing a semiconductor device is provided with several steps, including the step of generating plasma in a processing chamber to form or process a thin firm on a semiconductor device. The step of scanning, through a window, intensity modulated laser beam, which is modulated at a desired frequency inside the processing chamber where the semiconductor device is being processed. The step of receiving by a sensor through the window a back scattered light being scattered from fine particles suspended in the processing chamber by the scanning laser and detecting the desired frequency component from a signal outputted from the sensor. From the detected frequency component information relating to quantity, size, and distribution of the fine particles illuminated by the laser beam inside the processing chamber is obtained. This information is then outputted.
    Type: Grant
    Filed: January 17, 2001
    Date of Patent: August 17, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Hiroyuki Nakano, Toshihiko Nakata, Masayoshi Serizawa
  • Patent number: 6759253
    Abstract: The intensity of the light emitted from the light-emitting diode on wafer is measured and then the potential difference between the terminals of the light-emitting element, and the plasma current flowing thereinto are derived from measured light intensity. Since the use of a camera enables non-contact measurement of emitted light intensity, the lead-in terminals for lead wires that are always required in conventional probing methods become unnecessary. In addition, since the target wafer does not require lead wire connection, wafers can be changed in the same way as performed for etching.
    Type: Grant
    Filed: February 16, 2001
    Date of Patent: July 6, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Tatehito Usui, Tetsuo Ono, Ryoji Nishio, Kazue Takahashi, Nobuyuki Mise
  • Patent number: 6754552
    Abstract: A plurality of measuring devices to obtain numerical information necessary for control in process control of plasma utilizing equipment are connected to a first communication link, a plurality controllers to conduct numerical operations according to the numerical information are connected to a second communication link, and a plurality of control devices to receive control numerical information generated by the controllers to conduct necessary control.
    Type: Grant
    Filed: March 5, 2001
    Date of Patent: June 22, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Masaharu Nishiumi, Hiromichi Enami
  • Patent number: 6750977
    Abstract: A dry processing apparatus includes a processing chamber provided with a measurement window having a reflection portion which totally reflects light on the side of an inner surface thereof and a transmission portion. When a layer is not deposited, measurement light is irradiated so that the light is totally reflected by the reflection portion. A deviation between the measurement light reflected by a surface of the deposited layer and the measurement light reflected by the reflection portion is measured to determine a thickness of the deposited layer. A quantity of light reflected by the surface of the deposited layer is compared with the light quantity in case where irregularities are not formed in the surface of the deposited layer to evaluate a state of irregularities of the surface. The thickness of the deposited layer and a state of the surface of the layer are monitored separately.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: June 15, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Toru Otsubo, Tatehito Usui
  • Patent number: 6747239
    Abstract: A plasma processing apparatus having a process chamber to process specimens; a status detecting unit for detecting the internal processing status of the process chamber and outputting a plurality of signals; and a signal converting unit for extracting an arbitrary number of signal processing filters from a signal filter database using a signal filter selector and creating an arbitrary number of device status signals. The signal converting unit creates fewer effective device status signals of a time series from the output signals.
    Type: Grant
    Filed: May 14, 2003
    Date of Patent: June 8, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Junichi Tanaka, Hiroyuki Kitsunai, Ryoji Nishio, Seiichiro Kanno, Hideyuki Yamamoto
  • Publication number: 20040087045
    Abstract: An etching signal layer which is formed by a sequential gas phase deposition with a layer thickness of less than 20 nanometers, and which is composed of a metal oxide or of an oxide of rare earths is provided between a substrate, which is located underneath it, and a process layer. The etching signal layer produces an etching signal, which is independent of the stack layer systems that are to be removed, and contains two or more materials that contain silicon, and can be removed quickly and with narrow process tolerances. One substrate surface of the substrate is protected irrespective of the topography. Etching methods based on the etching signal layer can be carried out precisely, and can be used in a variable manner.
    Type: Application
    Filed: September 2, 2003
    Publication date: May 6, 2004
    Inventors: Thomas Hecht, Uwe Schroeder, Harald Seidl, Martin Gutsche, Stefan Jakschik, Stephan Kudelka, Albert Birner
  • Patent number: 6723571
    Abstract: A semiconductor device manufacturing method including a plasma etching process performed on a surface of the semiconductor device is provided. The semiconductor device has a specific metal therein that is unexposed at the surface at the beginning stage of the etching process, the specific metal gets exposed during the etching process, and the existence of the specific metal in an etching reactive chamber affects the rate of etching the semiconductor device. The method is characterized in that the specific metal is plasma etched as pretreatment before starting the plasma etching process of the semiconductor device to keep the etching rate stable.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: April 20, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventor: Yukihiko Furukawa
  • Patent number: 6716362
    Abstract: A method of etching a substrate, includes measuring a reflectance signal from a reflective material deposited on the substrate as the substrate is being etched, correlating the substrate etch rate to the reflectance signal from the reflective material, and using the etch relation between the substrate and the reflective material to determine the etch target.
    Type: Grant
    Filed: October 24, 2000
    Date of Patent: April 6, 2004
    Assignee: International Business Machines Corporation
    Inventor: Jason Michael Benz
  • Patent number: 6709962
    Abstract: A method for producing printed circuits utilizing direct printing methods to apply a pattern mask to a substrate. The direct printing methods include correcting positional errors in a printing apparatus by ascertaining the errors in the printer through comparison of a printed pattern and a known standard pattern. Printer inputs are manipulated to compensate for the ascertained errors of the printer. The pattern mask applied by the corrected printer may be an etch resist mask for forming conductive pathways by an etching process, or the pattern mask may be a plating mask with conductive pathways being formed by a plating operation. The process of the present invention is applicable to forming both single-sided and double-sided printed circuit boards.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: March 23, 2004
    Inventor: N. Edward Berg
  • Patent number: 6709876
    Abstract: In a method for removing an organic material from semiconductor devices, at least one semiconductor device is inserted into a so-called piranha bath. Measurement data are processed to get a data curve for measuring a concentration of at least one reaction product. The measurement data is queried for at least one of a turning point, a local maximum point or a local minimum point of the curve each being significantly different from signal noise after removing the semiconductor device from the fluid. With the information it is decided whether further processing of the semiconductor device is needed. The method is suitable for detecting an incomplete removal of organic material, i.e. photoresist deposited on the processed semiconductor device.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: March 23, 2004
    Assignee: Infineon Technologies AG
    Inventors: Veronika Polei, Martin Welzel
  • Patent number: 6703250
    Abstract: A method for automated monitoring and controlling of a semiconductor wafer plasma etching process including collecting data versus time during a plasma etching process the data including information representative of a concentration of at least one pair of reactant and product species present during the course of the plasma etching process; calculating a selected ratio of at least one reactant species and one product species at selected time intervals in the plasma etching process to create real-time concentration ratio data; retrieving model concentration ratio data for the at least one reactant species and one product species for comparison with the real-time concentration ratio data; comparing the model concentration ratio data with the real-time concentration ratio data to determine a difference; and, adjusting at least one plasma process operating parameter to minimize the difference.
    Type: Grant
    Filed: February 14, 2002
    Date of Patent: March 9, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Hsien-Kuang Chiu
  • Publication number: 20040040658
    Abstract: In a semiconductor device fabrication apparatus for performing an etching process for a semiconductor wafer having a plurality of films formed on a surface thereof and disposed in a chamber, by using plasma generated in the chamber, a change in light of multi-wavelength from the surface of the semiconductor wafer is measured during a predetermined period of the etching process, and a state of the etching process is judged from the displayed change amount of light of multi-wavelength.
    Type: Application
    Filed: August 29, 2002
    Publication date: March 4, 2004
    Inventors: Tatehito Usui, Motohiko Yoshigai, Tsuyoshi Yoshida, Hideyuki Yamamoto
  • Patent number: 6689521
    Abstract: The present invention provides for a method and an apparatus for controlling plasma photoresist removal processes. At least one manufacturing run of semiconductor devices is processed. Environmental data is acquired in response to processing the semiconductor devices. Metrology data is acquired in response to processing the semiconductor devices. The method further comprises performing residual gas analysis based upon the acquired environmental data and the acquired metrology data.
    Type: Grant
    Filed: March 15, 2002
    Date of Patent: February 10, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Greg Goodwin