Abstract: A mirror device which deflects incident light includes: a mirror arranged on a substrate and supported by a hinge; an address electrode deflecting the mirror to an ON state, an OFF state, or an oscillating state; a drive circuit applying a voltage to the address electrode; and a first stopper unit determining an oscillation amplitude in the oscillating state.

Abstract: Additional control flexibilities to generate more gray scales for an image display system is achieved by controlling the intensity distribution of the light projection from a light source to a deflecting mirror to further coordinate with the control of the intermediate states of the deflecting mirror. The control light source intensity distribution can provide incident light with wide varieties of intensity distributions including non-uniform, symmetrical and non-symmetrical, different distributions of polarizations, various cross sectional shapes of the incident lights and other combinations of all of the above variations. More stable and better control of gray scale control is also achieved by optimizing the intensity distributions of the incident light to produce the best visual effects of the image display.

Abstract: A vertical semiconductor power device includes a plurality of semiconductor power cells connected to a bottom electric terminal disposed on a bottom surface of a semiconductor substrate and at least a top electrical terminal disposed on a top surface of the substrate and connected to the semiconductor power cells. The top electrical terminal further includes a solderable front metal for soldering to a conductor for providing an electric connection therefrom. In an exemplary embodiment, the conductor soldering to the solderable front metal includes a conductor of a high-heat-conductivity metal plate. In another exemplary embodiment, the conductor soldering to the solderable front metal includes a copper plate. In another exemplary embodiment, the solderable front metal includes a Ti/Ni/Au front metal. In another exemplary embodiment, the solderable front metal includes a Ti/Ni/Ag front metal.

Abstract: A mirror device comprises: an electrode placed on a substrate; a hinge which is connected to the electrode and which has a flat part at an end part on a side opposite to the electrode; and a mirror placed on the flat part, wherein a protrusion part formed on the flat part is placed between the flat part and the mirror.

Abstract: This invention discloses a semiconductor wafer for manufacturing electronic circuit thereon. The semiconductor substrate further includes an etch-back indicator that includes trenches of different sizes having polysilicon filled in the trenches and then completely removed from some of the trenches of greater planar trench dimensions and the polysilicon still remaining in a bottom portion in some of the trenches having smaller planar trench dimensions.

Abstract: This invention discloses an improved trenched metal oxide semiconductor field effect transistor (MOSFET) device that includes a trenched gate surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a substrate. The MOSFET cell further includes a shielded gate trench (SGT) structure below and insulated from the trenched gate. The SGT structure is formed substantially as a round hole having a lateral expansion extended beyond the trench gate and covered by a dielectric linen layer filled with a trenched gate material. The round hole is formed by an isotropic etch at the bottom of the trenched gate and is insulated from the trenched gate by an oxide insulation layer. The round hole has a lateral expansion beyond the trench walls and the lateral expansion serves as a vertical alignment landmark for controlling the depth of the trenched gate.

Abstract: A method to manufacture a trenched semiconductor power device including a plurality of trenched gates surrounded by source regions near a top surface of a semiconductor substrate encompassed in body regions. The method for manufacturing the trenched semiconductor power device includes a step of carrying out a tilt-angle implantation through sidewalls of trenches to form drift regions surrounding the trenches at a lower portion of the body regions with higher doping concentration than the epi layer for Rds reduction, and preventing a degraded breakdown voltage due to a thick oxide in lower portion of trench sidewall and bottom. In an exemplary embodiment, the step of carrying out the tilt-angle implantation through the sidewalls of the trenches further includes a step of carrying out a tilt angle implantation with a tilt-angle ranging between 4 to 30 degrees.

Abstract: This invention discloses a bottom-anode Schottky (BAS) diode that includes an anode electrode disposed on a bottom surface of a semiconductor substrate. The bottom-anode Schottky diode further includes a sinker dopant region disposed at a depth in the semiconductor substrate extending substantially to the anode electrode disposed on the bottom surface of the semiconductor and the sinker dopant region covered by a buried Schottky barrier metal functioning as an Schottky anode.

Abstract: This invention discloses a semiconductor power device that includes a plurality of power transistor cells surrounded by a trench opened in a semiconductor substrate. At least one of the cells constituting an active cell has a source region disposed next to a trenched gate electrically connecting to a gate pad and surrounding the cell. The trenched gate further has a bottom-shielding electrode filled with a gate material disposed below and insulated from the trenched gate. At least one of the cells constituting a source-contacting cell surrounded by the trench with a portion functioning as a source connecting trench is filled with the gate material for electrically connecting between the bottom-shielding electrode and a source metal disposed directly on top of the source connecting trench.

Abstract: A semiconductor power device comprising a termination area that includes a trenched gate runner electrically connected to a trenched gate of said semiconductor power device. The semiconductor power device further includes a trenched field plate disposed in a trench opened in the termination area and the trenched field plate is electrically connected to the trenched gate runner. A gate runner contact trench and a field plate contact trench opened through an insulation layer covering the gate runner and the trenched field plate for extending into a doped gate dielectric filling in the trenched gate runner and the field plate wherein the gate runner contact trench and the field plate contact trench filled with a gate runner contact plug and a field plate contact plug respectively. A gate metal disposed on top of the insulation layer to electrically contact the gate runner contact plug and the field plate contact plug for electrically interconnecting the trenched gate runner and the trenched field plate.

Abstract: A mirror device comprises plural mirror elements, each of which comprises a mirror for reflecting illumination light emitted from a light source, a hinge for supporting the mirror placed on a substrate, a hinge structural body for supporting the hinge, and electrodes for controlling a deflection direction of the mirror placed on the substrate, and in each of which the hinge is placed so as to traverse the edge of the mirror or the border with an adjacent mirror. Also enabled is a configuration of a projection apparatus, which comprises the mirror device.

Abstract: This invention discloses an one time programmable (OTP) memory. The OTP memory includes a first and a second metal oxide semiconductor (MOS) transistors connected in parallel and controlled by a single polysilicon stripe functioning as a gate wherein the OTP memory further includes a drift region for counter doping a lightly dope drain (LDD) encompassing and surrounding a drain and a source of the first MOS transistor having a different threshold voltage than the second MOS transistor not reached by the drift region. In a preferred embodiment, the first and second MOS transistors are N-MOS transistors disposed in a common P-well and the drift region of the first MOS transistor further comprising a P-drift region.

Abstract: An image projection device receives a light emitted from a light source through an illumination optic for projecting to a spatial light modulator (SLM) having a plurality of deflectable micromirrors The micromirrors further formed with a sub-wavelength microstructure on a reflective surface of the micromirrors having a reflection guided mode resonant grating to take advantage of an ultra-fine processing technology available in recent years used in semiconductor manufacture and micro-machining to fabricate a sub-wavelength grating (SWG) having a pitch between the grating ridges that is smaller than the wavelength of light.

Abstract: A hybrid semiconductor power device that includes a plurality of closed power transistor cells each surrounded by a first and second trenched gates constituting substantially a closed cell and a plurality of stripe cells comprising two substantially parallel trenched gates constituting substantially an elongated stripe cell wherein the closed cells and stripe cells constituting neighboring cells sharing trenched gates disposed thereinbetween as common boundary trenched gates. The closed MOSFET cell further includes a source contact disposed substantially at a center portion of the closed cell wherein the trenched gates are maintained a critical distance (CD) away from the source contact.

Abstract: Additional control flexibilities to generate more gray scales for an image display system is achieved by controlling the intensity distribution of the light projection from a light source to a deflecting mirror to further coordinate with the control of the intermediate states of the deflecting mirror. The control light source intensity distribution can provide incident light with wide varieties of intensity distributions including non-uniform, symmetrical and non-symmetrical, different distributions of polarizations, various cross sectional shapes of the incident lights and other combinations of all of the above variations. More stable and better control of gray scale control is also achieved by optimizing the intensity distributions of the incident light to produce the best visual effects of the image display.

Abstract: A lithographic scanning apparatus includes a light projection device for seamlessly and uniformly projecting a scanning light onto a light exposing area. The light projecting device further includes an array of micromirrors having a predefined distribution pattern of reflectance variations for reflecting an incident light onto the light exposing area to seamlessly and uniformly scanning a reflecting light over the light exposing area. In one of a lithographic scanning apparatus, the micromirrors of the micromirror array are coated with a reflective coating of different reflectance to provide the predefined distribution pattern of reflectance variations. In another lithographic scanning apparatus, the micromirrors of the micromirror array are coated with stripes of reduced reflectance whereby each micromirror may have predefined total reflectance to provide the predefined distribution pattern of reflectance variations.

Abstract: The present invention provides a projection display system comprising: illumination lights of plural colors emitted from plural laser light sources; an illumination optical system for illuminating the illumination light of at least one of the colors in an beam axis or in an illumination range, either of which is different from the other colors; a deflection mirror device for modulating the illumination lights of respective colors in the same deflection angle, with the modulation of each color being performed in sequence within one frame; a projection optical system for projecting the reflection light of the illumination light from the deflection mirror device; and a laser light source control circuit for controlling the intensity of the illumination light of each color, wherein the laser light source control circuit performs adjustment so that the ratio of intensity of each of the colors is a prescribed ratio.

Abstract: A symmetrical blocking transient voltage suppressing (TVS) circuit for suppressing a transient voltage includes an NPN transistor having a base electrically connected to a common source of two transistors whereby the base is tied to a terminal of a low potential in either a positive or a negative voltage transient. The two transistors are two substantially identical transistors for carrying out a substantially symmetrical bi-directional clamping a transient voltage. These two transistors further include a first and second MOSFET transistors having an electrically interconnected source. The first MOSFET transistor further includes a drain connected to a high potential terminal and a gate connected to the terminal of a low potential and the second MOSFET transistor further includes a drain connected to the terminal of a low potential terminal and a gate connected to the high potential terminal.

Abstract: A display control system, comprises: a spatial light modulator (SLM) constituted by a plurality of pixel elements placed in array; a first control unit for controlling each of the plurality of pixel elements under a state of ON or OFF; a second control unit for controlling each of the plurality of pixel elements under a state other than the ON or OFF states; a control changeover unit for dividing one frame period, for each pixel element of the plurality thereof, into a period of the first control unit controlling and that of the second control unit controlling, and also changing over between a control of the first control unit and that of the second control unit for each pixel element of the plurality thereof; and a data division unit for dividing input data to each of the plurality of pixel elements into first control unit-use data, which is input to the first control unit, and second control unit-use data which is input to the second control unit in accordance with the content of the present input data.

Abstract: A spatial light modulator supported on a device substrate includes a plurality of light modulation elements to modulate a light emitted from a light source. The spatial light modulator and the device substrate further comprises a cyclic structure on a surface of the spatial light modulator and/or the device substrate for preventing a reflection of the incident light from the cyclic structure. In an exemplary embodiment the cyclic structure includes cyclic structural elements having a distance between two cyclic elements shorter than the wavelength of an incident light for preventing a reflection of the incident light from the cyclic structure.