Patents Represented by Attorney, Agent or Law Firm Bo-In Lin
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Patent number: 7760415Abstract: The present invention provides a mirror device, comprising: a mirror; an elastic hinge for supporting the mirror and the elastic hinge has a specific electric resistance. The mirror device further includes an electrode for controlling the mirror, wherein a voltage is applied to the elastic hinge for a predetermined period in synchronous with a change of an electric voltage applied to the electrode.Type: GrantFiled: February 18, 2009Date of Patent: July 20, 2010Assignees: Silicon Quest Kabushiki-Kaisha, Olympus CorporationInventors: Fusao Ishii, Naoya Sugimoto, Hirotoshi Ichikawa, Yoshihiro Maeda
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Patent number: 7755830Abstract: The present invention provides a mirror device, comprising: an electrode placed on a substrate; a memory circuit connected to the electrode; an elastic hinge disposed near said electrode and extending from said substrate for supporting a mirror above said electrode wherein said elastic hinge having a negative temperature coefficient of resistance.Type: GrantFiled: February 18, 2009Date of Patent: July 13, 2010Assignees: Silicon Quest Kabushiki-Kaisha, Olympus CorporationInventors: Fusao Ishii, Naoya Sugimoto, Hirotoshi Ichikawa, Yoshihiro Maeda
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Patent number: 7755379Abstract: This invention discloses a circuit for performing an unclamped inductive test on a metal oxide semiconductor field effect transistor (MOSFET) device driven by a gate driver. The circuit includes a current sense circuit for measuring an unclamped inductive testing (UIS) current that increases with an increase of a pulse width inputted from the gate driver to the MOSFET device wherein the current sensing circuit is provided to turn off the gate driver when a predefined UIS current is reached. The test circuit further includes a MOSFET failure detection circuit connected to a drain terminal of the MOSFET device for measuring a drain voltage change for detecting the MOSFET failure during the UIS test. The test circuit further includes a first switch for switching ON/OFF a power supply to the MOSFET device to and a second switch connected between a drain and source terminal of the MOSFET.Type: GrantFiled: April 8, 2008Date of Patent: July 13, 2010Assignee: Alpha & Omega Semiconductor, LtdInventors: Sik K Lui, Anup Bhalla
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Patent number: 7752910Abstract: A mass flow sensor is supported on an N or P-type silicon substrate with orientation <100>. This mass flow sensor comprises a central thin-film heater and a pair of thin-film heat sensing elements, and a thermally isolated membrane for supporting the heater and the sensors out of contact with the substrate base. The mass flow sensor is arranged for integration on a same silicon substrate to form a one-dimensional or two-dimensional array in order to expand the dynamic measurement range.Type: GrantFiled: April 3, 2008Date of Patent: July 13, 2010Assignee: Siargo, Inc.Inventors: Gaofeng Wang, Chih-Chang Chen, Yahong Yao, Liji Huang
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Patent number: 7745878Abstract: This invention discloses a semiconductor power device that includes a plurality of power transistor cells surrounded by a trench opened in a semiconductor substrate. At least one active cell further includes a trenched source contact opened between the trenches wherein the trenched source contact opened through a source region into a body region for electrically connecting the source region to a source metal disposed on top of an insulation layer wherein a trench bottom surface of the trenched source contact further covered with a conductive material to function as an integrated Schottky barrier diode in said active cell. A shielding structure is disposed at the bottom and insulated from the trenched gate to provide shielding effect for both the trenched gate and the Schottky diode.Type: GrantFiled: November 18, 2008Date of Patent: June 29, 2010Assignee: Alpha & Omega Semiconductor, LtdInventors: Anup Bhalla, Sik K Lui
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Patent number: 7746538Abstract: An image display system includes an improved hinge for a micro-mirror device composed of a conductive-doped semiconductor and immune to plastic deformation at typical to extreme temperatures. The hinge is directly connected to the micro-mirror device and facilitates the manufacturing of an optically flat micro-mirror. This eliminates Fraunhofer diffraction due to recesses on the reflective surface of the micro-mirror. In addition, the hinge is hidden from incoming light thus improving contrast and fill-factor. The image display system further includes signal transmission metal traces formed on areas between the doped semiconductor hinges. The signal transmission metal traces are formed either before or after a high temperature crystallization process is applied to the hinges.Type: GrantFiled: February 12, 2008Date of Patent: June 29, 2010Assignee: Silicon Quest Kabushiki KaishaInventor: Fusao Ishii
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Patent number: 7742218Abstract: The present invention aims at providing a mirror device, comprising a plurality of mirror elements, wherein each of the mirror elements comprises a deflectable mirror, and an elastic member for deflectably supporting the mirror, wherein the mirror allows to be controlled under a first deflection control state in which incident light is reflected toward a first direction, a second deflection control state in which the incident light is reflected toward a second direction, and a third deflection control state in which the mirror oscillates between the first deflection control state and second deflection control state, wherein the mirror device reproduces gradations by combining the first through third deflection control states, and the natural oscillation cycle T of the oscillation system constituted by the mirror and elastic member satisfies: 110 [?sec]>T=2?*?(I/K)>2 [?sec], where “I” is the moment of rotation of the oscillation system and “K” is the spring constant of the elastic member.Type: GrantFiled: September 4, 2008Date of Patent: June 22, 2010Assignees: Silicon Quest Kabushiki-Kaisha, Olympus CorporationInventors: Hirotoshi Ichikawa, Yoshihiro Maeda, Fusao Ishii
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Patent number: 7737522Abstract: A Schottky diode includes at least a trenched opened in a semiconductor substrate doped with a dopant of a first conductivity type wherein the trench is filled with a Schottky junction barrier metal. The Schottky diode further includes one or more dopant region of a second conductivity type surrounding sidewalls of the trench distributed along the depth of the trench for shielding a reverse leakage current through the sidewalls of the trench. The Schottky diode further includes a bottom-doped region of the second conductivity type surrounding a bottom surface of the trench and a top-doped region of the second conductivity type surrounding a top portion of the sidewalls of the trench. In a preferred embodiment, the first conductivity type is a N-type conductivity type and the middle-depth dopant region comprising a P-dopant region.Type: GrantFiled: September 30, 2006Date of Patent: June 15, 2010Assignee: Alpha & Omega Semiconductor, Ltd.Inventors: Sik K Lui, Anup Bhalla
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Patent number: 7733558Abstract: A display device implemented with a spatial light modulator (SLM) comprising a plurality of pixel elements arranged in array to modulate incident light and display an image, wherein each of the pixel elements comprises a movable electrode and a stationary electrode; a drive circuit connected to the movable electrode and receives image data for applying a voltage applied to control the movable electrode in accordance with image data, and a voltage application circuit for applying and controlling a voltage applied to the stationary electrode to control a moving speed of the movable electrode.Type: GrantFiled: March 25, 2009Date of Patent: June 8, 2010Assignees: Silicon Quest Kabushiki-Kaisha, Olympus CorporationInventors: Kazuma Arai, Yoshihiro Maeda, Naoya Sugimoto, Fusao Ishii
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Patent number: 7706048Abstract: A projection apparatus comprising a light source for projecting an illumination light through an illumination optical system to a spatial light modulator (SLM) for modulating the illumination light for generating and transmitting an image projection light to an image projection surface through a projection optical system to display an image. The projection apparatus further includes an image process unit for receiving and analyzing an input image data; and the image process unit applies a conversion process to a signal related to the input image data to generate different control patterns for a plurality of adjacent pixel elements included in the SLM for a predetermined period during at least one frame period to reproduce a gradation of the pixel whereby each of the plurality of adjacent pixel elements has a gradation of approximately a same level.Type: GrantFiled: December 11, 2008Date of Patent: April 27, 2010Assignees: Silicon Quest Kabushiki-Kaisha, Olympus CorporationInventors: Yoshiaki Horikawa, Hirotoshi Ichikawa, Fusao Ishii
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Patent number: 7697188Abstract: The present invention provides a projection display system, comprising: plural laser light sources; an illumination optical system for illuminating, in different beam axes, light beams emitted from the individual laser light sources; a deflection mirror device, constituted by plural mirror elements, for modulating the light beams illuminated by the illumination optical system; and a projection optical system for projecting a reflection light from the deflection mirror device illuminated by the light beams.Type: GrantFiled: December 19, 2007Date of Patent: April 13, 2010Assignees: Silicon Quest Kabushiki-Kaisha, Olympus CorporationInventors: Yoshihiro Maeda, Fusao Ishii, Hirotoshi Ichikawa, Kazuma Arai
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Patent number: 7687851Abstract: A method for manufacturing a trenched metal oxide semiconductor field effect transistor (MOSFET) cell includes the steps of opening a gate trench in a semiconductor substrate and implanting ions of a first conductivity type same as a conductivity type of a source region with at least two levels of implanting energies to form a column of drain-to-source resistance reduction regions below the gate trench. The method further includes steps of forming a gate in the gate trench and forming body and source regions in the substrate surrounding the gate trench. Then the MOSFET cell is covered with an insulation layer and proceeds with applying a contact mask for opening a source-body contact trench with sidewalls substantially perpendicular to a top surface of the insulation layer into the source and body regions.Type: GrantFiled: November 23, 2005Date of Patent: March 30, 2010Assignee: M-MOS Semiconductor Sdn. Bhd.Inventor: Fwu-Iuan Hshieh
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Patent number: 7671662Abstract: A semiconductor power device includes a circuit to provide a gate signal wherein the gate signal has a negative temperature coefficient of gate driving voltage for decreasing a gate driving voltage with an increase temperature whereby the semiconductor power device has a net Ids temperature coefficient that is less than or equal to zero. In an exemplary embodiment, the gate voltage driver includes a diode that has a negative forward voltage temperature coefficient connected between a gate and a source of the semiconductor power device. In another embodiment, the gate voltage is integrated with the semiconductor power device manufactured as part of an integrated circuit with the semiconductor power device.Type: GrantFiled: October 28, 2008Date of Patent: March 2, 2010Assignee: Alpha and Omega Semiconductor IncorporatedInventors: Sik K Lui, Anup Bhalla, Sanjay Havanur
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Patent number: 7670908Abstract: This invention discloses semiconductor device that includes a top region and a bottom region with an intermediate region disposed between said top region and said bottom region with a controllable current path traversing through the intermediate region. The semiconductor device further includes a trench with padded with insulation layer on sidewalls extended from the top region through the intermediate region toward the bottom region wherein the trench includes randomly and substantially uniformly distributed nano-nodules as charge-islands in contact with a drain region below the trench for electrically coupling with the intermediate region for continuously and uniformly distributing a voltage drop through the current path.Type: GrantFiled: January 22, 2007Date of Patent: March 2, 2010Assignee: Alpha & Omega Semiconductor, Ltd.Inventors: François Hébert, Tao Feng
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Patent number: 7671439Abstract: A Schottky diode includes a Schottky barrier and a plurality of dopant regions disposed near the Schottky barrier as floating islands to function as PN junctions for preventing a leakage current generated from a reverse voltage. At least a trench opened in a semiconductor substrate with a Schottky barrier material disposed therein constitutes the Schottky barrier. The Schottky barrier material may also be disposed on sidewalls of the trench for constituting the Schottky barrier. The trench may be filled with the Schottky barrier material composed of Ti/TiN or a tungsten metal disposed therein for constituting the Schottky barrier. The trench is opened in a N-type semiconductor substrate and the dopant regions includes P-doped regions disposed under the trench constitute the floating islands. The P-doped floating islands may be formed as vertical arrays under the bottom of the trench.Type: GrantFiled: December 1, 2006Date of Patent: March 2, 2010Assignee: Alpha & Omega Semiconductor, Ltd.Inventors: Ji Pan, Anup Bhalla
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Patent number: 7667338Abstract: The present invention discloses an electronic package to contain and protect an integrated circuit (IC) chip. The electronic package further includes a leadframe, a flexible circuit or PCB type of substrate. The leadframe, flexible circuit or PCB type substrate further includes solder contacts, which are aligned with via holes in the molding layers on the top and bottom sides of the package. These via holes are for placing solder paste or solder balls from above and below for electrical access to the IC chip. These solder balls provide access for electrical testing after the package is mounted on a motherboard. They also provide the connection points for stacking multiple packages vertically.Type: GrantFiled: July 23, 2007Date of Patent: February 23, 2010Inventors: Paul T. Lin, Chi-Shih Chang
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Patent number: 7659570Abstract: This invention discloses a new switching device supported on a semiconductor that includes a drain disposed on a first surface and a source region disposed near a second surface of said semiconductor opposite the first surface. The switching device further includes an insulated gate electrode disposed on top of the second surface for controlling a source to drain current. The switching device further includes a source electrode interposed into the insulated gate electrode for substantially preventing a coupling of an electrical field between the gate electrode and an epitaxial region underneath the insulated gate electrode. The source electrode further covers and extends over the insulated gate for covering an area on the second surface of the semiconductor to contact the source region. The semiconductor substrate further includes an epitaxial layer disposed above and having a different dopant concentration than the drain region.Type: GrantFiled: May 9, 2005Date of Patent: February 9, 2010Assignee: Alpha & Omega Semiconductor Ltd.Inventors: Anup Bhalla, Daniel Ng, Tiesheng Li, Sik K. Lui
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Patent number: 7651299Abstract: A new and improved submarine anchoring cable that includes an outer layer that comprises 20% to 80% polyurethane elastomer, 20% to 80% carbon fiber mixed at a certain ratio. The outer layer is compressed to wrap around an aramid fiber or an ultra-high-molecular-weight polyethylene (UHMWPE) fiber and a core of synthetic fiber rope with molecular malleability, e.g., nylon, nylon66, and the polyester rope. The rope is exposed in a form of a loop from both ends of the cable. Each loop has one or multiple layers of sheath made of aramid fiber, Kelvar fiber or UHMWPE fiber wrapping around the rope near a tie on each end to provide extra friction and withstanding strength. One end of the anchor cable is fixed to the offshore platform and the other end is fixed to each anchor to hold on to the offshore platform within a limited area defined by multiple anchors fastened to the offshore platform.Type: GrantFiled: February 13, 2008Date of Patent: January 26, 2010Inventor: Yun Peng Huang
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Patent number: 7652813Abstract: A mirror device comprises: an electrode which is covered with a protective film made of a material containing a semiconductor material and is placed on a substrate; a mirror placed above the electrode; and an electrically conductive hinge placed between the mirror and the electrode, wherein an opening part is formed in a part of the protective film, and the hinge penetrates the protective film in the opening part thereof.Type: GrantFiled: July 28, 2008Date of Patent: January 26, 2010Assignees: Silicon Quest Kabushiki-Kaisha, Olympus CorporationInventors: Fusao Ishii, Yoshihiro Maeda, Hirotoshi Ichikawa, Naoya Sugimoto
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Patent number: 7649673Abstract: A micromirror device comprises a plurality of mirrors arranged on a substrate, an elastic hinge for supporting any each of the mirrors to be deflectable in a plurality of directions, an electrode arranged to face the mirror, and a driving circuit, which is connected to the mirror via the elastic hinge, for applying to the mirror an address voltage for independently controlling the deflection of the mirror.Type: GrantFiled: February 25, 2008Date of Patent: January 19, 2010Assignees: Silicon Quest Kabushiki-Kaisha, Olympus CorporationInventors: Yoshihiro Maeda, Fusao Ishii, Hirokazu Nishino, Kazuma Arai