Patents Represented by Attorney Gail W. Woodward
  • Patent number: 4533839
    Abstract: In a peripheral driver circuit a switching output transistor is operated from digital logic control and is provided with a shut off circuit which turns the output transistor off when its collector supply current exceeds its saturation current. A controlled base drive current is generated in a circuit that includes a scaled reference transistor that is operated at the same current density and the same collector voltage as the output transistor at its rated current. The reference transistor base current is amplified in a circuit having a current gain equal to the scaling between the reference and output transistors. Thus the base current applied to the output transistor is related to the driver rated current which ensures that saturation will occur up to at least the rated current and above which the shut off will be effective.
    Type: Grant
    Filed: January 10, 1983
    Date of Patent: August 6, 1985
    Assignee: National Semiconductor Corporation
    Inventor: Ramanatha V. Balakrishnan
  • Patent number: 4529895
    Abstract: A three state inverter driver is operated so that its output goes to a logic one briefly just prior to going to its high impedance state when commanded by a disable pulse. This characteristic is useful where a plurality of drivers are employed to operate a DRAM element.
    Type: Grant
    Filed: December 23, 1982
    Date of Patent: July 16, 1985
    Assignee: National Semiconductor Corporation
    Inventors: Timothy L. Garverick, Charles P. Carinalli
  • Patent number: 4528546
    Abstract: A thick film resistor includes a ceramic substrate 10, a pair of spaced apart electrical connections 30 affixed to the substrate 10, a region of electrically resistive material 21 coated onto the ceramic 10 and not in contact with either of the electrical connections 30, the electrically resistive material adapted to be trimmed 25 and 26 along an edge to thereby lower its resistance, and a pair of spaced apart strips of electrically conductive material 12 and 14 formed on the substrate 10 in electrical contact with the resistive material 21 and extending to a respective one of the pair of connectors 30, the strips 12 and 14 being substantially parallel where in contact with resistive material 21 except at ends of the strips 13 and 15 opposite the location to be trimmed 25. The invention places highest electric field concentrations away from the edge to be trimmed.
    Type: Grant
    Filed: May 2, 1983
    Date of Patent: July 9, 1985
    Assignee: National Semiconductor Corporation
    Inventor: Mark A. Paoli
  • Patent number: 4528496
    Abstract: A current mirror provides an output current, for use in an IC, that is a multiple of a reference current input. A high gain negative feedback loop is coupled between the current mirror reference input and the output device. This forces the reference input to operate as a diode and stabilizes the circuit operation so that the output current accurately reflects the reference current independently of the .beta. of the devices.
    Type: Grant
    Filed: June 23, 1983
    Date of Patent: July 9, 1985
    Assignee: National Semiconductor Corporation
    Inventors: Toyojiro Naokawa, Matsuro Koterasawa
  • Patent number: 4528463
    Abstract: A digital driver circuit employs an output transistor having an uncommitted collector that can act as a current sink connectable to a peripheral element that is to be controlled. The base of the output transistor is coupled to a driver circuit that controls the output transistor conduction. The driver input is coupled to a pair of cascaded current mirrors which act to switch the driver off and on. An input stage is coupled to control the current mirrors in response to a low current logic signal.
    Type: Grant
    Filed: June 30, 1982
    Date of Patent: July 9, 1985
    Assignee: National Semiconductor Corporation
    Inventor: David Kung
  • Patent number: 4527128
    Abstract: A linear amplifier output stage is provided with unity gain buffer means having an input coupled to the output terminal and an output coupled to the stage input. The unity gain buffer means is normally turned off by a control signal. When the amplifier is disabled by switching its bias current off, the buffers are turned on so that the output stage input capacitance is charged or discharged via the buffer means in accordance with the output terminal signal. When a plurality of such amplifiers are commonly coupled to a signal line the off amplifiers cannot be driven into conduction by the operating amplifier's output signal.
    Type: Grant
    Filed: September 6, 1983
    Date of Patent: July 2, 1985
    Assignee: National Semiconductor Corporation
    Inventors: Harry J. Bittner, Daniel D. Culmer, Walter R. Davis
  • Patent number: 4523156
    Abstract: A tone control circuit including an amplifier having a continuously adjustable frequency response control for varying the effect of low and high frequency filters upon the amplifier, and incorporating a novel distortion and transient suppression circuit is disclosed. A programmable variable resistance is coupled between an input and an output of said amplifier to attenuate circuit low frequency response while initially varying resistor value in response to a programming distortion/transient control signal. Thereafter, overall amplifier gain is further varied in response to the programming distortion/transient control signal by further adjusting the variable resistor value. Various embodiments of the invention provide both continuous and discrete control of tone and volume responsive to both excessive low frequency signal and transients. The present invention is implemented in both discrete and monolithic embodiments, which include both linear and CMOS technologies.
    Type: Grant
    Filed: July 25, 1983
    Date of Patent: June 11, 1985
    Assignee: National Semiconductor Corporation
    Inventor: Don R. Sauer
  • Patent number: 4520324
    Abstract: A circuit is disclosed for operating an MOS transistor in its resistive mode. A cascode transistor is used to clamp the voltage across the resistive transistor to the required level. The circuit gain can be controlled by controlling voltage across the resistive transistor.
    Type: Grant
    Filed: March 11, 1983
    Date of Patent: May 28, 1985
    Assignee: National Semiconductor Corporation
    Inventors: William B. Jett, Jr., Milton E. Wilcox
  • Patent number: 4518735
    Abstract: An adhesive composition for attaching semiconductor die to a substrate of a semiconductor device package includes a crosslinkable resinous polyimide, and an aminosilane crosslinking agent. For applications where backside contact to the semiconductor die is desired, the composition also contains finely divided conductive metal, such as silver flakes. When used in a novel process in which the adhesive composition is placed on the semiconductor device substrate prior to gelling, outgassed, a semiconductor die is placed on the outgassed composition, and the composition cured, the resulting semiconductor device package meets military specifications with a substantial cost reduction.
    Type: Grant
    Filed: October 29, 1981
    Date of Patent: May 21, 1985
    Assignee: National Semiconductor Corporation
    Inventors: Gary B. Goodrich, Jadish G. Belani
  • Patent number: 4519076
    Abstract: A means for testing the threshold voltage changes in a programmable and erasable floating gate memory cell by accessing directly and exclusively the cells in the core, and the amplifiers that sense the operation of the cells, so as to measure the relative currents therein as an indication of threshold voltage parameters.
    Type: Grant
    Filed: December 28, 1981
    Date of Patent: May 21, 1985
    Assignee: National Semiconductor Corporation
    Inventors: Ury Priel, Giora Yaron, Mark S. Ebel
  • Patent number: 4515432
    Abstract: One end of a plastic optical fiber is attached to an LED by pressing a melted end of the optical fiber against the LED.
    Type: Grant
    Filed: December 31, 1980
    Date of Patent: May 7, 1985
    Assignee: National Semiconductor Corporation
    Inventor: James S. Sherwin
  • Patent number: 4512815
    Abstract: In a monolithic semiconductor integrated circuit, conventional bipolar transistors are fabricated along with thin ion implanted junction field effect transistors, to create BIFET structures. After the conventional isolation diffusion, the surface oxide is stripped off and the semiconductor wafer ion implanted with slow diffusing impurities of a conductivity type, the same as the undiffused surface material. Then the bipolar transistors, along with the junction field effect transistors, are fabricated using conventional oxide masked diffusion processes. The field effect device sources and drains employ the base diffusions of the bipolar transistors while the gate contact is achieved with an emitter diffusion. The field effect device channels are formed at a depth substantially greater than that of the impurities deposited in the original ion implant. If desired, an ion implanted top gate can be established over the channel. The wafer is then annealed and processed in accordance with conventional techniques.
    Type: Grant
    Filed: January 31, 1983
    Date of Patent: April 23, 1985
    Assignee: National Semiconductor Corporation
    Inventors: Wadie N. Khadder, Jia T. Wang, Brian E. Hollins
  • Patent number: 4512816
    Abstract: A semiconductor substrate having an epitaxial layer on its upper surface is provided with a masking layer. Holes are photolithographically etched in the masking layer where isolation diffusion regions are to be formed. Then aluminum ions are implanted into the surface and diffused completely through the epitaxial layer so as to create tubs of epitaxial material that are PN junction isolated. Since aluminum is a fast diffuser, the diffusion time is greatly reduced, thereby reducing the up diffusion of buried N+ collector so that the original epitaxial layer can be made relatively thin. Lateral isolation diffusion is reduced, thereby substantially reducing the surface area required for isolation. Thus, the process is capable of increasing the component density in the completed integrated circuit.
    Type: Grant
    Filed: April 23, 1984
    Date of Patent: April 23, 1985
    Assignee: National Semiconductor Corporation
    Inventors: Amolak R. Ramde, Wadie N. Khadder, Surinder Krishna
  • Patent number: 4509204
    Abstract: Disclosed is a stop detector circuit for issuing a stop signal in an electronically tuned AM radio when the radio is center tuned on a radio signal that exceeds a predetermined level of signal strength. An intermediate frequency signal and an automatic gain control signal are used to determine when the stop signal is to be issued. Included in the stop detector circuit are a resonator driver (16), a resonator circuit (18), a resonator signal amplifier (20), a current switch (22), a threshold adjustment and filter (24), and a threshold detector (26). The resonator driver generates a resonator signal having a series of current pulses at the same frequency as the intermediate frequency signal. The resonator circuit converts the resonator signal current to a voltage, the AC component of which is at a minimum when the radio is not center tuned and at a maximum when the radio is center tuned. The resonator signal amplifier amplifies the resonator signal voltage.
    Type: Grant
    Filed: September 23, 1983
    Date of Patent: April 2, 1985
    Assignee: National Semiconductor Corporation
    Inventor: Donald T. Wile
  • Patent number: 4505015
    Abstract: A roller, for guiding strips of material, that can tilt in one plane with respect to a support shaft located inside the roller but is carefully prevented from moving out of the one plane by separate guides, also inside the roller, which separate guides are independent of the clearances needed in the bearing that allows tilting.
    Type: Grant
    Filed: July 19, 1982
    Date of Patent: March 19, 1985
    Assignee: National Semiconductor Corporation
    Inventors: John P. Ross, Carl E. Bernardi
  • Patent number: 4505225
    Abstract: Apparatus is disclosed for accurately aligning a processing device with respect to a predetermined reference location on semiconductor lead frame. The apparatus is especially suitable for use with a plating head for plating the pads of a lead frame. The apparatus includes a drive motor having a precision lead screw for attachment to the processing device to shift the device through a small distance to accurately position the device with respect to the predetermined reference positions on the lead frame. The drive motor is coupled to a rotary encoder which is rotated in response to the movement of a pin positioned to enter a reference hole in the lead frame. As the lead frame is advanced by an indexing device, the pin enters a reference hole in the lead frame near the end of the travel of the lead frame, causing the rod to rotate the encoder and supply a signal which for comparison with a reference signal.
    Type: Grant
    Filed: August 31, 1983
    Date of Patent: March 19, 1985
    Assignee: National Semiconductor Corporation
    Inventor: Syed Husain
  • Patent number: 4504744
    Abstract: An inverter gate using advanced low power Schottky configuration is shown in which a feedback transistor is used to provide input pull up action. The transistor is a minimum area device that occupies less chip area than the elements that it replaces. It also conserves power so that the speed power product is reduced. The circuit further incorporates negative feedback associated with the input bias resistor whereby a smaller resistor can be employed without increasing supply current drain or input current.
    Type: Grant
    Filed: January 13, 1983
    Date of Patent: March 12, 1985
    Assignee: National Semiconductor Corporation
    Inventor: Ramanatha V. Balakrishnan
  • Patent number: 4499432
    Abstract: An operational power amplifier having a bootstrap power output stage is designed to provide maximum dynamic range over a wide range of supply voltages. A control circuit in the form of a switched current mirror is added to the amplifier biasing circuit. At supply voltage higher than a predetermined threshold, the amplifier bias is adjusted to provide one half of this voltage at the output terminal. For supply voltages less than the threshold value, the output voltage is made less than half supply voltage.
    Type: Grant
    Filed: November 4, 1982
    Date of Patent: February 12, 1985
    Assignee: National Semiconductor Corporation
    Inventors: William H. Gross, Tadashi Sakurai
  • Patent number: 4497586
    Abstract: An electronic Celsius thermometer circuit suitable for fabrication in integrated circuit form has an output directly related to the temperature scale. The zero crossing is created by subtracting a negative-temperature-coefficient voltage from a positive-temperature-coefficient voltage with one of the voltages being made adjustable and set to equal the other. The output response is set to provide the desired temperature scale. If desired the zero crossing and temperature scale can be set for Fahrenheit readings as well as for Celsius. A circuit improvement is also disclosed for compensating the thermometer for departures from linearity.
    Type: Grant
    Filed: May 17, 1982
    Date of Patent: February 5, 1985
    Assignee: National Semiconductor Corporation
    Inventor: Carl T. Nelson
  • Patent number: 4497017
    Abstract: A switching regulator is provided with a separate or isolated d-c output for operating the switching pulse generating circuits. A large value resistor coupled between the d-c input line and the isolated d-c output will charge the filter capacitor to a higher than normal voltage. A zener diode string is coupled across the filter capacitor. The zener diodes in combination have a higher than nominal zener voltage. The diodes will respond to the capacitor voltage and develop a starting pulse that initiates the power supply when it is first energized.
    Type: Grant
    Filed: May 16, 1983
    Date of Patent: January 29, 1985
    Assignee: National Semiconductor Corporation
    Inventor: Walter R. Davis