Patents Represented by Attorney Hayes Soloway P.C.
  • Patent number: 6633134
    Abstract: Each unit pixel of an active-matrix-driven organic EL display device includes a pixel EL element and an associated pixel circuit. An array of the pixel EL elements are formed on the front surface of a multilayer substrate, the rear surface of which mounts thereon a drive IC and the plurality of pixel circuits. The electrodes of the drive IC are connected to the anode and cathodes of the pixel EL elements through via holes and interconnects formed in the multilayer substrate.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: October 14, 2003
    Assignee: NEC Corporation
    Inventors: Yuji Kondo, Atsushi Kota
  • Patent number: 6627490
    Abstract: A core section complementary transistor and a memory cell section complementary transistor are formed on a semiconductor substrate of a first conductivity type. The core section complementary transistor has a first well of a second conductivity type provided in the semiconductor substrate, a first core section MOS transistor provided on the first well of the second conductivity type, a second core section MOS transistor provided on the semiconductor substrate a device separation film which separates the first core section MOS transistor and the second core section MOS transistor from each other, and a well of the first conductivity type provided under a part of the device separation film which is closer to the second core section MOS transistor. The first core section MOS transistor has source-drain regions of the first conductivity type. The second core section MOS transistor has source-drain regions of the second conductivity type.
    Type: Grant
    Filed: August 16, 2002
    Date of Patent: September 30, 2003
    Assignee: NEC Electronics Corporation
    Inventors: Sadaaki Masuoka, Kiyotaka Imai
  • Patent number: 6624339
    Abstract: A phosphosilicate apatite useful as a confinement matrix for radioactive waste, and having the formula: MtCaxLnyHfwPuz−w(PO4)6−u(SiO4)uF2  (I) wherein: M represents an alkaline metal, Ln represents at least one cation selected from lanthanides, and t, x, y, z, w and u are such that: 0≦t≦1, 8≦x≦10, 0≦y≦1, 0<z≦0.5, 0≦w≦z, and 0<u≦y+2z, and the total number of positive charges provided by the alkaline metal, Ca, Ln, Hf and Pu cations are equal to 20+u is prepared by a sintering-reaction of a mixture of reagent powders, in a neutral or reducing atmosphere, with application of pressure before or during sintering.
    Type: Grant
    Filed: March 9, 2001
    Date of Patent: September 23, 2003
    Assignees: Commissariat a l'Energie Atomique, Compagnie Generale des Matieres Nucleaires
    Inventors: Jo{overscore (e)}lle Carpena, Laurent Boyer, Jean-Louis Lacout
  • Patent number: 6623775
    Abstract: The present invention relates to the discovery that hop extract is useful as an antibacterial agent against the dangerous pathogens Clostridium botulinum, Clostridium difficile, and Helicobacter pylori at levels below that at which a flavor from the acids contained therein is objectionable. More specifically, a process and associated product is described herein, comprising applying a solution of hop extract to a food, beverage or other medium so that the final concentration of hop ingredients is about 1 ppm or higher in order to inhibit the growth of Clostridium botulinum, Clostridium difficile, and/or Helicobacter pylori.
    Type: Grant
    Filed: March 15, 2001
    Date of Patent: September 23, 2003
    Assignee: S.S. Steiner, Inc.
    Inventors: Eric A. Johnson, Gerhard J. Haas
  • Patent number: 6623324
    Abstract: A method for manufacturing an organic EL device is provided which is capable of preventing an occurrence of a leakage current caused by heat in an encapsulation process. In the method for manufacturing the organic EL device, optical annealing is performed, before being encapsulated, by applying light with an irradiation wavelength &lgr; within a range of 300 nm to 500 nm to a transparent insulating substrate on which main components made up of an anode, hole transporting layer, organic light emitting layer, and cathode are formed.
    Type: Grant
    Filed: October 16, 2001
    Date of Patent: September 23, 2003
    Assignee: NEC Corporation
    Inventor: Taizou Tanaka
  • Patent number: 6623668
    Abstract: The present invention provides a method of forming micro lenses over a base structure of a solid state image pick-up device. The method comprises the steps of: forming a light-transmitting material layer on the base structure; and pushing a die having a die pattern against the light-transmitting material layer to transfer the die pattern of the die to the light-transmitting material layer, thereby forming micro lens patterns over the base structure.
    Type: Grant
    Filed: May 9, 2000
    Date of Patent: September 23, 2003
    Assignee: NEC Electronics Corporation
    Inventors: Ichiro Murakami, Yasutaka Nakashiba
  • Patent number: 6621317
    Abstract: A clock control circuit comprises a control circuit 102 for outputting a control signal for adding or subtracting a phase to a reference clock, which is an input clock or a clock generated from the input clock, on each clock period of the reference clock, and a phase adjustment circuit 101 fed with the input clock and outputting an output clock having the phase adjusted to the reference clock.
    Type: Grant
    Filed: September 9, 2002
    Date of Patent: September 16, 2003
    Assignee: NEC Electronics Corporation
    Inventor: Takanori Saeki
  • Patent number: 6621621
    Abstract: A line amplification system connected on the fiber between two flexibility sites of a wavelength switched network is built with a number of modules that can be arranged in a line amplifier, preamplifier and postamplifier configurations. The line and preamplifiers include a Raman module and a two-stage EDFA module provided with mid-stage access. A dynamic gain equalizer is connected in the mid-stage in the line amplification configurations. As well, dispersion compensating module may be connected in the mid-stage whenever/if needed. A line monitoring and control system operates the line amplification system so that all channels traveling along a link have substantially the same power, in the context of channels being added and removed to/from the line arbitrarily.
    Type: Grant
    Filed: October 11, 2001
    Date of Patent: September 16, 2003
    Assignee: Innovance, Inc.
    Inventors: Kevan Peter Jones, Mark Stephen Wight, Alan Glen Solheim, Paul Edward Beer
  • Patent number: 6621551
    Abstract: A liquid crystal display panel is placed on a fixed base and an anisotropic film is set in a position relative to the orientation layer of the display panel. Linearly polarized light is directed to the panel and the anisotropic film and light passing through them are detected. According to the intensity of the detected light, the angle of orientation of the anisotropic film is adjusted relative to the orientation layer. Angular misalignment, which may exist between the anisotropic film and the orientation layer, is minimized.
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: September 16, 2003
    Assignee: NEC LCD Technologies, Ltd.
    Inventor: Tadashi Matsuzawa
  • Patent number: 6618639
    Abstract: A system, method, apparatus and program which enables the automation of the carrying of a lot or lots of special purpose wafers between stockers and to achieve high speed processing while suppressing an increase in storage volume. The carrying control system includes stockers for storing therein special purpose lot or lots comprising wafers which will not be processed in production facilities, or said special purpose lot or lots and usual lot or lots comprising wafers which will be processed by production facilities and a carrying host computer for controlling automatic carrying of lot or lots in carrying facilities.
    Type: Grant
    Filed: February 13, 2003
    Date of Patent: September 9, 2003
    Assignee: NEC Electronics Corporation
    Inventor: Hiroshi Nakashima
  • Patent number: 6617842
    Abstract: A method and apparatus for generating a test pattern enabling the detection of malfunctions produced when a semiconductor device is loaded on actual equipment prior to marketing. Using a logical analyzer, signal waveform data collected during the period of signal malfunction is acquired. This signal waveform data is converted by a test pattern generating device into a test pattern for automatic testing equipment. This test pattern is used to change data at the time of malfunction into normal data to generate a pattern of expected values for an output signal of the semiconductor device. Then, it is determined whether the input signal setting required for an output signal of the semiconductor device is present in the signal waveform data. If not, a test pattern for setting the input signal is generated. If the malfunction is reproduced in the testing equipment, the test pattern is used as a mass production test.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: September 9, 2003
    Assignees: NEC Corporation, NEC Electronics Corporation
    Inventors: Katsumi Nishikawa, Kazuo Shibata
  • Patent number: 6618300
    Abstract: In a semiconductor memory device, a plurality of banks is arranged on a semiconductor substrate. A plurality of memory array groups is arranged on the plates. Redundant memory cell array groups replace a memory cell array, including a defective memory cell, and are arranged at every plate. Subword selection circuits switch subword selection lines at every plate. Each of the subword selection circuits has a selection unit which selects a subword selection line on the plate belonging thereto and a redundant subword selection line of the redundant memory cell array arranged on the other adjacent plate.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: September 9, 2003
    Assignees: NEC Corporation, NEC Electronics Corporation
    Inventor: Hiroyuki Yamakoshi
  • Patent number: 6618204
    Abstract: A light modulator is comprised of two unit devices each using surface plasmon generated at the interface between thin metal films respectively formed on prisms and an electro-optical material, and a mirror. Both of the transmitted light due to absorption and re-radiation, and the reflected light arising from the unit devices are made into the outgoing light, the incident light on the next unit device, or the incident light on the mirror. Consequently, all light beams can be utilized as the final outgoing light beams with no loss of light. Further, the color of light can be spatially divided, and still further, it can also be temporally divided by changing the wavelength due to a voltage. As a result, the original light can be divided both temporally and spatially with almost no loss by combining two unit devices so configured as to re-radiate the absorbed light by surface plasmon using surface plasmon and a mirror, and thus utilizing both of the reflected light and the transmitted light.
    Type: Grant
    Filed: September 25, 2002
    Date of Patent: September 9, 2003
    Assignee: NEC Corporation
    Inventor: Ken-ichi Takatori
  • Patent number: 6616395
    Abstract: Springing for support wheels of low lifting trucks arranged below the forks includes a common spring device arranged in the transfer mechanism of the lifting movement to the support wheels. The spring device includes a cylinder, a piston, a spring package of cup springs and an extending push rod that in the cylinder is connected a ring shaped element located between the spring package and the cylinder end through which the push rod extends. The piston is arranged in the other end of the spring package and the cylinder is via a return valve coupled in parallel with the load lifting hydraulic system of the truck so that the pressure in this pretensions the ring shaped element towards the cylinder end proportionally to the load, so that springing does not take place until the dynamics forces overcome the pretension.
    Type: Grant
    Filed: September 19, 2001
    Date of Patent: September 9, 2003
    Inventor: Anders Fransson
  • Patent number: 6618027
    Abstract: A light modulator is comprised of two unit devices each using surface plasmon generated at the interface between thin metal films respectively formed on prisms and an electro-optical material, and a mirror. Both of the transmitted light due to absorption and re-radiation, and the reflected light arising from the unit devices are made into the outgoing light, the incident light on the next unit device, or the incident light on the mirror. Consequently, all light beams can be utilized as the final outgoing light beams with no loss of light. Further, the color of light can be spatially divided, and still further, it can also be temporally divided by changing the wavelength due to a voltage. As a result, the original light can be divided both temporally and spatially with almost no loss by combining two unit devices so configured as to re-radiate the absorbed light by surface plasmon using surface plasmon and a mirror, and thus utilizing both of the reflected light and the transmitted light.
    Type: Grant
    Filed: September 25, 2002
    Date of Patent: September 9, 2003
    Assignee: NEC Corporation
    Inventor: Ken-ichi Takatori
  • Patent number: 6612261
    Abstract: A structure for training and exercising canines is disclosed having a first and a second inclined surface joined at a hingeable joint. The first surface has generally parallel sides and the second surface has a first region having generally parallel sides and a transition region. The transition region having a first dimension corresponding to the dimension of the first surface and a second dimension corresponding to the dimension of the first region.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: September 2, 2003
    Inventors: James P. Mazrolle, Toby R. Mazrolle
  • Patent number: 6614050
    Abstract: A semiconductor manufacturing apparatus, which performs predetermined processing for a group of wafers supplied by a preprocessor that performs preliminary processing, comprises a data storage unit for storing wafer processing history data received from the pre-processor, a target value storage unit for storing a processing target value for the semiconductor manufacturing apparatus, an identification unit for identifying a wafer supplied by the pre-processor, a processor for employing the wafer processing history data and the processing target value to determine processing conditions for the wafer identified by the identification unit, a conveying unit for transporting the wafer from the identification unit to a wafer processor, a controller for controlling the wafer processor in accordance with the wafer processing conditions instructed by the processor, and a determination unit for examining the condition of the wafer that has been processed by the wafer processor to determine whether the wafer is good or b
    Type: Grant
    Filed: October 25, 2000
    Date of Patent: September 2, 2003
    Assignee: Fab Solutions, Inc.
    Inventors: Keizo Yamada, Tohoru Tsujide
  • Patent number: 6614319
    Abstract: Disclosed is a PLL circuit that makes fractional frequency division possible without causing spurious components to be produced in the output of a VCO. The PLL circuit comprises a frequency dividing circuit for frequency-dividing the output of a VCO; a phase adjusting circuit, to which are input two clocks of different phases obtained by frequency division performed by the frequency dividing circuit, for producing an output signal having a delay time defined by a time that is the result of internally dividing a timing difference between the two clocks; a charge pump for generating a voltage conforming to a phase difference output from the phase comparator circuit; and a loop filter for smoothing the voltage conforming to the phase difference and applying the voltage to the VCO, wherein the dividing value of the timing difference in the phase adjusting circuit is represented by MF/MD, and an accumulation operation is performed in units of MF every frequency-divided clock.
    Type: Grant
    Filed: January 23, 2003
    Date of Patent: September 2, 2003
    Assignee: NEC Electronics Corporation
    Inventors: Takanori Saeki, Toshiyuki Tanaka
  • Patent number: 6614412
    Abstract: To provide a plasma display panel which improves the write characteristics, luminous luminance, and luminous efficiency and which has a longer life. On a back glass substrate, data electrodes are formed in the substrate column direction. Over the data electrodes, a dielectric layer is formed. On the dielectric layer, scan electrodes are formed in a substrate row direction. Over the scan electrodes, a dielectric layer is formed. On the dielectric layer, partitions are formed in the substrate column direction. On the dielectric layer including the partitions, a protection layer and a fluorescent material layer are formed. On the other hand, on a front glass substrate, common electrodes and bus electrodes electrically connected to the common electrodes are formed in the substrate row direction so as to be opposed to the scan electrodes. Over the common electrodes and the bus electrodes, a dielectric layer and a protection layer are formed.
    Type: Grant
    Filed: August 29, 2000
    Date of Patent: September 2, 2003
    Assignee: NEC Corporation
    Inventors: Naoto Hirano, Keiji Nunomura
  • Patent number: D480381
    Type: Grant
    Filed: September 5, 2002
    Date of Patent: October 7, 2003
    Assignee: Brookstone Company, Inc.
    Inventors: David Harris, Rudy Woodard, Steve Schwartz, Tim Trzepacz