Patents Represented by Attorney Hayes Soloway P.C.
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Patent number: 6734494Abstract: A vertical field effect transistor includes an N.sup.+semiconductor substrate and an N.sup.−epitaxial layer deposited thereon and having lower dopant concentration than the semiconductor substrate, and is configured to have a plurality of unit cell transistors formed in the N.sup.−epitaxial layer and arranged in the epitaxial layer in longitudinal and lateral directions. The unit cell transistor includes a trench formed to have a depth X.sub.a and a width W, and further a gate electrode 25 formed within the trench and interposing a gate insulating film that has a thickness T.sub.OX and formed between the gate electrode and the surface of the trench. Moreover, the unit cell transistor includes a P-type base region having a depth X.sub.b, a source region, a heavily doped P-type base region formed in a central portion of the cell transistor and having a depth X.sub.Type: GrantFiled: May 27, 2003Date of Patent: May 11, 2004Assignee: NEC Electronics CorporationInventor: Kinya Ohtani
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Patent number: 6734357Abstract: A modular-construction control casing for the integration of plug-in connectors and additional electronic equipment within an electronic casing which is located, in a decentralized manner, close to the consumer's installation. The rectangular parallelepiped-shaped casing is formed from two identical half-shells, at least one mounting plate or printed-circuit board being mountable within the casing. Provided at the narrow sides of the casing are openings which can receive either a plate part for the closure of the casing and/or for the mounting of control elements, or into which there can be inserted, with a form-fit, an adapter which is provided for receiving already known plug-in connectors.Type: GrantFiled: December 2, 2002Date of Patent: May 11, 2004Assignee: Harting Electric GmbH & Co. KGInventors: Nicole Kruke, Martin Schmidt, Hartmut Schwettmann, Uwe Sundermeier
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Patent number: 6730955Abstract: In a semiconductor memory, a barrier layer formed of a first metal film, a metal nitride film and a second metal film laminated in the named order is formed under a lower electrode of a ferroelectric capacitor in a memory cell, in order to minimize a pealing and lifting of the lower electrode from an underlying plug in the process of forming a ferroelectric material film as a capacitor dielectric film and in its succeeding annealing process. The metal nitride film is formed of a nitride of a metal constituting the first or second metal film.Type: GrantFiled: March 18, 2002Date of Patent: May 4, 2004Assignee: NEC Electronics CorporationInventors: Sota Shinohara, Koichi Takemura, Yasuhiro Tsujita, Hidemitsu Mori
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Patent number: 6731309Abstract: Computer software applications presently allow the User to preview the impact of some commands on active documents via a small preview window. However, such preview windows are not representative of how the command will impact the entire document. The invention provides a method and system of efficiently and effectively previewing the impact of User commands on the entire document by executing User commands as they are identified. Leaving the menu open, the User is able to identify successive commands until the desired result is reached. Embodiments are described for execution of general commands, text editing commands, relocations of margins or guidelines, and relocations of graphic objects.Type: GrantFiled: August 28, 1998Date of Patent: May 4, 2004Assignee: Corel CorporationInventors: Kevin C. Unbedacht, Bruce G. Woodward, Eric D. Johnson
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Patent number: 6727445Abstract: A pressure switch comprises a first dielectric sheet having a first and second surface; and has two half circuits carried on the first surface of said first dielectric sheet. A second dielectric sheet overlies the first dielectric sheet. The second dielectric sheet has a plurality of switch closures carried thereon and facing the first dielectric sheet. The switch closures are normally spaced from the half circuits on the first dielectric sheet, and are deflectable into contact with the half circuits under an externally applied force.Type: GrantFiled: June 14, 2001Date of Patent: April 27, 2004Assignee: Secure Care Products, Inc.Inventors: Michael F. Cullinan, Anthony C. Greene, John M. McAuley
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Patent number: 6725800Abstract: An accumulating whistling vent for indicating a level of liquid in a tank having a vent line is disclosed. The whistling vent includes a whistle housing reservoir which has mounting tubes extending from either ends. A whisle is housed in the whistle housing reservoir by insertion into one of the mounting tubes. The whistling vent is coupled between the vent line of the tank such that the tube containing the whistle is closest to the tank. As liquid is introduced into the tank an audible signal is produced by the whistle. Once full, air flowing from the tank through the vent line is replaced by the incoming liquid, thus muting the whistle. Excess liquid is accumulated in the reservoir prior to discharge from the vent line, thereby providing additional time to respond to the change in audible signal. In a preferred embodiment of the invention, a transparent reservoir is used to provide a visual indicator in addition to the change in audible signal.Type: GrantFiled: February 27, 2003Date of Patent: April 27, 2004Assignee: Enviro Technology Products, Ltd.Inventor: Murray Hawkins
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Patent number: 6722894Abstract: A plug connector for establishing an electrical contact between first and second conducting track carriers, in particular between a flexible conductor foil and a circuit board, comprises a plug part that has a plug housing provided with a cam surface. The first conducting track carrier is shiftably mounted to the plug housing such that it can be shifted starting from an advanced initial position into a retracted contact position and parallel to a plug-in direction of the plug part. The plug connector further comprises a socket part that includes a socket housing, a pressure application spring and the second conducting track carrier which is received in the socket housing. The pressure application spring has two ends, one end of which forms a supported end received in the socket housing and the other end forms a pressing end that cooperates with the first conducting track carrier if the latter is in the contact position.Type: GrantFiled: November 5, 2002Date of Patent: April 20, 2004Assignee: Harting Electro-Optics GmbH & Co. KGInventor: Michael Burmeister
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Patent number: 6724253Abstract: In a predistortion type linearizer including a FET, an input matching circuit connected to the drain of the FET for receiving an input signal, an output matching circuit connected to the source of said the FET for outputting an output signal, and a inductor having a first terminal connected to the gate of the FET and a second terminal for receiving a first control voltage, a variable impedance circuit is connected to the second terminal of the inductor, and the impedance of the variable impedance circuit is adjusted by a second control voltage.Type: GrantFiled: June 4, 2002Date of Patent: April 20, 2004Assignee: NEC Compound Semiconductor Devices, Ltd.Inventors: Gary Hau, Naotaka Iwata
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Patent number: 6718621Abstract: In a production process of an MR head using the tunnel junction film basically consisting of a free layer, a barrier layer, and a pinned layer, the resistance between the free layer and the pined layer reduced beforehand and increased afterward up to a resistance value necessary when actually used. While the resistance between the free layer and the pinned layer is low, current can easily flow, suppressing charge up, thus preventing insulation destruction of the barrier layer. This significantly increases a production yield of a recording/reproduction head using a ferromagnetic tunnel junction element.Type: GrantFiled: May 9, 2000Date of Patent: April 13, 2004Assignee: NEC CorporationInventors: Kazuhiko Hayashi, Keishi Ohashi, Nobuyuki Ishiwata, Masafumi Nakada, Eizo Fukami, Kiyokazu Nagahara, Hiroaki Honjo, Shinsaku Saitoh
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Patent number: 6718820Abstract: The present invention relates to an apparatus for indentation test, for measuring mechanical properties in the field. The present invention provides an apparatus which is suitable for measuring mechanical properties without compensative experimental constant for the analysis of measured data. The present invention provides an apparatus which is safe for testing the materials by utilizing a sensor for controlling indenter movement.Type: GrantFiled: July 31, 2002Date of Patent: April 13, 2004Assignees: Frontics, Inc.Inventors: Dong-il Kwon, Yeol Choi, Yun-hee Lee
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Patent number: 6720200Abstract: Using a mask opening a gate region, an undoped GaAs layer is selectively etched with respect to an undoped Al0.2Ga0.8As layer by dry etching with introducing a mixture gas of a chloride gas containing only chlorine and a fluoride gas containing only fluorine (e.g. BCl3+SF6 or so forth). By about 100% over-etching is performed for the undoped GaAs layer, etching (side etching) propagates in transverse direction of the undoped GaAs layer. With using the mask, a gate electrode of WSi is formed. Thus, a gap in a width of about 20 nm is formed by etching in the transverse direction on the drain side of the gate electrode. By this, a hetero junction FET having reduced fluctuation of characteristics of an FET, such as a threshold value, lower a rising voltage and higher breakdown characteristics.Type: GrantFiled: May 22, 2001Date of Patent: April 13, 2004Assignee: NEC CorporationInventors: Keiko Yamaguchi, Naotaka Iwata
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Patent number: 6718531Abstract: A method of designing a layout of an integrated circuit is composed of providing a macro in which a macro circuit is to be accommodated in a top level hierarchical cell; and determining a layout of an interconnecting path provided on the top level hierarchical cell. The interconnecting path is used for transmitting a signal from a first position located outside the macro to a second position located outside the macro such that the interconnecting path passes through the macro. The interconnecting path includes first and second buffers placed substantially on a boundary of the macro, a first interconnection connecting the first position to an input of the first buffer, and a second interconnection connecting an output of the second buffer to the second position. An output of the first buffer is electrically connected to an input of the second buffer.Type: GrantFiled: May 1, 2002Date of Patent: April 6, 2004Assignee: NEC Electronics CorporationInventor: Yuuji Katayose
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Patent number: 6717192Abstract: A Schottky gate FET including a gate electrode having a gate extension, a drain electrode and a drain contact layer overlying a semi-insulating substrate, wherein the gate extension overlies at least part of the drain electrode and the drain contact layer. The vertical overlapping between the gate extension and the drain contact region prevents the current reduction to make the circuit module mounting the Schottky gate FET non-usable.Type: GrantFiled: January 6, 2003Date of Patent: April 6, 2004Assignee: NEC Compound Semiconductor Devices, Ltd.Inventor: Yosuke Miyoshi
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Patent number: 6716877Abstract: A method for treating a patient having congestive heart failure by administering a therapeutically effective amount of 3′,3,5-triiodothyropropionic acid (TRIPROP) or 3,5,3′,5′-tetraiodothyropropionic acid (TETRAPROP). Also described is a method to lower cholesterol blood levels of a patient by administering a therapeutically effective amounts of TRIPROP or TETRAPROP.Type: GrantFiled: February 18, 2003Date of Patent: April 6, 2004Assignee: The Arizona Board of Regents on behalf of the University of ArizonaInventor: Eugene Morkin
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Patent number: 6717557Abstract: An AC type plasma display is provided with first and second substrates disposed oppositely. Scan electrodes and sustainment electrodes are provided alternately at an opposite face side to the second substrate in the first substrate, the scanning and sustainment electrodes extending in a row direction. Data electrodes are provided at an opposite face side to the first substrate in the second substrate, the data electrodes extending in a column direction. Auxiliary electrodes are provided at all of spaces between the scan electrodes and the sustainment electrodes. The auxiliary electrodes extend in a row direction.Type: GrantFiled: February 7, 2001Date of Patent: April 6, 2004Assignee: NEC CorporationInventor: Mitsuhiro Ishizuka
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Patent number: 6716041Abstract: For connecting the cable shielding in screened electric cables in the case of a round plug connection, it is proposed that, for the purpose of making contact with the cable shield, a contact element is provided which is disposed between an insulating pressing/clamping part and an insulating body, an aperture through which the cable shield can be introduced being provided in the said contact element. Under these circumstances, the contact element is shaped in such a way that connection of the cable shield to a counterplug can take place by means of a contact part which is to be provided inside the plug connector housing, or by means of the electrically conductive outer cover of the plug connector, or via both methods.Type: GrantFiled: April 10, 2003Date of Patent: April 6, 2004Assignee: Harting Electric GmbH & Co. KGInventors: Albert Ferderer, Hartmut Schwettmann
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Patent number: 6713333Abstract: The disclosed invention provides a method for fabricating a MOSFET comprising the steps of forming a first insulation layer over a semiconductor substrate; forming a trench which bottoms on the semiconductor substrate in the first insulation layer so that the semiconductor substrate is exposed at the bottom of the trench; injecting impurities selectively under at least one end of the exposed surface of the semiconductor substrate; forming a second insulation layer to cover the bottom surface of the trench by oxidizing the exposed surface of the semiconductor substrate; forming a gate electrode over the second insulation layer inside the trench; removing the first insulation layer; forming a drain region under the surface of the semiconductor substrate so that the drain region contacts with one end of the second insulation layer, the end under which the impurities were injected; and forming a source region under the surface of the semiconductor substrate so that the source region contacts with the other end ofType: GrantFiled: October 23, 2002Date of Patent: March 30, 2004Assignee: NEC Electronics CorporationInventor: Satoru Mayuzumi
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Patent number: 6712640Abstract: For a connection between two multiple electrical conductors, a connecting arrangement is proposed which consists of a casing that can be disassembled in such a way that even a multiple electrical conductor that has already been laid, for example a round cable, can be connected to additional electrical conductors at any desired point. Under these circumstances, electrical contact with the individual electrical conductors of the multiple conductor that has been laid is made by means of insulation-cutting terminals disposed in the said casing in which an eccentric, which is likewise disposed therein in a rotatable manner, successively forces the electrical conductors, without great expenditure of force, into the insulation-cutting terminals disposed in the form of a circle around the eccentric, and brings them into electrical contact with the severing of the insulation.Type: GrantFiled: June 6, 2002Date of Patent: March 30, 2004Assignee: Harting Electric GmbH & Co. KGInventor: Albert Ferderer
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Patent number: 6711188Abstract: A wavelength stabilizing unit includes a wavelength filter 31 and an optical detector 4, which are mounted on a substrate 71, and housed in a casing 91. The optical detector 4 includes a first photoelectric conversion element 5, which directly receives an emitted light from an end portion (emitting point 58) of an optical fiber 14 guided into the casing 91 and converts it into an electric signal A, and a second photoelectric conversion element 6, which receives light passed through the wavelength filter 31 and converts it into an electric signal B. The electric signals A and B are supplied to an operation circuit 8. The wavelength filter 31 has side faces, which are machined such that they do not cross a straight line connecting the emitting point 58 and an edge of an incident surface 311 of the wavelength filter.Type: GrantFiled: December 12, 2001Date of Patent: March 23, 2004Assignee: NEC Compound Semiconductor Devices, Ltd.Inventors: Akihiro Ito, Junichi Shimizu
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Patent number: D488135Type: GrantFiled: May 21, 2002Date of Patent: April 6, 2004Assignee: Camden Electronics Ltd.Inventor: Andrew Hatter