Abstract: A layer of required material, such as polysilicon, is planarized by first forming a sacrificial layer of material, such as an oxide, on the layer of required material. The combined layers of required and sacrificial materials are then planarized using chemical-mechanical polishing until the sacrificial material has been substantially, completely removed.

Abstract: A communication system includes an interface that allows a media access controller (MAC) and an optical line termination transceiver module (TM), which have incompatible interfaces, to be connected together. The interface detects a phase relationship required by the TM, and feeds the information back to a processor and memory which places a value into the MAC to adjust the phase relationship.

Abstract: The sensitivity of a MEMS microphone is substantially increased by using a portion of the package that holds the MEMS microphone as the diaphragm or a part of the diaphragm. As a result, the diaphragm of the present invention is substantially larger, and thus more sensitive, than the diaphragm in a comparably-sized MEMS microphone die.

Abstract: The trench leakage current of a deep trench isolation structure is measured. The deep trench isolation structure, which is filled with polysilicon, contacts both a first region of a first conductivity type and a second region of a second conductivity type, and is proximate to a third region of the first conductivity type formed in the second region. Test voltages are applied to the structures and the leakage current is measured.

Abstract: An optical network terminal includes a sleep logic circuit that assumes responsibility for monitoring off-hook transitions after the AC main power supply has failed for a predetermined period of time. The sleep logic circuit is very low power and, as a result, allows the optical network terminal to remain active and provide lifeline support for a much greater period of time.

Abstract: The memory of the optical line terminal (OLT) of a broadband passive optical network (BPON) is increased to store, in addition to an active identity number, such as the serial number, of the current optical network terminal (ONT) connected to a network end point, a standby identity number, such as the serial number, of a replacement optical network terminal (ONT) when upgrades are requested by the end users, or partial or total failures are reported by the end users.

Abstract: A router stores a value that indicates the maximum number of channels that can be output to a group, and the number of channels that are output to the group. When a member of the group indicates a channel change selection from a first channel to a second channel, the router drops the first channel before outputting the second channel when the maximum number of channels and the number of channels are equal.

Abstract: A package-ready light-sensitive integrated circuit and process for preparing a light-sensitive semiconductor substrate for packaging that provide for a reduced exposure of a light-sensitive integrated circuit to light. The package-ready light-sensitive integrated circuit includes a semiconductor substrate (e.g., a silicon wafer) with an upper surface and a lower surface and lateral edges, an individual light-sensitive integrated circuit formed in and on the upper surface of the semiconductor substrate, and an opaque material layer covering the lower surface and lateral edges of the semiconductor substrate. The opaque material layer prevents light from entering the semiconductor substrate and interfering with operation of the light-sensitive integrated circuit. The process includes first providing at least one semiconductor substrate with a plurality of light-sensitive integrated circuits formed in and on its upper surface.

Abstract: The voltage at a node of an integrated circuit can be measured or controlled using a two-wire kelvin contact with spring-based probe pins by offsetting and tapering the lower end section of the spring-based probe pin. As a result, multiple spring-based probe pins can be connected to a single contact bump, such as a solder bump.

Abstract: A edge triggered flipflop tolerates arbitrarily slow clock edge rates by utilizing complex gates, with weighted transistors, to electrically isolate the master latch from the data inputs, before the master latch and the slave latch are electrically connected together, and to electrically isolate the master latch from the slave latch, before the master latch and the data inputs are electrically connected together.

Abstract: A vertical MOS transistor has a source region, a channel region, and a drain region that are vertically stacked, and a trench that extends from the top surface of the drain region through the drain region, the channel region, and partially into the source region. The vertical MOS transistor also has an insulation layer that lines the trench, and a conductive gate region that contacts the insulation layer to fill up the trench.

Abstract: Pseudo area values, which represent standard cell power dissipation, are substituted for physical standard cell areas in a standard cell library. As a result, when a logic synthesizer synthesizes a gate level netlist from hardware description language (HDL) code, the synthesized netlist will describe a logic block that has minimal power dissipation.

Abstract: A very, very low resistance micro-electromechanical system (MEMS) inductor, which provides resistance in the single-digit milliohm range, is formed by utilizing a single thick wide loop of metal formed around a magnetic core structure. The magnetic core structure, in turn, can utilize a laminated Ni—Fe structure that has an easy axis and a hard axis.

Abstract: The leakage current output by a MOS transistor is minimized by varying a back bias voltage across a range of voltages, and detecting the back bias voltage within the range that minimizes the leakage current output by the MOS transistor. The detected back bias voltage is then applied to the MOS transistor.

Abstract: A micro-electromechanical system (MEMS) inductor is formed in a saucer shape that completely surrounds a magnetic core structure which is formed from a ferromagnetic material. In addition, an array of MEMS inductors can be formed by dividing up the saucer-shaped MEMS inductor into a number of electrically-isolated MEMS inductor wedges.

Abstract: When a high-voltage, such as from an ESD pulse, is placed across a silicon controlled rectifier, which includes an NPN transistor and a PNP transistor that is connected to the NPN transistor, the likelihood of punch through occurring between two regions of the rectifier is substantially reduced by forming the emitter of one transistor adjacent to the tails of the sinker down region of the other transistor.

Abstract: The bus circuit of a master electronics card in a backplane-based communications system adaptively grants the upstream bus to the slave electronics cards by the early termination of a scheduled number of grants to a slave electronics card when the bus circuit on the master electronics card detects idle cells.

Abstract: A resistor, a transistor, and a capacitor can be fabricated on a semiconductor wafer in a process that forms an isolated single-crystal region with precise dimensions. The isolated single-crystal region, in turn, defines the body of the resistor, the gate of the transistor, and the top plate of the capacitor.

Abstract: A primary server and a backup server that both run a RADIUS client in a cold start configuration share a single IP address that includes a limited number of message identifiers (MIDs). The primary server and the backup server each have a small number of fixed message identifiers. In addition, a large number of shared message identifiers are used by the primary server, and then used by the backup server a predetermined time after the primary server fails.

Abstract: A cabinet which utilizes an air-to-air heat exchanger to remove heat generated from within the cabinet prevents water and dust from entering the air-to-air heat exchanger by forcing cooler external air up along a first side wall, through the air-to-air heat exchanger, and down along a second side wall.