Abstract: A low power tap multiplier multiplies a m-bit multiplier and a n-bit multiplicand to output a p-bit multiplication product. The p-bit product is one bit more than the n-bit multiplicand when the multiplicand is symmetric, and two bits more when the multiplicand is non-symmetric. Since the low power tap multiplier utilizes a minimal number of small unstacked transistors, it consumes less power and requires less silicon area.

Abstract: A semiconductor chip is ESD protected, in part, by utilizing floating lateral clamp diodes. Unlike conventional clamp diodes, which are based upon parasitic bipolar devices associated with large MOS transistors, the floating lateral clamp diodes utilize a well formed in the substrate as the cathode, and a plurality of regions of the opposite conductivity type which are formed in the well as the anode.

Abstract: A wafer is formed with metal traces that extend a distance across the wafer on opposite sides of a saw street. The resistances of the metal traces, which can each be formed from one or more layers of metal, are measured before the saw street is cut. During and after the saw street is cut, the resistances of the metal traces are again measured, even continuously. The pre-cut, during-cut, and post-cut resistances are compared to determine if the wafer has been cut without damage to the wafer due to misalignment or a worn cutting device.

Abstract: A bi-directional silicon controlled rectifier structure provides electrostatic discharge (ESD) protection against both positive and negative voltage spikes. The structure utilizes a pair of wells, n+ and p+ regions formed in both wells, a first ring formed around the junction between the first well and the semiconductor material, and a second ring formed around the junction between the second well and the semiconductor material.

Abstract: A pad that experiences a high-voltage, high dV/dT signal during normal operation is prevented from falsely triggering by utilizing a bipolar transistor connected to the pad to provide ESD protection, and a MOS transistor connected to the bipolar transistor to turn off the bipolar transistor during normal circuit operation.

Abstract: A vertical MOS transistor has a very short channel length that is indirectly defined by the thickness of a layer of semiconductor material or the depths of implants. The transistor has a first (source/drain) region formed in a substrate material, a semiconductor region formed on the first region, and a second (source/drain) region formed in the top surface of the semiconductor region. The distance between the first region and the second region defines the channel length of the transistor.

Abstract: A semiconductor integrated circuit with high Q inductors and capacitors is disclosed. A semiconductor electrical circuit is formed on a first die, while micro-electromechanical structures having inductance and capacitance are formed on a second die. The second die is attached and electrically connected to the first die as a flip chip.

Abstract: The thickness of a semiconductor wafer is non-destructively measured using infrared (IR) microscopy. The wafer is placed on a stage. A distance between the stage and a detector is then varied so that a first image of the wafer is focused on the detector. When focused, a first separation distance is measured. The distance between the stage and the detector is again varied so that a second image is focused on the detector. When again focused, a second separation distance is measured. The difference between the first and second separation distances is then determined and multiplied by the refractive index of light in silicon.

Abstract: A power transistor structure uses metal drain and source strips with non-uniform widths to reduce variations in current density across the power transistor structure. The reductions in current density, in turn, reduce the source-to-drain turn on resistance and maximize the overall current carrying capacity of power transistor structure.

Abstract: A conductive structure provides a conductive path from a first region in a semiconductor material to a second spaced apart region in the semiconductor material by forming one or more trenches between the first and second regions, and implanting a dopant into the bottom surfaces of the trenches to form a continuous conductive path.

Abstract: A metal-to-metal capacitor in a semiconductor integrated circuit is converted to a conductive structure by connecting the first metal plate of the capacitor to ground and the second metal plate of the capacitor to a programming voltage, thus causing the insulator material to breakdown and conduct current from the first plate to the second plate.

Abstract: When a high-voltage, such as from an ESD pulse, is placed across a silicon controlled rectifier, which includes an NPN transistor and a PNP transistor that is connected to the NPN transistor, the likelihood of punch through occurring between two regions of the rectifier is substantially reduced by forming the emitter of one transistor adjacent to the tails of the sinker down region of the other transistor.

Abstract: An image sensor has a core structure with a convex surface, such as a sphere or a tube. The image sensor also has an interconnect layer that is adhered to the convex surface of the core structure, and a photo-sensing layer that is connected to the interconnect layer. The photo-sensing layer collects photo-information, while the interconnect layer provides an electrical interface between the photo-sensing layer and the outside world.

Abstract: A package-ready light-sensitive integrated circuit and process for preparing a light-sensitive semiconductor substrate for packaging that provide for a reduced exposure of a light-sensitive integrated circuit to light. The package-ready light-sensitive integrated circuit includes a semiconductor substrate (e.g., a silicon wafer) with an upper surface and a lower surface and lateral edges, an individual light-sensitive integrated circuit formed in and on the upper surface of the semiconductor substrate, and an opaque material layer covering the lower surface and lateral edges of the semiconductor substrate. The opaque material layer prevents light from entering the semiconductor substrate and interfering with operation of the light-sensitive integrated circuit. The process includes first providing at least one semiconductor substrate with a plurality of light-sensitive integrated circuits formed in and on its upper surface.

Abstract: An all digital power supply system provides a supply voltage to semiconductor circuits. The power supply system utilizes an up/down counter and a pulse width modulator to output a signal into a LC network that generates the supply voltage. The width of the pulses output by the pulse width modulator are defined by an encoder that generates width information in response to a propagation delay detector that measures the propagation delay of a first clock signal when clocked by a second clock signal. The system supplies the optimum or minimum required voltage to insure that a critical path through a digital chip is met over process, voltage, and temperature (PVT) variations without the use of a band gap reference voltage source. A state machine is also used to counteract oscillations introduced by start up and load transients, thereby eliminating the need for a proportional integrator differentiator (PID).

Abstract: The RF impedance of a metal trace at gigahertz frequencies is reduced by forming the metal trace to have a base region and a number of fingers that extend away from the base region. When formed to have a number of loops, the metal trace forms an inductor with an increased Q.

Abstract: A split-gate FLASH memory cell is formed with a floating gate that has a tip in the middle of the floating gate. The method of the present invention forms the tip to have a substantially constant radius of curvature, tip angle, and distance to the overlying tunneling oxide. As a result, the tip of the present invention increases the localized enhancement of the electric field.

Abstract: A photon detector capable of detecting gigahertz frequency optical signals utilizes a layer of photonic material that is formed below of the coil of an inductor. When a pulsed light source is applied to the layer of photonic material, the photonic material generates eddy currents that alter the magnetic flux of the inductor. The signals can then be detected by detecting the change in magnetic flux of the inductor.

Abstract: The radio frequency (RF) impedance of a metal trace at gigahertz frequencies is reduced by forming the metal trace to have a base region and a number of fins that extend away from the base region. When formed in a spiral configuration having a number of loops, the metal trace forms an inductor with an increased quality factor (Q).

Abstract: A color imager, which has a plurality of photodiodes, utilizes a layer of metal that is formed over the photodiodes. The metal layer has a plurality of different sized openings that lie vertically over the photodiodes to physically diffract, and thereby filter, the incident light that strikes the color imager.