Abstract: Broadly speaking, the present invention fills these needs by providing a lead frame package including a substrate stack having opposed sides, one of which includes a plurality of signal traces, with the remaining side including a ground plane. An integrated circuit is mounted to the substrate stack. The integrated circuit includes a plurality of bond pads. A plurality of leads is in electrical communication with a subset of the plurality of signal traces. A plurality of electrically conductive elements placing a sub-group of the plurality of bond pads in electrical communication with a sub-part of the plurality of electrically leads by being bonded signal traces of the subset, spaced-apart from the plurality of leads.

Abstract: A semiconductor device is disclosed as having a substrate portion that includes a plurality of diffusion regions that include at least one p-type diffusion region and at least one n-type diffusion region. A gate electrode level region is formed above the substrate portion to include a number of conductive features defined to extend in only a first parallel direction. Each of the conductive features within the gate electrode level region is fabricated from a respective originating rectangular-shaped layout feature. Within a five wavelength photolithographic interaction radius within the gate electrode level region, a width size of the conductive features is less than 193 nanometers, which is the wavelength of light used in a photolithography process to fabricate the conductive features. The conductive features within the gate electrode level region form an equal number of PMOS and NMOS transistor devices.

Abstract: If a memory card MC is inserted in a slot 34, a control circuit 30 of a color printer 20 acquires image output control information GI from the memory card MC and analyzes this information. A CPU 31 modifies a brightness standard value Bstd corresponding to a brightness parameter by taking account of a preset exposure bias value when an exposure bias value other than zero is set. The CPU 31 determines the brightness correction level Brev by correcting the brightness representative value Brep so as to bring it closer to the brightness standard value Bstd that has been modified, and adjusts the image quality of image data by taking account of the brightness correction level Brev. As a result, the image quality of image data can be automatically adjusted without degrading output conditions that have been set arbitrarily.

Abstract: A restricted layout region in a layout of a semiconductor device is disclosed to include a diffusion level layout including a plurality of diffusion region layout shapes. The plurality of diffusion region layout shapes are defined in a non-symmetrical manner relative to a centerline defined to bisect the diffusion level layout. A gate electrode level layout is defined to include a number of linear-shaped layout features placed to extend in only a first parallel direction. Each of the number of the linear-shaped layout features within the gate electrode level layout of the restricted layout region is rectangular-shaped. The gate electrode level layout includes linear-shaped layout features defined along at least four different lines of extent in the first parallel direction. Each of a number of interconnect level layouts is defined to pattern conductive features within corresponding interconnect levels above the gate electrode level.

Abstract: A CPU determines whether or not a picked up image that corresponds to image data is a backlit portrait image by analyzing the image data on a pixel-by-pixel basis, and if the picked up image that corresponds to the image data is determined to be a backlit portrait image, then executes a brightness correction for backlit portrait image. The CPU obtains a tone curve that may have an output value of a predetermined value FV as an output value in response to an input value of a flesh-colored pixel average luminance value PV ave, which is an average luminance value of flesh-colored pixels of all pixels that constitute the image data. The CPU applies the tone curve to the luminance of every pixel in the image data and thereby executes the brightness correction.

Abstract: When an acquired image file GF includes image processing control information GI, a CPU executes image quality adjustment of image data GD in an image processing mode GM specified by the image processing control information GI. When the acquired image file GF does not include the image processing control information GI, on the other hand, the CPU retrieves Exif information and in the case of successful retrieval of the Exif information, selects the image processing mode GM based on the Exif information and executes image quality adjustment of the image data GD in the selected image processing mode GM. In the case where a selected shooting mode is described in the Exif information, the selected shooting mode is used for the selection of the image processing mode GM. In the case where no selected shooting mode is described in the Exif information, on the other hand, another shooting condition is used for the selection of the image processing mode GM.

Abstract: Techniques and an apparatus for producing pulse width modulation (PWM) edges are described. A PWM controller circuit with a polyphase counter is described. The polyphase counter may comprise a plurality of counters. Each of the counters may be set to a specific initial count value. A polyphase decoder block with a plurality of sets of high/low decoders are coupled to outputs from the polyphase counter. A set/reset block with a plurality of set/reset logic elements is coupled to outputs from the polyphase decoder block. A serializer is coupled to outputs from the plurality of set/reset blocks to generate PWM edges. Multiple parallel phases of a PWM pulse may be created with the circuit. Using a polyphase counter and comparator to create multiple parallel phases may speed up the controller circuit and provide a finer tuning resolution.

Abstract: In an image output control system of the invention, an image processing device makes image data subjected to a preset series of image processing and supplies the processed image data to an image output device, which then outputs a resulting processed image. The image processing device determines the number of dots to be created in each pixel group, which has a preset number of multiple pixels included in an image, and outputs the determined number of dots as dot number data to the image output device. The image output device stores multiple options for a priority order of individual pixels included in each pixel group for dot formation. In response to reception of the dot number data, the image output device selects one among the multiple options for the priority order, determines the positions of dot-on pixels in the pixel group, and actually creates dots at the determined positions of the dot-on pixels to output a resulting image.

Abstract: A CPU 200 compares a luminance distribution characteristic of image data with a reference luminance distribution characteristic, and then confirms that the image data GD is a backlit portrait image data if similarity degree Sv between the luminance distribution characteristic of image data and the reference luminance distribution characteristic is larger than reference similarity degree Svref. The CPU 200 determines whether an outer dark portion ratio Do is larger than a reference dark portion ratio Doref. If the CPU 200 determines that the outer dark portion ratio Do is larger than the reference dark portion ratio Doref, then it determines whether an outer bright portion ratio Bo is larger than a reference bright portion ratio Boref. If the CPU 200 determines that the outer bright portion ratio Bo is larger than a reference bright portion ratio Boref, then it determines that the image data GD is image data of backlit portrait image.

Abstract: A technology for making determinations as to whether the image of an image data file is blurred, with low processing load, is provided. First, photographic image data PID containing pixel color information, as well as thumbnail image data for the photographic image data, are prepared. A specific pixel is then selected from among the pixels of the thumbnail image data. Specifically, on the basis of data of a pixel under examination and data of a pixel neighboring the pixel under examination, it is determined whether the pixel under examination should be designated as the specific pixel. Then, for a specific region Ape which is a region constituting part of the photographic image data PID and which corresponds to the specific pixel of the thumbnail image data, analysis of the photographic image PID is carried out, and a localized blur level that represents indistinctness of the image in the specific region Ape is calculated.

Abstract: Computer implemented methods for defining a navigation control, located inside of a shell of a word page are provided. The navigation control includes a plurality of dynamic controls defined as part of the navigation control. An associated dynamic control of the plurality of dynamic controls is associated with a tool and is configured to allow display of a user interface of the tool in an overlying window, without leaving the word page. The shell of the word page that includes a plurality of page modules is dynamically generated through a user action related to a word, and the plurality of page modules include content that is contextually related to the word. The overlying window is configured to be defined over one or more of the plurality of page modules. Further, the plurality of page modules are contextually related to the word when content of every page module in the plurality of page modules has some descriptive interrelated dependence to or from the word.

Abstract: Embodiments of the present invention relate to an apparatus, method and computer readable medium for recovering from a failed or aborted outgoing data transfer operation from a host device to a peripheral storage device. In some embodiments, before the peripheral storage device is corrupted by the failed outgoing data transfer operation, one or more recovery data objects are stored on the host-side. After the peripheral storage device is corrupted by the failed data transfer, the host device responds to a subsequent coupling with the peripheral storage device by repairing the corrupted peripheral storage device using one or more of the host-side stored recovery data objects. Optionally, the host device also restores the outgoing aborted or failed data transfer operation.

Abstract: Intelligent prediction of critical sections is implemented using a method comprising updating a critical section estimator based on historical analysis of atomic/store instruction pairs during runtime and performing lock elision when the critical section estimator indicates that the atomic/store instruction pairs define a critical section.

Abstract: A method and system for Multicast Broadcast Service (MBS) over Mobile Multi-hop Relay (MMR) network using dynamic modification of Modulation and Coding Scheme (MCS) level are provided. The method comprises deciding MCS level for transmission between base station (BS) and relay station (RS), deciding MCS level for transmission between the BS and RS, and transmitting an MCS control message to the RS informing of the MCS level for transmission between the RS and the MS comprises calculating spectrum efficiency of the MS (ME), and selecting MCS level corresponding to the ME as optimum MCS level for the transmission between the RS and the MS.

Abstract: An injector provides optical access into a process chamber along an axial path from a diagnostic end point outside the process chamber through an optical access window. A hollow housing body receives first and second process gases, and surrounds the axial path. A sleeve in the body is urged against the body to minimize particle generation, and defines a first gas bore injecting the first process gas into the process chamber. A second gas bore of the sleeve surrounds the axial path for injecting the second process gas into the process chamber, allowing an optical signal to have a desired signal-to-noise ratio (SNR) at the end point. Methods provide a septum in the second bore dividing the second bore into apertures configured to reduce etching of and deposition on the optical access window and to maintain the desired SNR at the diagnostic end point.

Abstract: An image processing method involves processing image data indicative of an image represented with a prescribed number of input tones by each of pixel groups composed of a plurality of print pixels, and generating dot data representing a status of dot formation on each of the print pixels to be formed on a print medium. The method includes preparing a first conversion table and a second conversion table, determining the pixel group tone value in response to the input tone value corresponding to the pixel group, converting the determined pixel group tone value into the code values for each of the pixel groups, by referring to the first conversion table, decoding the acquired code value into the output dot arrangement for each of the pixel groups, by referring to the second conversion table, and outputting the dot data in response to the output dot arrangement.

Abstract: Method, computer program and system to perform timing analysis of designs containing clock networks by eliminating Common Clock Path Pessimism. The method includes transforming a clock network into a clock tree that includes nodes with different clock signal arrival times and leaf nodes representing source and destination registers. The tree is populated with information regarding the source and destination registers and the associated timing for the clock arrival signal. The method then enumerates Common Clock Path Pessimism (CCPP) groups, where any source register and any destination register in a CCPP group have the same nearest common ancestor node in the clock tree. The creation of CCPP groups enables analysis time reduction because only one timing calculation is required for the CCPP group instead of having to perform the analysis for each possible pair of registers. The method eliminates CCPP for each CCPP group and then displays the results.

Abstract: A restricted layout region includes a diffusion level layout including p-type and n-type diffusion region layout shapes separated by a central inactive region. The diffusion region layout shapes are defined in a non-symmetrical manner relative to a centerline defined to bisect the diffusion level layout. A gate electrode level layout is defined to include linear-shaped layout features placed to extend in only a first parallel direction. Adjacent linear-shaped layout features that share a common line of extent in the first parallel direction are separated by an end-to-end spacing that is substantially equal across the gate electrode level layout and that is minimized to an extent allowed by a semiconductor device manufacturing capability. The gate electrode level layout includes linear-shaped layout features defined along at least four different lines of extent in the first parallel direction. The restricted layout region corresponds to an entire gate electrode level of a cell layout.

Abstract: Provided is a method and system to transmit data to a configurable integrated circuit that features delaying a capture edge of a clock signal at a data latch to synchronize the receipt of data at the data latch that was transmitted in response to a storage device receiving a launch edge of the clock signal. The method includes transmitting the clock signal having the launch edge and the capture edge to the storage device. The data is launched from the storage device to the integrated circuit in response to the storage device sensing the launch edge. Receipt of the capture edge at the data latch is delayed for a predetermined time to compensate for a delay between transmitting the launch edge and launching the data to ensure the data is latched by the data latch. Also disclosed is a system that carries out the function of the method.

Abstract: An erase count of a flash memory block which is lost, e.g., due to power failure is updated or replaced by using known erase counts of other blocks of the flash memory. A flash management algorithm assigns a new erase count value instead of the lost one based on either a maximum value, an average value or a value combining the maximum value of the known erase counts and some tolerance value. The known values may be obtained from wear leveling data or from a stored erase history.