Abstract: There is provided a method of fabricating a semiconductor device, including the steps of (a) forming recesses at a surface of an underlying insulating film, (b) covering inner surfaces of the recesses and a surface of the underlying insulating film with a barrier film, (c) depositing a copper film over the barrier film to thereby fill the recesses with copper, and (d) applying chemical mechanical polishing (CMP) to the copper film through the use of inorganic slurry on the condition that a polishing load is equal to or smaller than 140 g/cm.sup.2 and a linear velocity at a center of a wafer is equal to or smaller than 0.1 m/s. Though a copper film tends to be peeled off after CMP has been applied thereto in a conventional method, the method ensures that a copper film is no longer peeled off even after CMP has been applied thereto.

Abstract: A fast way for determining the best subset test for a nominal attribute in a decision tree. When a nominal attribute has n distinct values, the prior art requires computing the impurity functions on each of the 2.sup.n-1 -1 possible subset partitioning of the n values and finding the minimum case among them. This invention guarantees the minimum impurity test on the attribute by computing only (n-1) impurity function computations. This reduction of computational complexity makes it practically possible to find the true best tests for many real data mining application, where a binary decision tree is used as the classification model.

Abstract: In fabrication of a semiconductor memory device and especially a DRAM (dynamic random access memory) having an HSG-type stacked-capacitor structure, after a storage-node-forming silicon film has been surface-treated with an HSG preprocess using dilute fluoric acid, the storage-node-forming film on the sidewall surface of a storage-node-forming contact pattern at an accessory or alignment region is prevented from floating in the air and hence being peeled off, which would have lowered the yield. For this purpose, the storage-node-forming silicon film covers the sidewall surface of the contact pattern at the alignment region.

Abstract: A cellular mobile communication network in a code division multiple access system includes plural mobile stations and at least one base station, and the at least one base station periodically supplies a transmission power control instruction representative of decrease or increase of the transmission power of a transmit signal from each mobile station to the at least one base station; when the base station receives the transmit signal from a mobile station, the base station measures the electric power to see whether or not the mobile station is faithful to the transmission power control instruction; if the mobile station repeats the disobedience, the mobile station is diagnosed to be a failure station serving as a serious interference power source.

Abstract: A ball grid array type semiconductor device comprises a bare chip, metal-filled through hole portions connected to internal electrodes of the bare chip, inner leads and a flexible tape carrier having external electrodes. The internal electrode of the bare chip has a length in a direction perpendicular to a side of the chip, which is three times or more the pitch of adjacent internal electrodes. The through hole portions are connected respectively to the internal electrodes so that the through hole portions are arranged in three or more rows. The inner lead led from the through hole portion in the intermediate row is spaced apart from an adjacent through hole portion so as not to interfere with it.

Abstract: In a charge transfer device of the two-layer electrode, two-phase drive type, an N.sup.-- semiconductor region 108 and a first insulator film 103 are formed on a P-type semiconductor substrate 101 in the named order. Then, first transfer electrodes 104A are formed on the first insulator film 103, and a second insulator film 105 is formed on the surface of the N.sup.-- semiconductor region 108 and a third insulator film 105 is formed on a top surface and a side surface of each first transfer electrode 104A. Phosphorus is ion-implanted with an incident angle of 0 degree, so that an N-type semiconductor region 102A is formed in N.sup.-- semiconductor region 108 between the first transfer electrodes 104A in self-alignment. Second transfer electrodes 109A are formed, and an interlayer insulator 110 is formed on the whole, and metal interconnections 111-1A and 111-2A are formed.

Abstract: A manual printing device for printing on a recording medium when scanned over the recording medium in a print direction, the manual printing device comprising: an ink tank filled with ink; a recording unit in formed with an ink ejection aperture in fluid connection with the ink tank, the recording unit ejecting ink supplied from the ink tank through the ink ejection aperture onto the recording medium; and a recovery unit for applying pressure to the ink in the ink tank to eject ink from the ink ejection aperture.

Abstract: A structure and method for forming a metal oxide semiconductor field effect transistor structure comprises, a substrate having a gate-channel region and source and drain regions adjacent the gate-channel region, a gate insulator over the substrate, a central gate conductor positioned above the gate-channel region and over the gate insulator and outer gate conductors over the gate insulator and adjacent the central gate conductor, wherein the gate insulator has a first thickness under the central gate conductor and a second thickness greater than the first thickness under the outer gate conductors. The center and outer gate conductors may consist of different material types (i.e., different work functions). The polarity of the source-drain doping is independent of the polarity of the central or outer gate conductors.

Abstract: The object of the present invention is to reduce the dispersion of the threshold after writing while maintaining the high speed nature of a write system in a nonvolatile semiconductor memory such as a flash memory of channel hot electron write type. The feature of this invention is to provide a memory with a write current detection type write circuit and a sense amplifier for read, and to switch, for verification at the time of write, between verification by the write current type write circuit and verification of normal read mode which uses the sense amplifier for read.

Abstract: A feedback apparatus includes a current amplifier for generating a binary error signal corresponding to a received feedback signal, a switched capacitor filter, coupled to the current amplifier, for averaging the binary error signal and providing a voltage reference corresponding thereto, and an output stage, coupled to the switched capacitor filter and to the current amplifier, for outputting a current corresponding to a magnitude of the voltage reference and for providing the feedback signal to the current amplifier.

Abstract: A graphics display unit is equipped with a frame buffer, an image drawing unit, and a display unit. This frame buffer is arranged by a normal data storage region for directly storing a display content as pixel data, and a compression data storage region for compressing the pixel data as compression data. The display unit is equipped with a flag buffer for storing information indicating as to whether the storage content of said compression data storage region is valid, or invalid, and a compressing unit, and an expanding unit. When the display content is read, while the control unit refers to the flag buffer, if the compression data of the compression region is valid, then the compression data is read from the compression data region and this read compression data is restored as the original data by the expanding unit so as to display the original image. If the compression data is invalid, then the normal data is read from the normal data storage region to be displayed.

Abstract: A protection circuit has a series combination of a p-channel enhancement type field effect transistor, a first node and a first resistor connected between a high voltage line and a low voltage line and a series combination of a second resistor, a second node and an n-channel enhancement type field effect transistor also connected between the high voltage line and the low voltage line, and the first node and the second node are respectively connected to the gate electrode of the n-channel enhancement type field effect transistor and the gate electrode of the p-channel enhancement type field effect transistor; when one of the field effect transistors is broken down between the source node and the drain node due to abnormal voltage applied between the high voltage line and the low voltage line, the associated resistor varies the potential level at the gate electrode of the other of the field effect transistors due to the break-down current passing therethrough, and causes the other of the field effect transistor

Abstract: The invention pertains to a micromechanical sensor for AFM/STM profilometry which consists of a beam with a point for interaction with a test surface to be sampled on one end and a fixing block on the other end. The point consists of a basically conical shank with a countersunk point at the end of the shank. The micromechanical sensor has excellent mechanical rigidity and is particularly suited to the measurement of extremely deep and narrow structures with positive side flank angles.

Abstract: A semiconductor synchronous pipeline dynamic random access memory device has a first read data amplifier and plural second read data amplifiers connected through a read/write data bus to the first read data amplifier, and read-out data bits are alternately supplied to the plural second read data amplifiers so that the read-out data bit is never destroyed by the next read-out data bit.

Abstract: A synchronous DRAM has a plurality of data pads formed into a data pad row, a plurality of data latch circuits for latching signals from each of the data pads, these data latch circuits being disposed in a region surrounded by a second straight line that is perpendicular to a first straight line that passes over the data pad row and that passes one end of the data pad row, and a third straight line that is parallel to the second straight line and that passes the other end of the data pad row.

Abstract: An electronic device assembly (and method for forming the same) including a first substrate having a first surface, a second surface, and a first pad on the first surface thereof; a second substrate having a first surface, a second surface, and a second pad on the second surface thereof, the first pad facing the second pad; a rigid spherical core interposed between the first and second pads; and solder connecting the first and second pads. The first substrate has a through-hole which is provided through the first substrate at a position of the first pad, at least a part of the solder is positioned in the through-hole and at least a part of the spherical core is received in the through-hole. The through-hole has an inner wall which is continuously tapered from the first surface of the first substrate to the second surface of the first substrate.

Abstract: A false-synchronization detection device comprises an up-down counter which counts down a predetermined amount of clocks when codes of phase changes at former and latter halves of a symbol interval are different, and counts up a different predetermined amount of clocks, which is less than the previous one, when codes of phase changes at former and latter halves of the symbol interval are the same. Thus, the false-synchronization detection device is capable of recognizing false-synchronization of symbol timing when the count value falls as far as the predetermined value.

Abstract: The present invention relates to a contact window structure having an insulation layer extending over an electrically conductive region. The insulation layer further has a plurality of contact windows which are filled with electrically conductive layers so that the electrically conductive layers are made into contact with the electrically conductive region so as to allow a contact portion of a probe to contact with at least one of the electrically conductive layers within the contact windows, wherein adjacent two of the contact windows are distanced from each other by a distance which is substantially equal to or narrower than a diameter of the contact portion of the probe, whereby the contact portion of the probe is necessarily made into contact with at least any one of the electrically conductive layers within the contact windows. There is no possibility that the contact portion of the probe is not made into contact with any electrically conductive layers.

Abstract: In a radio-paging receiver comprising a receiving arrangement (11, 12, 13) for successively receiving messages included in selective call signals as received messages, a received message storing area (202) for storing the received messages as stored messages, a character number information storing area (204) for storing the number of characters for each of the stored messages as a stored character number, an LCD (19) visually displays the stored character number for each of the stored messages with analog representation. The analog representation may be graphical representation, which is, for example, performed by using a bar graph.