Abstract: A light transmitting apparatus is constructed such that a transmission data signal Sa is transmitted to a light emitting element 21 via a driving circuit 23 and a modulation circuit 24 of a control circuit 22. Signal light outputted therefrom is transmitted to a light transmission path via an optical fiber 27, an optical circulator 25 and an optical fiber 25. Stokes light (backward scattered light) produced due to stimulated Brollouin scattering is inputted to a photo detector 26 via a port P3 from a port P2 of the optical circulator 25. A detection signal Sb assuming a level corresponding to this light intensity is outputted to a modulation circuit 24 of the control circuit 22. When the level of the detection signal from the photo detector 26 increases, modulation on a driving current to the light emitting element 21 is effected so that an emission spectral width of the light emitting element 21 is enlarged, thus enlarging the emission spectral width of the light emitting element 21.

Abstract: A method and receiver for correcting a received message includes a character converter for converting received data into a character string, and for converting the character string into characters, when a predetermined character in the character string is recognized by the character converter. A message corrector corrects a message formed by the characters when an error is included in the message.

Abstract: A conductor film is deposited on a semiconductor substrate via an insulation film, and jogs formed on the surface of the conductor film immediately after the deposition are removed by using the chemical mechanical polishing method, the etch back method, or the like. And on the surface of the conductor film thus flattened, a mask member is formed of an inorganic insulation film such as a SOG film or a silicon oxide film deposited by using the chemical vapor deposition method. By dry etching using this mask member as the etching mask, the above described conductor film is processed to have a pattern of a semiconductor wiring layer or a capacitor electrode. As a result, fine processing of the conductor film having a columnar crystal structure is facilitated. In addition, it becomes possible to improve the precision of the electrode shape of the capacitor and implement a highly reliable capacitor.

Abstract: A high operational speed clock extraction circuit, which can be manufactured to be compact at low cost. In order to reduce the operational speed of a phase comparator, phases are compared between a signal obtained by frequency-dividing an inputted non-return zero signal by m and a signal obtained by frequency-dividing an extracted clock signal outputted from a voltage control oscillator by n. In addition, in order to correctly compare phases between the frequency-divided signals, edge pulses used for phase comparison and produced based on the frequency-divided input signals are divided by an edge pulse selecting circuit according to cases, specifically between a case of performing phase comparison for the rising edge of a frequency-divided clock and a case of performing phase comparison for the falling edge of the same. Then, phase comparison is performed based on each of the edge pulses. The output of each phase comparison is passed through a low pass filter to control the voltage control oscillator.

Abstract: A paste for one of a via and an external feature, such as a pad, tab, or line, of a ceramic substrate, includes at least one of titania and zirconia, and a filler material mixed with the at least one of titania and zirconia. Further, the via structure or external feature such as an input/output pad, tab, or line, includes a metallic plating thereover. A method of forming the via structure or the external feature on the ceramic substrate, includes steps of either depositing the paste in the via of the ceramic substrate or depositing the paste on the ceramic substrate, and depositing, by a dry process metallic plating, a metallic plating on the paste. The paste includes at least one of titania and zirconia for reducing residual stress without effecting the platability of the metallic plating.

Abstract: A connector in which the deformation of lock portions is prevented, and the connector can have a compact design, and housings are prevented from being displaced with respect to each other in both longitudinal and transverse directions. Transverse grooves of a dovetail shape are formed respectively in widthwise opposite ends of an upper surface of a lower housing at a front end portion thereof, and longitudinal grooves of a dovetail shape are formed in a widthwise central portion of this upper surface. Transverse ribs of a dovetail shape are formed respectively at widthwise opposite ends of a lower surface of an upper housing at a front end portion thereof, and longitudinal grooves of a dovetail shape are formed on a widthwise central portion of this lower surface. The transverse ribs are greater in projecting height than the longitudinal ribs. When the ribs are press-fitted respectively into the associated grooves, the two housings are locked together.

Abstract: The present invention proposes a new type of single-transistor memory device, which stores information using the polarization of a ferroelectric material. The device is a floating-gate FET, with a ferroelectric material positioned between the gate and the floating gate, and a resistance, preferably in the form of a thin SiO.sub.2 dielectric between the floating gate and the transistor channel. Unlike previous designs, in this device the floating gate is both capacitively and resistively coupled to the transistor channel, which enables the device to be both read and written using low voltages. This device offers significant advantages for operation at low voltages and at high speeds, for repeated cycling of over 10.sup.10 times, since device durability is limited by the ferroelectric endurance rather than oxide breakdown, and for integration at gigabit densities.

Abstract: A semiconductor laser module of the present invention comprises a semiconductor laser, a pig tail optical fiber, a optical part, and a transition metal doped optical fiber. The optical part optically couples the semiconductor laser and the pig tail optical fiber to each other. The transition metal doped optical fiber is formed in a length corresponding to an attenuation amount with which desired distortion characteristics and desired noise characteristics are realized, and is connected to the side of the pig tail optical fiber opposite to the side which faces the semiconductor laser. The distortion characteristics of the semiconductor laser is improved by the action of the transition metal doped optical fiber. Consequently, the yield of semiconductor laser modules is improved.

Abstract: The scan electrodes are divided into a plurality of groups. These scan electrode groups are divided into those of a scan period and those of a non-scan period in a writing discharge period. A compensation pulse is applied, without application of a scan base pulse, to the electrodes in the non-scan period. Thus it makes possible to suppress electromigration between scan and sustaining electrodes while securing light intensity of emission as in the prior art by using the same techniques as therein.

Abstract: A method of testing a semiconductor circuit, the semiconductor circuit including word lines connected to a storage device, address receivers receiving addresses, an address decoder decoding the addresses and selecting ones of the word lines, a self-refresh unit refreshing the word lines during a non-test mode and a test mode device controlling the semiconductor circuit in a test mode, the method comprises supplying a test mode signal to the test mode device, activating a test mode operation of the self-refresh unit, sequentially activating the word lines using the self-refresh unit, maintaining the word lines in an active condition for a predetermined time period and deactivating the word lines.

Abstract: A phase locked loop circuit includes a reset signal generating circuit for generating a reference clock signal and a reset signal from an input clock signal. A phase locked loop section generates an output clock signal based on the reference clock signal such that a phase of the output clock signal is locked in that of the reference clock signal. Also, the phase locked loop section is reset in response to the reset signal such that the phase of the output clock signal is locked in an initial value.

Abstract: A light-receptive module according to the present invention includes a board, a light-receptive element disposed with a light input face thereof facing toward the surface of the board, and an optical fiber disposed in a slot formed on the surface of the board and coupled with the light-receptive element. The optical fiber has an end face formed obliquely to the surface of the board so that light is emitted toward a light receive face thereof. The end of the slot has a recession formed in parallel with the surface of the board so that it contacts partially with the end face. The end face is formed at a total internal reflection angle so that light emitted from the optical fiber is subjected to total internal reflection. On the board is formed a slot in which the optical fiber is disposed. The optical fiber is secured to the slot in such a way that the end is thrust into a recession formed in the end of the slot.

Abstract: A method and structure for forming a buried strap in a dynamic random access memory structure. The method includes forming a trench adjacent a pass transistor of the dynamic random access memory structure, partially filling the trench with a conductor, forming a collar surrounding an upper portion of the conductor, forming a spacer in a portion of the trench above the conductor, forming an insulator in a remainder of the upper portion of the trench, forming a shallow trench isolation region on one side of the trench opposite the pass transistor, removing the spacer to form a gap between the insulator and the pass transistor, and filling the gap with a conductor to form the buried strap.

Abstract: A field emission cold cathode element designed with the objects of enabling control of overcurrents that arise at times of discharge without adding a power source or complicating the operating circuits, realizing high-frequency operation and lower power consumption without giving rise to short-circuit damage due to discharge breakdown, and moreover, suppressing increases in element temperature; wherein an n-type region underlying emitters is divided between three n-type semiconductor regions: a first n-type semiconductor region, a second n-type semiconductor region and a third n-type semiconductor region.

Abstract: A semiconductor memory device is provided which is capable of reducing the peak current of sense-amplifiers in the normal access mode operation and capable of a high speed access. The system comprises two types of sense-amplifiers 200 and 201 and a sense-amplifier control circuit for controlling activation start and finish time. Depending upon the access mode, the activation start time and the activation finish time for these sense-amplifiers and are shifted by a sense-amplifier control circuit, which can modify a one-shot-pulse signal generated by an ATD into an optional pulse width and a route for transmitting are altered for data obtained in the normal access mode operation and data obtained in the page access mode operation are transmitted by selected routes by a page-decoder, a sense-amplifier selection circuit, and a latch selector.

Abstract: A method of measuring overlay error comprises forming a first mask having a first alignment array comprising a periodic pattern of first features having a first periodicity, forming a second mask having a second alignment array comprising a pattern of second features having the first periodicity, the first alignment array being adjacent the second alignment array, the first alignment array and the second alignment array forming a combined alignment array, transforming the combined alignment array to produce a transformed array, selecting a first region within the transformed array, inverse transforming the region to produce geometric phase shift information, averaging the phase shift information, converting the averaged phase shift information into a value for misalignment in a first direction corresponding to the first region, repeating the selecting, inverse transforming, averaging and converting using a second region within the transformed array to calculate a value for misalignment in a second direction c

Abstract: A semiconductor memory device includes a memory cell array, a read/write control circuit, a signal generator, and a write error prevention circuit. In the memory cell array, a plurality of memory cells are formed at intersections of pluralities of word lines and bit lines. The read/write control circuit controls a data read/write from/in the memory cell array in accordance with a mode setting signal representing a read/write mode, a data input signal, and an address signal. The signal generator generates a one-shot pulse signal when the mode setting signal represents a write mode. The write error prevention circuit precharges a bit line of the memory cell array by the one-shot pulse signal from the signal generator.

Abstract: A method of forming a semiconductor structure, includes steps of growing an oxide layer on a substrate to form a first wafer, separately forming a metal film on an oxidized substrate to form a second wafer, attaching the first and second wafers, performing a heat cycle for the first and second wafers to form a bond between the first and second wafers, and detaching a portion of the first wafer from the second wafer. Thus, a device, such as a back-plane for a semiconductor device, formed by the method includes an oxidized substrate, a metal film formed on the oxidized substrate forming a back-gate, a back-gate oxide formed on the back-gate, and a silicon layer formed on the back-gate oxide.

Abstract: A method is provided for analyzing stability and passivity of physical systems. A physical system having time delays is represented as a linear circuit model. The linear circuit model is transformed into a corresponding transform domain circuit model. Sensitivity analysis is applied to the transform domain circuit model for generating information indicative of the stability or the passivity of the physical system having the time delays. A graphical representation may be created of the information indicative of the stability or passivity of the physical system having the time delays.

Abstract: An optical assembly utilizing a novel optical element. The assembly includes a tunable source of input radiation; an optical element that can receive at least a portion of the input radiation and comprises a manifold having at least two independent surfaces, in which at least a portion of each independent surface is selected from the group consisting of a reflective structure and a diffractive structure, and the independent surfaces are geometrically configured so that a portion of incident radiation to the manifold is diffracted at least twice in an angular sense that can increase a tuning sensitivity of an angular deviation of the incident radiation exiting the manifold; and, a scanner means which can accept and redirect a portion of the radiation output by the optical element for producing an illumination pattern.