Abstract: In a semiconductor integrated circuit device of a liquid crystal display drive controller, the present invention is intended to suppress an increase in the number of output terminals for interface control signals for control of parallel interface to a sub liquid crystal display controller. A host interface circuit comprises a first serial interface circuit for serial data input and output in a differential manner, a parallel interface circuit, and other interface circuits. When the first serial interface circuit is selected for use as the host interface, the host interface circuit outputs in parallel predetermined information input via the first serial interface circuit from the parallel interface circuit to outside and generates interface control signals for the parallel output. External terminals for host interface assigned to the other interface circuits are used for double duty to output the interface control signals.

Abstract: An immersion microscope objective lens of the present invention has: in order from an object, a first lens group G1 having positive refractive power and having a cemented lens of a plano convex lens having a plane facing the object and a meniscus lens having a concave surface facing the object, and a single meniscus lens having a convex surface facing the object; a second lens group having positive refractive power and having a plurality of cemented lenses; and a third lens group having negative refractive power and having a cemented meniscus lens having a concave surface facing an image, and a cemented meniscus lens having a concave surface facing the object. And the following conditional expressions 0.12<d0/f<0.25, 0.04<?Ct(p)??Ct(n)<0.09 and ?0.03<?hg(p)??hg(n)<0.00 are satisfied.

Abstract: A semiconductor device including a package substrate having, at the periphery of the main surface thereof, bonding leads disposed in a row, a semiconductor chip mounted inside of the row of the bonding leads on the main surface of the package substrate, wires for connecting pads of the semiconductor chip and the bonding leads of the substrate, a sealing body for resin sealing the semiconductor chip and the wires, and solder bumps disposed on the back surface of the package substrate. The top of loop of each of the wires is disposed outside the wire connecting portion so that the wire connection between the bonding leads and the pads of the semiconductor chip has a stable loop shape to prevent wire connection failure.

Abstract: To provide a multi-core LSI capable of improving the stability of operation. A multi-core LSI comprises a plurality of CPUs coupled to a first shared bus, one or more modules coupled to a second shared bus, a shared bus controller coupled between the first shared bus and the second shared bus, for arbitrating an access to the module(s) by the CPUs, and a system controller that monitors whether or not a response signal to an access request signal of the CPUs is output from module to be accessed, wherein the system controller outputs a pseudo response signal to the first shared bus via the shared bus controller to terminate the access by the CPU while accessing if the response signal is not output from the module to be accessed after the access request signal is output to the second shared bus from the shared bus controller and before a predetermined time elapses.

Abstract: An immersion type microscope objective lens OL includes, in order from a cover plate C side, a first lens group G1 having positive refractive power, a second lens group G2 having positive refractive power, and a third lens group G3 having negative refractive power. The first lens group G1 includes at least one cemented lens. The second lens group G2 includes at least two achromatic lenses. The third lens group G3 includes, in order from the object side, an achromatic lens CL31 having a strong concave surface facing an image side, and an achromatic lens CL32 having a strong concave surface facing the object side.

Abstract: In a chip pick-up process after dicing in an assembly process during manufacture of a semiconductor integrated circuit device it is an important subject to diminish a pick-up defect caused by the reduction in thickness of each chip which is proceeding in quick tempo. Particularly, bending of the chip peripheral portion caused by a peeling operation is very likely to induce cracking and chipping of the chip. In the present invention, to solve these problems, in case of peeling a chip from a dicing tape (adhesive tape) or the like while vacuum-chucking the chip by a chucking collet, the flow rate of a vacuum chucking system in the chucking collet is monitored to check a bent state of the chip before complete separation of the first chip from the adhesive tape.

Abstract: The semiconductor integrated circuit includes a clock generating section having a digital control signal generating part operable to generate a clock signal and a digital control part. The clock generating section further includes a phase-frequency comparator and a control register. The comparator is supplied with a reference signal CLKin and a feedback signal. The control register is supplied with an output signal of the comparator, and stores two or larger bits of digital control information. The clock generating section further includes a control data storing circuit for previously storing sets of initial set data for lock operations. In response to operation select information, initial set data are stored at upper bit of the control register from the control data storing circuit. Thus, it becomes possible to reduce the number of steps to store control information in a register for digitally controlling the clock signal generating part.

Abstract: A semiconductor device with semiconductor chips stacked thereon is provided. The semiconductor device is reduced in size and thickness. In a first memory chip and a second memory chip, first pads of the first memory chip located at a lower stage and hidden by the second memory chip located at an upper stage are drawn out by re-wiring lines, whereby the first pads projected and exposed from the overlying second memory chip and second pads of the second memory chip can be coupled together through wires. Further, a microcomputer chip and third pads formed on re-wiring lines are coupled together through wires over the second memory chip, whereby wire coupling of the stacked memory chips can be done without intervention of a spacer.

Abstract: Capacity-gate voltage characteristics of a field-effect transistor having plural gates are measured against a voltage change in each one of the gates for an inverted MOSFET and for an accumulated MOSFET, respectively. These measurements together with numerical simulations provided from a model for quantum effects are used to determine flat band voltages between the plural gates and a channel. Next, an effective normal electric field is calculated as a vector line integral by using a set of flat band voltages for the measured capacity as a lower integration limit. Lastly, mobility depending on the effective normal electric field is calculated from current-gate voltage characteristic measurements and capacity measurements in a source-drain path, and the calculated mobility is substituted into an equation for a current-voltage curve between source and drain.

Abstract: A zoom lens ZL installed in a single-lens reflex digital camera 1 and the like includes, in order from an object side, a first lens group G1 having positive refractive power, a second lens group G2 having negative refractive power, and a rear lens group GR having positive refractive power. The second lens group G2 includes at least one positive lens and a negative lens disposed adjacent to the object side of the positive lens having largest refractive power among the positive lenses. Each distance between lens groups varies upon zooming from a wide-angle end state and a telephoto end state. Thereby providing a zoom lens having excellent optical performance, an optical apparatus equipped the zoom lens, and a method for manufacturing the zoom lens.

Abstract: In operation to obtain an optimal observation condition in a review system, the number of trial reviews can be reduced to improve efficiency of the operation. For a defect review conducted by the review system, a recipe parameter management system stores, as recipe parameter setting history in a recipe parameter setting history database (DB), a recipe parameter setting values of recipe parameters set when the defect review is conducted, the number of trial reviews carried out until the recipe parameter setting values are set, and defect images obtained when the defect review is conducted. The apparatus displays, on a terminal, histograms and the numbers of trial reviews generated based on the recipe parameter setting history data stored in the recipe parameter setting history database (DB). Hence, the operator can easily obtain data regarding the recipe parameter setting in the past.

Abstract: An eyepiece system has a lens group S1 in which a lens L1 having a negative refractive index and refractive power and a lens L2 having a positive refractive index and refractive power are joined, so that the lens group S1 as a whole has a positive refractive index and refractive power; and a multi-layer (stacked) diffraction optical element PF. In an optical system positioned between an image surface I and an eye point EP, the position of a diffraction plane on the optical axis is between EF in FIG. 1. In FIG. 1, EF is the range in which the value ra of the ratio between a distance (DH2) between the diffraction plane (C) and a principal point (H2) near the diffraction plane and a distance (DH1H2) between principal points is 0.5 or less in both directions from the principal points H1, H2.

Abstract: In a memory array MCA which includes memory cells MC each having a variable-resistance-based memory device RQ and a select transistor MQ, an object is to receive a fixed quantity of storage data for a short time, and to realize writing operation to the memory cell, with suppressed peak current. In order to achieve the object, the data bus occupation time in rewriting operation is shortened by using plural sense amplifiers and storing storage data temporarily, and plural programming circuits are provided and activated using the control signals with different phases. By the above, the phase change memory system with low current consumption can be realized, without causing degradation of the utilization ratio of the data bus.

Abstract: When a microstrip line is connected with a waveguide, there is a limit to reducing the connection loss by using only a matching box. We have discovered that in a transmission mode line transducer for converting between the TEM waves of the microstrip line and the TE01 waves of the waveguide, if the cross-sections of the microstrip line and the waveguide are substantially the same size, in the case of a 50? microstrip line when the characteristic impedance of the waveguide is about 80%, i.e., 40?, the line conversion loss can be optimized. Therefore, according to the present invention, the microstrip line is connected with the waveguide using a ?/4 matching box by means of a ridged waveguide having a low impedance and a length of ?/16 or less.

Abstract: An object of the present invention is to reduce the conducting loss of an existing conversion circuit while suppressing its noise. The present invention is typically a circuit arrangement includes at least one switching device and a free-wheel diode connected in parallel with the switching device. The free-wheel diode is formed by connecting a silicon PiN diode in parallel with a Schottky barrier diode that uses a semiconductor material having a wider band gap than silicon as a base material. The silicon PiN diode and Schottky barrier diode are separate chips.

Abstract: A system (100) for connecting a fuel cell stack to an A.C. grid to provide power thereto is disclosed in which a voltage regulated D.C. bus (110) is provided to be coupled to the fuel cell stack, a bidirectional inverter (120) is coupled to the D.C. bus (110), and is to be coupled between the D.C. bus (110) and the A.C. grid. At least one D.C. auxiliary load (130) of the fuel cell stack is provided coupled to the D.C. bus (110). A D.C. to D.C. converter (140) is provided between the fuel cell stack and the D.C. bus (110).

Abstract: An integrated circuit formed on a semiconductor chip includes voltage regulators for stepping down an externally-supplied power voltage to produce an internal power voltage, and internal circuits which operate based on the internal power voltage. The voltage regulators are laid in the area of the buffers and protective elements for the input/output signals and power voltages so that the overhead area due to the on-chip provision of the voltage regulators is minimized. The internal power voltage is distributed to the internal circuits through a looped main power line, with an electrode pad for connecting an external capacitor for stabilizing the internal power voltage being provided on it, so that the internal power voltage is stabilized and the power consumption of the integrated circuit is minimized.

Abstract: A camera with a built-in projector includes: a camera unit equipped with photographing components including an optical system; and a projector module equipped with a projecting optical system, with an optical axis extending along a longer side of the projector module running substantially parallel to an optical axis of the camera unit extending along a longer side of the camera unit.

Abstract: In the semiconductor integrated circuit device lithography process it is becoming more and more essential to control both exposure dose and focus value independently with a high accuracy. Using a wafer treated precedingly, a section profile of a photoresist is acquired by the technique of scatterometry, then both exposure dose and focus value are estimated independently with a high accuracy on the basis of the section profile thus acquired and using a conjectural expression obtained by the technique of multivariate analysis, and a focus setting in the exposure of a succeedingly treated wafer is corrected on the basis of the estimated exposure dose and focus value.

Abstract: Composition, article of manufacture for and method of treating malaria in a human having an infestation of Plasmodium protozoans are described. The method comprises administering a therapeutically-effective amount of a compound of formula (I) or (IV), i.e. sufficient quantity to reduce the population of Plasmodium. The composition of the invention is a compound of formula (I) or (IV) with a pharmaceutical excipient. The article of manufacture is the composition in combination with labeling for treating malaria. The substituents are detailed in the specification.