Patents Represented by Attorney Miles & Stockbridge P.C.
  • Patent number: 7834316
    Abstract: There is provided a method for setting a suitable imaging magnification for each of a plurality of measurement places in a charged particle beam apparatus which images a semiconductor pattern. For a given measuring point coordinate, a line segment or a vertex representing a change in concavity and convexity near the measuring point coordinate is searched, and an imaging magnification is set so that coordinates on a sample corresponding to both ends which gives a length that serves as a reference falls in a field of view of the charged particle beam apparatus by letting a minimum distance be the reference, of distances between line segments representing a change in concavity and convexity from the measuring point coordinate or a distance between neighboring vertexes.
    Type: Grant
    Filed: March 6, 2008
    Date of Patent: November 16, 2010
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Shigeki Sukegawa, Shunsuke Koshihara, Kyoungmo Yang
  • Patent number: 7829946
    Abstract: A semiconductor device including a MOSFET has a plurality of transistor cell regions disposed on a semiconductor substrate and a Schottky cell region disposed between the plurality of transistor cell regions. Each transistor cell region has a plurality of first trenches disposed in a main surface of the semiconductor substrate, a well region between the plurality of first trenches, a first gate insulating film and a first gate electrode of the MOSFET in each first trench, and a source region of the MOSFET in each well region. The Schottky cell region has a plurality of second trenches disposed in the main surface of the semiconductor substrate, a second gate insulating film and a second gate electrode of the MOSFET in each second trench, gate lead-out wiring connected to each second gate electrode, and a plurality of guard ring regions enclosing the respective second trenches.
    Type: Grant
    Filed: March 14, 2009
    Date of Patent: November 9, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Nobuyuki Shirai, Nobuyoshi Matsuura, Yoshito Nakazawa
  • Patent number: 7830953
    Abstract: The present invention conducts the initial synchronization acquisition of the rapid and high precision ultra-wideband signal without complicatedness of hardware and increase in power consumption. For this purpose, a communication apparatus for exchanging information with an intermittent pulse train signal searches all phases among the pulses in the predetermined search resolution in the process to acquire initial synchronization of the input pulse, estimates the region where the peak phase of the largest output value exists, narrows the region where the peak phase exists up to the predetermined range by repeating the search for all phases in the estimated region in the next step, and conducts acquisition of detailed synchronization in the estimated region. In every step, the threshold value for judging existence of signal or a gain in the analog circuit is controlled for each step.
    Type: Grant
    Filed: November 14, 2006
    Date of Patent: November 9, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Ryosuke Fujiwara, Tatsuo Nakagawa, Masayuki Miyazaki
  • Patent number: 7830706
    Abstract: A phase change memory capable of highly reliable operations is provided. A semiconductor device has a memory array having a structure in which memory cells are stacked including memory layers using a chalcogenide material and diodes, and initialization conditions and write conditions are changed according to the layer in which a selected memory cell is positioned. The initialization conditions and write conditions (herein, reset conditions) are changed according to the operation by selecting a current mirror circuit according to the operation and by a control mechanism of a reset current in a voltage select circuit and the current mirror circuit.
    Type: Grant
    Filed: December 15, 2008
    Date of Patent: November 9, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Satoru Hanzawa, Hitoshi Kume
  • Patent number: 7830730
    Abstract: A memory module fast in random accesses, large in capacity, and low in fabricating cost. And the memory module can assure high security. The memory module consists of a flash memory, a dynamic random access memory, and a control circuit. The control circuit enables data transfer between the flash memory and the dynamic random access memory only with a read operation for a specific address in the memory module. When reading data from the memory module, the control circuit refreshes the dynamic random access memory. Thus the present invention can realize a large capacity and low cost memory module capable of reading data fast reading and assuring high security.
    Type: Grant
    Filed: July 14, 2008
    Date of Patent: November 9, 2010
    Assignee: Hitachi, Ltd.
    Inventor: Seiji Miura
  • Patent number: 7830616
    Abstract: A zoom lens comprises, in order from an object, a first lens group G1 having negative refractive power, a second lens group G2 having positive refractive power, and a third lens group G3 having positive refractive power. The first lens group G1 consists of one spherical negative lens and one spherical positive lens with an air space therebetween, and the conditional expression 0.50<(DG1+DG2+DG3)/fw<1.75 is satisfied, where DG1 to DG3 denote the thickness of the first lens group G1 to third lens group G3 respectively on the optical axis, and fw denotes the focal length of the zoom lens in the wide-angle end state.
    Type: Grant
    Filed: October 2, 2009
    Date of Patent: November 9, 2010
    Assignee: Nikon Corporation
    Inventor: Saburo Masugi
  • Patent number: 7829930
    Abstract: A technique that can realize high integration even for multilayered three-dimensional structures at low costs by improving the performance of the semiconductor device having recording or switching functions by employing a device structure that enables high precision controlling of the movement of ions in the solid electrolyte. The semiconductor element of the device is formed as follows; two or more layers are deposited with different components respectively between a pair of electrodes disposed separately in the vertical (z-axis) direction, then a pulse voltage is applied between those electrodes to form a conductive path. The resistance value of the path changes according to an information signal. Furthermore, a region is formed at a middle part of the conductive path. The region is used to accumulate a component that improves the conductivity of the path, thereby enabling the resistance value (rate) to response currently to the information signal.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: November 9, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Motoyasu Terao, Hideyuki Matsuoka, Naohiko Irie, Yoshitaka Sasago, Riichiro Takemura, Norikatsu Takaura
  • Patent number: 7830872
    Abstract: To provide a signal processing section of a software radio device or the like which can dynamically change connection itself of an internal function structure at the time of execution. A switching module ISM1(2) or the like selects and uses one of the plurality of the routing tables (60) or the like prepared according to the signal processing and executes routing control to respective processing modules a11 or the like based on the input data packet. The processing module a11 or the like executes each processing by using a parameter table or the like indicating the processing to be performed in accordance with the data packet.
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: November 9, 2010
    Assignees: Toyota Infotechnology Center Co., Ltd., National Institute of Information and Communications Technology
    Inventors: Akihisa Yokoyama, Hiroshi Harada, Hitoshi Inoue, Makoto Honda
  • Patent number: 7828251
    Abstract: An interconnecting alignment and support system for supporting and maintaining alignment of at least one conduit or pipe is disclosed. The system may be used, for example, during a concrete pour operation or other construction operation. The system comprises a base spacer and, optionally, one or more of an intermediate spacer and/or another base spacer. The base spacer is constructed to be capable of interlocking with another spacer on each side and the top. The intermediate spacer is constructed to be capable of interlocking with another spacer on each side and both the top and bottom. The interlocks on the spacers may be releasably latched when fully interlocked. By interlocking the spacers, a matrix structure for aligning and supporting conduit or pipe may be created. The base spacer is attachable to a surface, so that the alignment and support system may be fixed in place.
    Type: Grant
    Filed: October 21, 2005
    Date of Patent: November 9, 2010
    Assignee: Cantex, Inc.
    Inventor: Steve Tollefson
  • Patent number: 7824609
    Abstract: The invention relates to a method for decellularising allogenic and xenogenic foreign material for the subsequent production of bioprostheses, coated with endogenous body cells, whereby the foreign material is firstly treated in a solution of bile acid and then alcohol, each with an intermediate or subsequent rinsing step, in combination with a mechanical action on the tissue and the cells by the force generated from a flowing treatment medium, at least in the final rinsing step. After said treatment the tissue is completely rid of foreign cell material and viruses and represents an excellent starting material for the coating with cells of the bioprosthesis recipient.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: November 2, 2010
    Assignee: Auto Tissue GmbH
    Inventors: Wolfgang Konertz, Pascal Dohmen
  • Patent number: 7825480
    Abstract: The characteristics of a semiconductor device including a trench-gate power MISFET are improved. The semiconductor device includes a substrate having an active region where the power MISFET is provided and an outer circumferential region which is located circumferentially outside the active region and where a breakdown resistant structure is provided, a pattern formed of a conductive film provided over the substrate in the outer circumferential region with an insulating film interposed therebetween, another pattern isolated from the pattern, and a gate electrode terminal electrically coupled to the gate electrodes of the power MISFET and provided in a layer over the conductive film. The conductive film of the pattern is electrically coupled to the gate electrode terminal, while the conductive film of another pattern is electrically decoupled from the gate electrode terminal.
    Type: Grant
    Filed: June 4, 2008
    Date of Patent: November 2, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Hiroki Arai, Nobuyuki Shirai, Tsuyoshi Kachi
  • Patent number: 7824932
    Abstract: A technique is provided which can exactly recognize a chip to be picked up when picking up the chip from a wafer sheet in a process of die bonding a thin chip. A camera is coupled to one end of a lens barrel, an objective lens is attached to an opposite end of the lens barrel, and an image of a main surface of a chip is photographed through the objective lens. A surface-emitting lighting unit, a diffusing plate and a half mirror are internally provided between the lens barrel and the chip. Further, another lens barrel having a coaxial drop lighting function of radiating light to the main surface of the chip along the same optical axis as that of the camera is disposed.
    Type: Grant
    Filed: May 6, 2009
    Date of Patent: November 2, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Hideharu Kobashi, Hiroshi Maki, Masayuki Mochizuki, Yoshiaki Makita
  • Patent number: 7823793
    Abstract: An IC card and card adapters are designed so that the IC card of a specific standard (e.g., MMC standard) is compatible with IC cards and terminals of other standards (e.g., MS card standard and USB terminal standard). In the IC card (MMC), a controller IC, which is connected to a flash memory, includes a voltage pull-down detector, a mode controller, a USB-mode interface controller, a MS-mode interface controller, and an MMC/SD-mode interface controller. The card adapters suffice to have component parts which are easy in formation and low in cost such as wiring lines and resistors. The voltage pull-down detector of the IC card detects the voltage pull-down caused by the resistors, and the mode controller selects the USB-mode interface controller, MS-mode interface controller or MMC/SD-mode interface controller so that the IC card becomes compatible with the corresponding IC card standard.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: November 2, 2010
    Assignees: Renesas Electronics Corporation, Hitachi ULSI Systems Co., Ltd.
    Inventors: Akira Higuchi, Hirotaka Nishizawa, Junichiro Osako, Kenji Osawa
  • Patent number: 7826143
    Abstract: The object is to provide an optical system with a wavelength selecting device. According to one aspect of the present invention, an optical system with a wavelength selecting device includes, in order from an object along an optical axis, an objective optical system composed of optical elements having refractive power and an aperture stop, a no-power optical group composed of optical elements having no refractive power, and an imaging device. The no-power optical group includes the wavelength selecting device for making short wavelength light be selectively substantially non-transparent. The wavelength selecting device preferably satisfies the predetermined conditional expressions.
    Type: Grant
    Filed: June 14, 2005
    Date of Patent: November 2, 2010
    Assignee: Nikon Corporation
    Inventors: Akihiko Obama, Kouichi Ohshita, Mami Muratani
  • Patent number: 7826814
    Abstract: A frequency synthesizer comprises: a single-tone signal generator which outputs signals of a single frequency; a frequency multiplier which generates one or more intermediate signals having different frequencies based on frequencies of input signals and outputs the same as output signals; a frequency selector; a mixer; and a frequency synthesizer control circuit which includes a frequency synthesizer control terminal, wherein an output of the single-tone signal generator is set as an input of the frequency multiplier, one or more outputs of the frequency multiplier are set as one or more inputs of the frequency selector, an output of the frequency selector and one output of the outputs of the frequency multiplier are set as first and second inputs of the mixer, and an output of the mixer is set as an output of the frequency synthesizer.
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: November 2, 2010
    Assignee: Renesas Electronics Corporation
    Inventor: Toru Masuda
  • Patent number: 7823712
    Abstract: In a wet-type multi-plate clutch comprising an externally-toothed plate and an internally-toothed plate each of which is formed by adhering a friction material on a core plate and in which torque is transmitted by engaging the externally-toothed plate and the internally-toothed plate, the friction materials are adhered on opposed surfaces of the externally-toothed plate and the internally-toothed plate which are opposed to each other.
    Type: Grant
    Filed: February 12, 2007
    Date of Patent: November 2, 2010
    Assignee: NSK-Warner K.K.
    Inventor: Ritsuo Toya
  • Patent number: 7825731
    Abstract: An RF amplifying device includes a transmission line transformer coupled to an output electrode of a power transistor for generating transmission power to be fed to an antenna. The transmission power from the output electrode of the power transistor is fed to one end of a main line of the transmission line transformer, and one end of a secondary line of the transmission line transformer is coupled to an AC grounding node. The other end of the secondary line is coupled to the one end of the main line, thereby generating the transmission power. Coupling energy is transmitted from the secondary line to the main line. Coupling members electrically coupled to the output electrode of the power transistor are electrically coupled to a joint formed in either the main line, or the secondary line, at part of the energy coupling part.
    Type: Grant
    Filed: August 15, 2008
    Date of Patent: November 2, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Masami Ohnishi, Ryouichi Tanaka
  • Patent number: 7826264
    Abstract: The present invention realizes a semiconductor integrated circuit device for driving liquid crystal (liquid crystal control driver IC) capable of easily setting drive conditions and the like according to specifications of a liquid crystal display to be used. An electrically-programmable nonvolatile memory circuit (EPROM) or an electrically erasable and programmable nonvolatile memory circuit (EEPROM) is provided in a semiconductor integrated circuit device for driving a liquid crystal display, and setting information is stored in the memory circuit. The memory circuit is constructed by a normal device which can be formed in the same process as a semiconductor manufacturing process of forming devices of other circuits.
    Type: Grant
    Filed: May 26, 2006
    Date of Patent: November 2, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Yasushi Kawase, Susumu Ishida, Takesada Akiba, Yasushi Nagata, Naoki Miyamoto, Kazuyoshi Shiba
  • Patent number: 7821824
    Abstract: A semiconductor integrated circuit has a central processing unit and a rewritable nonvolatile memory area disposed in an address space of the central processing unit. The nonvolatile memory area has a first nonvolatile memory area and a second nonvolatile memory area, which memorize information depending on the difference of threshold voltages. The first nonvolatile memory area has the maximum variation width of a threshold voltage for memorizing information set larger than that of the second nonvolatile memory area. When the maximum variation width of the threshold voltage for memorizing information is larger, since stress to a memory cell owing to a rewrite operation of memory information becomes larger, it is inferior in a point of guaranteeing the number of times of rewrite operation; however, since a read current becomes larger, a read speed of memory information can be expedited.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: October 26, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Yutaka Shinagawa, Takeshi Kataoka, Eiichi Ishikawa, Toshihiro Tanaka, Kazumasa Yanagisawa, Kazufumi Suzukawa
  • Patent number: 7821715
    Abstract: A diffractive optical element 10 is constituted by sandwiching and closely bonding first and second optical element components 13, 14 which have different refractive indices and are adhered via a relief pattern 20, between third and fourth optical element components 11, 12.
    Type: Grant
    Filed: February 8, 2006
    Date of Patent: October 26, 2010
    Assignee: Nikon Corporation
    Inventors: Kenzaburo Suzuki, Akiko Miyakawa