Abstract: A semiconductor wafer is mounted onto a dicing tape, the dicing tape comprising a first tape easy to stretch and a second tape difficult to stretch and provided on the first tape. Thereafter, a ring-shaped jig is mounted onto the dicing tape along the outer periphery of the semiconductor wafer and the semiconductor wafer is diced. Subsequently, the dicing tape is stretched from the outer periphery thereof to widen the spacing between adjacent chips. Thus, the dicing tape is stretched from its outer periphery in a state in which there are formed an area of the dicing tape underlying the semiconductor wafer and easy to stretch and an area of the dicing tape located along the outer periphery of the wafer and difficult to stretch. Consequently, the force of stretching the dicing tape is transmitted to the semiconductor wafer-mounted area of the first tape, thus permitting pickup of each chip in a sufficiently widened state of the spacing between adjacent chip-forming areas.

Abstract: A telescopic shaft used for steering of a vehicle to be used in the steering shaft of a vehicle has a male shaft and a female shaft that are fitted to each other non-rotatably and slidably. The telescopic shaft is provided with at least one set of torque transmission members disposed in at least one set of intermediate fitting portions formed on the outer circumferential surface of the male shaft and the inner circumferential shaft of the female shaft and a stopper plate for regulating movement of the at least one set of torque transmission members with respect to the axial direction.

Abstract: After silicon oxide film (9) is formed on the surface of a semiconductor substrate (1), the silicon oxide film (9) in a region in which a gate insulation film having a small effective thickness is formed is removed using diluted HF and after that, high dielectric constant insulation film (10) is formed on the semiconductor substrate (1). Consequently, two kinds of gate insulation films, namely, a gate insulation film (12) comprised of stacked film of high dielectric constant insulation film (10) and silicon oxide film (9) and gate insulation film (11) comprised of the high dielectric constant insulation film (10) are formed on the semiconductor substrate (1).

Abstract: A network communications method communicates a certificate from a client machine to a server machine through a security module. The protocol used between the client and server machines is HTTP or an equivalent protocol, and a security protocol such as SSL or an equivalent is implemented between the client machine and the security module. The steps of the method include inserting the certificate into a cookie header of a request in HTTP or an equivalent protocol, and then transmitting the request from the security module to the server machine.

Abstract: An object is to provide an ultra-compact zoom lens system suitable for a video camera and a electronic still camera using a solid-state imaging device and the like with securing high optical performance. The zoom lens system includes, in order from an object along the optical axis, a first lens group having negative refractive power, a second lens group having positive refractive power, a third lens group having positive refractive power, and at least one lens group having positive refractive power. The first lens group is fixed upon zooming from a wide-angle end state to an telephoto end state and focusing. A plurality of lens groups except the first lens group are moved upon zooming from the wide-angle end state to the telephoto end state, respectively. A plurality of lens groups except the first lens group G1 are moved upon focusing, respectively. Given conditional expressions are satisfied.

Abstract: There is a need for preventing a MOS transistor from being destroyed due to an inrush current from an input terminal when a boost operation starts from a boost disabling state. During the boost operation, a third MOS transistor (M3) turns off and a fourth MOS transistor (M4) turns on to prevent a current leak from an output terminal (Vout) to an input terminal (Vin) due to a parasitic diode of a second MOS transistor (M2). In the boost disabling state, the third MOS transistor turns on and the fourth MOS transistor turns off to prevent a current leak from the input terminal to the output terminal due to the parasitic diode of the second MOS transistor. When the boost operation starts from the boost disabling state, an electrode toward the output terminal of the second MOS transistor is charged before changing a substrate bias state of this transistor. In this manner, an inrush current is prevented from flowing from the input terminal to the output terminal via the parasitic diode of the second MOS transistor.

Abstract: The agent for communication between a manager (20) and at least one resource (30) comprises a protocol core (111) created automatically from a formalized description of the resource (30), this core (111), once created, comprising in compiled form an interface (14) for communication with the manager (20) and a model (11) of the resource (30) comprising the values of the instances of the resource (30), these values being accessible by the administrator (20) through the communication interface (14).

Abstract: Providing a telescope capable of preventing aesthetic external appearance thereof from losing. The telescope has a hole 33 on an outer surface of a lens barrel 3. A lens cap 5 for protecting an objective lens of the telescope includes a lens cap body 51, an extending portion 59 extending from the lens cap body 51, and connecting member 52 capable of removably attaching to the hole 33.

Abstract: In a semiconductor device which includes a split-gate type memory cell having a control gate and a memory gate, a low withstand voltage MISFET and a high withstand voltage MISFET, variations of the threshold voltage of the memory cell are suppressed. A gate insulating film of a control gate is thinner than a gate insulating film of a high withstand voltage MISFET, the control gate is thicker than a gate electrode 14 of the low withstand voltage MISFET and the ratio of thickness of a memory gate with respect to the gate length of the memory gate is larger than 1. The control gate and a gate electrode 15 are formed in a multilayer structure including an electrode material film 8A and an electrode material layer 8B, and the gate electrode 14 is a single layer structure formed at the same time as the electrode material film 8A of the control gate.

Abstract: An electrically programmable and erasable non-volatile semiconductor memory such as a flash memory is designed into a configuration in which, when a cutoff of the power supply occurs in the course of a write or erase operation carried out on a memory cell employed in the non-volatile semiconductor memory, the operation currently being executed is discontinued and a write-back operation is carried out to change a threshold voltage of the memory cell in the reversed direction. In addition, the configuration also allows the number of charge-pump stages in an internal power-supply configuration to be changed in accordance with the level of a power-supply voltage so as to make the write-back operation correctly executable. As a result, no memory cells are put in deplete state even in the event of a power-supply cutoff in the course of a write or erase operation.

Abstract: For simplifying the dual-damascene formation steps of a multilevel Cu interconnect, a formation step of an antireflective film below a photoresist film is omitted. Described specifically, an interlayer insulating film is dry etched with a photoresist film formed thereover as a mask, and interconnect trenches are formed by terminating etching at the surface of a stopper film formed in the interlayer insulating film. The stopper film is made of an SiCN film having a low optical reflectance, thereby causing it to serve as an antireflective film when the photoresist film is exposed.

Abstract: An object of the present invention is to prevent formation of a badly situated via metal in a Damascene wiring portion in multiple layers having an air-gap structure. In the present invention, a via is completely separated from an air-gap 45 by forming an interlayer insulating film 44 having the air-gap 45 between adjacent Damascene wiring portions after forming a sacrifice film pillar 42 from a selectively removable insulating film in a formation region of a connection hole. The present invention can provide multiple-layered buried wiring in which a high reliable via connection and a reduced parasitic capacitance due to the air-gap are achieved.

Abstract: An IC card has a card substrate having semiconductor integrated circuit chips mounted thereon and a plurality of connector terminals formed thereon. The connector terminals are exposed from a casing. The connector terminals are laid out in plural sequences in staggered form between sequences adjacent to one another forward and backward as viewed in an IC card inserting direction. Owing to the adoption of the staggered layout, a structure or configuration wherein the amounts of protrusions of socket terminals of a card socket are changed and the socket terminals are laid out in tandem, can be adopted with relative ease. If a connector terminal arrangement of a downward or low-order IC card is adopted as a specific connector terminal sequence as it is, whereas a function dedicated for an upward or high-order IC card is assigned to another staggered connector terminal arrangement, then backward compatibility can also be implemented with ease.

Abstract: The present invention provides a non-insulated type DC-DC converter having a circuit in which a power MOS•FET for a high side switch and a power MOS•FET for a low side switch are connected in series. In the non-insulated type DC-DC converter, the power transistor for the high side switch, the power transistor for the low side switch, and driver circuits that drive these are respectively constituted by different semiconductor chips. The three semiconductor chips are accommodated in one package, and the semiconductor chip including the power transistor for the high side switch, and the semiconductor chip including the driver circuits are disposed so as to approach each other.

Abstract: The present invention provides a non-insulated type DC-DC converter having a circuit in which a power MOS•FET for a high side switch and a power MOS•FET for a low side switch are connected in series. In the non-insulated type DC-DC converter, the power transistor for the high side switch, the power transistor for the low side switch, and driver circuits that drive these are respectively constituted by different semiconductor chips. The three semiconductor chips are accommodated in one package, and the semiconductor chip including the power transistor for the high side switch, and the semiconductor chip including the driver circuits are disposed so as to approach each other.

Abstract: A diffractive optical element includes at least a first diffractive element and a second diffractive element. The conditional expression 0.5?D/DS?0.9 is preferably satisfied where DS denotes the summation of the optimum designed groove height of the first diffractive element d1S and that of the second diffractive element d2S, and D denotes the summation of an actual groove height of the first diffractive element d1 and that of the second diffractive element d2. At least one of the first diffractive element and the second diffractive element is made of glass. At least one of the first diffractive element and the second diffractive element is made of resin. The optimum designed value of groove heights of the diffractive optical element are determined so as to satisfy a condition for correcting chromatic aberration at both d-line and g-line.