Patents Represented by Attorney Miles & Stockbridge P.C.
  • Patent number: 7347115
    Abstract: A rotary shaft and a rotation driven member are connected as to transmit motive power when the rotary shaft rotates relatively to the rotation driven member. A roller gets displaced to a first position where a frictional force with an outer race and the rotation driven member decreases, thereby permitting transmission of a rotational force from the rotary shaft to the rotation driven member. When the rotation driven member rotates relatively to the rotary shaft, the roller gets displaced to a second position where the frictional force with the outer race and the rotation driven member increases, thereby rotationally fixing the rotation driven member with respect to the outer race. The power transmission from a brake apparatus to an electric motor can be hindered while permitting the power transmission to the brake apparatus from the electric motor by using either a worm exhibiting a relatively low transmission efficiency or a worm wheel.
    Type: Grant
    Filed: February 17, 2003
    Date of Patent: March 25, 2008
    Assignee: NSK Ltd.
    Inventors: Ryoichi Otaki, Tomofumi Yamashita
  • Patent number: 7347319
    Abstract: The subject of the invention is a retention device for a conveyor roller, characterised in that the roller (7) is mounted on a tilting support (13).
    Type: Grant
    Filed: January 25, 2005
    Date of Patent: March 25, 2008
    Assignee: Societe Financiere de Gestion
    Inventors: Herve Simoens, Olivier Lacroix
  • Patent number: 7349250
    Abstract: The degree of integration and the number of rewriting of a semiconductor device having a nonvolatile memory element are improved. A first MONOS nonvolatile-memory-element and a second MONOS nonvolatile-memory-element having a large gate width compared with the first MONOS nonvolatile-memory-element are mounted together on the same substrate, and the first MONOS nonvolatile-memory-element is used for storing program data which is scarcely rewritten, and the second MONOS nonvolatile-memory-element is used for storing processed data which is frequently rewritten.
    Type: Grant
    Filed: July 15, 2005
    Date of Patent: March 25, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Fumitoshi Ito, Yoshiyuki Kawashima, Takeshi Sakai, Yasushi Ishii, Yasuhiro Kanamaru, Takashi Hashimoto, Makoto Mizuno, Kousuke Okuyama, Yukiko Manabe
  • Patent number: 7346325
    Abstract: This invention provides a receiver in which the calibration time by repeated operations to correct phase mismatch and amplitude mismatch between I and Q signals can be reduced. The receiver comprises mixers which convert received RF signals into quadrature modulated IF signals, signal paths which filter and amplify and output the quadrature modulated signals output from the mixers, a calibration circuit which calibrates phase and amplitude mismatches between the I and Q components of the quadrature modulated signals output through the signal paths, a frequency converter which, when the mixers or the signal paths selected output calibration signals with IF frequency instead of the quadrature modulated signals, converts the calibration signals into those with a frequency higher than IF frequency, and an arithmetic operation circuit which calculates phase and amplitude mismatches from the calibration signals output by the frequency converter and outputs calculation results.
    Type: Grant
    Filed: July 13, 2005
    Date of Patent: March 18, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Koji Maeda, Satoshi Tanaka, Irei Kyu, Yukinori Akamine, Manabu Kawabe
  • Patent number: 7345938
    Abstract: A sense amplifier capable of performing high-speed data sense operation with lower power consumption using a minuscule signal from a memory cell even in a case where a memory array voltage is reduced. A plurality of drive switches for over-driving are distributively arranged in a sense amplifier area, and a plurality of drive switches for restore operation are concentratively disposed at one end of a row of the sense amplifiers. A potential for over-driving is supplied using a meshed power line circuit. Through the use of the drive switches for over-driving, initial sense operation can be performed on data line pairs with a voltage having an amplitude larger than a data-line amplitude, allowing implementation of high-speed sense operation. The distributed arrangement of the drive switched for over-driving makes it possible to dispersively supply current in sense operation, thereby reducing a difference in sense voltage with respect to far and near positions of the sense amplifiers.
    Type: Grant
    Filed: May 9, 2007
    Date of Patent: March 18, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Riichiro Takemura, Kiyoo Itoh, Tomonori Sekiguchi, Takeshi Sakata, Katsutaka Kimura
  • Patent number: 7344231
    Abstract: The present invention relates to a digital device for printing on “open” or “closed” surface substrates by demand bubble-jet comprising at least one built-in ink reservoir (13) with a system of anti-splash partitions, at least one printhead and one buffer reservoir, the whole located in a print module (1) which moves in relation to the substrate (5). The device comprises a means for creating, during operation of the module, on the one hand, a vacuum in the built-in reservoir, with a method of active regulation of this vacuum by adjustment of the ink level detected by a sensor attached to the built-in reservoir and, on the other hand, the air pressure in the built-in reservoir required for printhead cleaning phases.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: March 18, 2008
    Assignee: Datacard Corporation
    Inventors: Ludovic Talon, Eric Auboussier, Yannick Suzanne, Sarah Suzanne
  • Patent number: 7342562
    Abstract: By implementing reduction in power of common electrode voltages applied from a power source of a liquid crystal drive device to common electrode interconnects of a liquid crystal display panel, respectively, reduction in power consumption of the liquid crystal display panel as a whole is attained. A VCOM operation waveform in a charging process from a second voltage VCOML to a first voltage VCOMH shows that a charging current Icha represents the sum of a charging current from VCOML to a reference voltage VCI, Icha1=Cp (VCI?VCOML)/?t, and a charging current from the reference voltage VCI to the first voltage VCOMH, Icha2=Cp (VCOMH?VCI)/?t. Accordingly, power consumed by Icha1 is the reference voltage VCI×Icha1, and power consumed by Icha2 is VCI×Icha2×2.
    Type: Grant
    Filed: April 23, 2004
    Date of Patent: March 11, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Yasushi Kawase, Takesada Akiba, Kazuya Endo, Goro Sakamaki
  • Patent number: 7342302
    Abstract: A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.
    Type: Grant
    Filed: July 20, 2006
    Date of Patent: March 11, 2008
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Taku Kanaoka, Masashi Sahara, Yoshio Fukayama, Yutaro Ebata, Kazuhisa Higuchi, Koji Fujishima
  • Patent number: 7342826
    Abstract: The read speed of an on-chip nonvolatile memory enabling electric rewrite is increased. The nonvolatile memory has a hierarchal bit line structure having first bit lines specific to each of a plurality of memory arrays, a second bit line shared between the plurality of memory arrays, a first selector circuit selecting the first bit line for each of the memory arrays to connect the selected first bit line to the second bit line, and a sense amp arranged between the output of the first selector circuit and the second bit line. The hierarchal bit line structure having the divided memory arrays can reduce the input load capacity of the sense amp.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: March 11, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Masamichi Fujito, Yutaka Shinagawa, Kazufumi Suzukawa, Ayako Kakuda, Akira Kato, Toshihiro Tanaka
  • Patent number: 7343445
    Abstract: A memory card is provided with a transfer control circuit, a write control circuit and a judging circuit. The transfer control circuit outputs a transfer flag signal during the data transfer. The write control circuit outputs an internal busy signal during the data write operation. The judging circuit outputs a transfer interruption signal when a card selection signal of the host is negated during the input of the transfer flat signal and also outputs a suspension signal when the card selection signal is negated during the input of the internal busy signal. A CPU invalidates the data being transfer to interrupt the transfer process upon reception of the transfer interruption signal and completes, upon reception of the suspension signal, the process being executed and stays in the waiting condition.
    Type: Grant
    Filed: October 3, 2006
    Date of Patent: March 11, 2008
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Kunihiro Katayama, Motoki Kanamori, Atsushi Shikata, Hidefumi Oodate, Atsushi Shiraishi
  • Patent number: 7343580
    Abstract: An automated method for inserting dummy surfaces into the various layers of the physical design of a multilayer integrated circuit is implemented by an integrated circuit design system. The integrated circuit is organized in interconnected units containing interconnected blocks composed of interconnected cells. The multilayer integrated circuit design, stored in the design system is implemented layer by layer, through selective insertion of patterns of dummy surfaces. The selective insertion is based on an insertion hierarchy with respect to the hierarchy of the physical design of the integrated circuit, by means of individual implementation of the interconnected blocks and first interconnection routing for said interconnected blocks and individual implementation of the interconnected units and second interconnection routing for said interconnected units. The patterns of dummy surfaces are established selectively in accordance with the methods used for designing the blocks of the integrated circuit.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: March 11, 2008
    Assignee: Bull SA
    Inventors: Marta Zorrilla, Vivian Blanchard
  • Patent number: 7339231
    Abstract: There is provided a technology capable of enhancing reliability in rewrite of storage information in a nonvolatile memory while checking an increase in area of a memory array thereof. With a memory array configuration, individual bit lines are connected to two memory cells sharing a source, and disposed at symmetrical positions, respectively, and two lengths of metal interconnections (the bit lines) are disposed with respect to a width in the direction of a channel width of a region occupied by one of the memory cells. In contrast, respective control gates of the memory cells corresponding to two word are rendered at an identical potential, and respective memory gates thereof are rendered at an identical potential, thereby disposing three lengths of metal interconnections (a control gate control line, memory gate control line, and common source line) with respect to a length of the regions occupied by the two memory cells in the direction of a channel length.
    Type: Grant
    Filed: August 3, 2005
    Date of Patent: March 4, 2008
    Assignee: Renesas Technology Corp.
    Inventor: Kozo Katayama
  • Patent number: 7338068
    Abstract: A garnish clip comprises a body attachment portion for attachment to a vehicle body and a garnish attachment portion for attachment to a garnish. The garnish attachment portion comprises a plate-shaped base with one end connected to the body attachment portion and a plate-shaped garnish engagement portion connected to the other end of the base by a U-shaped connection. The garnish engagement portion is latched to a head of the body attachment portion. Ribs on the garnish attachment portion provide rigidity to limit opening of the garnish engagement portion away from the head when the airbag deploys and the latch is released by collision or roll-over forces.
    Type: Grant
    Filed: June 15, 2005
    Date of Patent: March 4, 2008
    Assignee: Newfrey LLC
    Inventors: Yasuhiro Kawai, Koya Teshima
  • Patent number: 7338315
    Abstract: The invention relates to a closure device comprising a wall, an opening provided in this wall, a flap which selectively adopts at least one closed position in which it blocks the opening and an open position in which it uncovers this opening. Pins are connected to a first edge of the flap, and recesses provided in the thickness of the wall on either side of the opening to receive the pins. The device of the invention also comprises flexible arms which connect the pins to the first edge of the flap in an elastic manner in the direction of bringing the pins towards one another. These arms protrude from the first edge and from the rear face of this flap.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: March 4, 2008
    Assignees: Legrand, Legrand SNC
    Inventors: Jacques Fauriot, Etienne Rejou
  • Patent number: 7339827
    Abstract: In connection with rise and fall of a word line bias, the present invention adopts a procedure such that a diffusion region voltage Vs on a memory transistor side is changed, and after the voltage Vs passes a certain intermediate value Vsx, a gate voltage Vmg of the memory transistor is changed. Alternatively, there is adopted a procedure such that the gate voltage Vmg of the memory transistor is changed, and after the voltage Vmg passes a certain intermediate value Vmgx, the diffusion layer voltage Vs on the memory transistor side is changed. The values of Vsx and Vmgx are determined from the magnitude of the electric field in a gate insulating film not causing FN tunneling electron injection that causes a change in threshold voltage and the magnitude of a potential barrier against holes not causing BTBT hot hole injection.
    Type: Grant
    Filed: June 8, 2005
    Date of Patent: March 4, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Kan Yasui, Digh Hisamoto, Toshihiro Tanaka, Takashi Yamaki
  • Patent number: 7337991
    Abstract: The invention relates to an accessory adapted to be mounted on the end of an outlet conduit (4) of an air blast device (1). The accessory is in the form of a tube having an inlet, an outlet and a central passage therethrough, the axial passage or tube being mounted coaxially to the axis of the outlet conduit. The tube has a cross-sectional area that first decreases in the direction (F) in which the air is discharged from the air blast device and a cross-sectional area that then increases in the direction F, thus forming a convergent segment (A) followed by a divergent segment (B). The air blast device is of the type having an evacuation control valve disposed between its inlet and outlet for controlling air flow contained in a chamber or reservoir.
    Type: Grant
    Filed: January 15, 2004
    Date of Patent: March 4, 2008
    Inventor: Herve Simoens
  • Patent number: 7339261
    Abstract: A semiconductor device which permits reduction in the number of pins and in size thereof is provided.
    Type: Grant
    Filed: January 16, 2007
    Date of Patent: March 4, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Yoshihiko Shimanuki, Koji Tsuchiya
  • Patent number: 7338382
    Abstract: In a telescopic shaft for vehicle steering, assembled in a steering shaft of a vehicle and including a male shaft and a female shaft so fitted as to be mutually incapable of rotating but mutually slidable, at least one set of torque transmission members are disposed in at least one set of accommodating portions formed in an outer peripheral surface of the male shaft and in an inner peripheral surface of the female shaft, and at least the one set of torque transmission members are cylindrical members that gradually decrease in their diameters toward end portions in an axial direction.
    Type: Grant
    Filed: October 8, 2003
    Date of Patent: March 4, 2008
    Assignee: NSK Ltd.
    Inventor: Yasuhisa Yamada
  • Patent number: 7337674
    Abstract: A pressure measurement device usable for monitoring pressure of fluids such as blood, waste, and replacement fluid in a blood treatment system provides a reliable signal and other benefits by virtue of a number of features of the various embodiments disclosed. The pressure of fluid carried by a vessel or tube is measured by measuring a change in shape of the vessel or tube via a sensor element contacting it. Materials, shape, and mechanical support cooperatively ensure that the little inelastic strain occurs and pressure measurements are repeatable. The embodiments are compatible with the use of disposable vessels and tubes.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: March 4, 2008
    Assignee: Nx Stage Medical, Inc.
    Inventors: Jeffrey H. Burbank, James M. Brugger, Dennis M. Treu, Christopher McDowell
  • Patent number: 7336425
    Abstract: A zoom lens system includes, in order from an object, a first lens group having positive power, a second lens group having negative power, a third lens group having positive power, a fourth lens group having positive power, and a fifth lens group having positive power. Upon zooming from a wide-angle end state to a telephoto end state, the first and fifth lens groups moves with respect to the image plane, the second lens group moves at first to the image and then to the object, and the third and fourth lens groups move to the object such that a distance between the first and second lens groups increases, a distance between the second and third lens group decreases, a distance between the third and fourth lens groups decreases, and a distance between the fourth and fifth lens groups increases. Given conditional expressions are satisfied.
    Type: Grant
    Filed: October 12, 2006
    Date of Patent: February 26, 2008
    Assignee: Nikon Corporation
    Inventors: Akihiko Obama, Toshinori Take